公开(公告)号：US20190189860A1

公开(公告)日：2019-06-20

申请号：US16218944

申请日：2018-12-13

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Jean-Michel RIVIERE ,  Romain COFFY ,  Karine SAXOD

IPC: H01L33/48 ,  H05K5/03 ,  H01L31/18 ,  H01L31/12 ,  H01L31/0232 ,  H01L31/0203 ,  H01L33/00 ,  H01L33/58

CPC classification number: H01L33/483 ,  H01L31/0203 ,  H01L31/02327 ,  H01L31/12 ,  H01L31/162 ,  H01L31/18 ,  H01L33/005 ,  H01L33/58 ,  H05K5/03

Abstract: An electronic circuit including a cover crossed by an element and having a planar main inner surface.

公开(公告)号：US20190157469A1

公开(公告)日：2019-05-23

申请号：US16191625

申请日：2018-11-15

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Karine SAXOD ,  Veronique FERRE ,  Agnes BAFFERT ,  Jean-Michel RIVIERE

IPC: H01L31/0203 ,  H01L31/0232 ,  H01L21/56

Abstract: An encapsulation cover for an electronic package includes a frontal wall with a through-passage extending between faces. The frontal wall includes an optical element that allows light to pass through the through-passage. A cover body and a metal insert that is embedded in the cover body, with the cover body being overmolded over the metal insert, defines at least part of the frontal wall.

公开(公告)号：US20190131481A1

公开(公告)日：2019-05-02

申请号：US16177667

申请日：2018-11-01

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Marie-Astrid PIN ,  Jegger PADERNILLA ,  Jean-Michel RIVIERE

IPC: H01L31/16

Abstract: An encapsulation cover for an electronic package is formed by a first cover body and a second cover body. The first and second cover bodies are assembled together by a bonding material. Frontal walls of the first and second cover bodies are superposed and include through-passages that facing one another and are provided with optical elements allowing light to pass through. At least one surface of the frontal walls of the first and second cover bodies includes void containing the bonding material.

公开(公告)号：US20230114469A1

公开(公告)日：2023-04-13

申请号：US17961911

申请日：2022-10-07

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Patrick LAURENT ,  Jean-Michel RIVIERE

IPC: H05K1/14 ,  H05K1/18 ,  H05K1/02 ,  H05K1/11

Abstract: A device includes comprising first and second printed circuit boards. Walls couple the first and second printed circuit boards to each other and define a first cavity between the first and second printed circuit boards. Electric conductors associated with the walls electrically connect the the first and second printed circuit boards. An integrated circuit chip is mounted to a first surface of the first integrated circuit board in the first cavity. The integrated circuit chip is electrically connected to conductive tracks of the first surface of the first printed circuit board. Surface-mounted components are mounted on top of and in contact with conductive tracks of a first surface of the second printed circuit board. The first surfaces of the first and second printed circuit boards are arranged facing towards each other. The first and second printed circuit boards may form rigid components of a flex-rigid type printed circuit board.

公开(公告)号：US20230034445A1

公开(公告)日：2023-02-02

申请号：US17965443

申请日：2022-10-13

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Remi BRECHIGNAC ,  Jean-Michel RIVIERE

IPC: H01L33/52 ,  H01L31/0203 ,  H01L31/0216 ,  H01L33/44 ,  H01L33/62

Abstract: An electronic device includes a first electronic component and a second electronic. Each electronic component includes a carrier substrate having a back side and a front side, an electronic chip including an integrated optical element, an overmolded transparent block encapsulating the electronic chip above the carrier substrate, and electrical connections between the electronic chip and electrical contacts of the carrier substrate. An overmolded grid encapsulates and holds the first and second electronic components. The grid is configured so that sides of the first and second electronic components are at least partially exposed.

公开(公告)号：US20220310869A1

公开(公告)日：2022-09-29

申请号：US17838929

申请日：2022-06-13

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Remi BRECHIGNAC ,  Jean-Michel RIVIERE

IPC: H01L31/16 ,  H01L23/00

Abstract: An optoelectronic device includes an emitter of light rays and a receiver of light rays. The emitter is encapsulated in a transparent block. An opaque conductive layer is applied to a top surface and a side surface of the transparent block. The receiver is mounted to the opaque conductive layer at the top surface. An electrical connection is made between the receiver and the opaque conductive layer. A conductive strip is also mounted to the side surface of the transparent block and isolated from the opaque conductive layer. A further electrical connection is made between the receiver and the conductive strip.

公开(公告)号：US20210398919A1

公开(公告)日：2021-12-23

申请号：US17466941

申请日：2021-09-03

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Denis FARISON ,  Romain COFFY ,  Jean-Michel RIVIERE

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/528 ,  H01L25/065

Abstract: A first integrated circuit chip is assembled to a second integrated circuit chip with a back-to-back surface relationship. The back surfaces of the integrated circuit chips are attached to each other using one or more of an adhesive, solder or molecular bonding. The back surface of at least one the integrated circuit chips is processed to include at least one of a trench, a cavity or a saw cut.

公开(公告)号：US20210320473A1

公开(公告)日：2021-10-14

申请号：US17223649

申请日：2021-04-06

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Fabien QUERCIA ,  Jean-Michel RIVIERE

IPC: H01S5/02234 ,  H01L31/0203 ,  H01L31/0232 ,  H01S5/00 ,  H01S5/40 ,  H01S5/0236 ,  G01S7/481

Abstract: An electronic device includes a base substrate having a mounting face. An electronic chip is fastened onto the mounting face of the base substrate. A transparent encapsulation structure is bonded onto the base substrate. The transparent encapsulation structure includes a housing with an internal cavity defining a chamber housing the electronic chip. The encapsulation structure has an external face that supports a light-filtering optical wafer located facing an optical element of the electronic chip. An opaque cover covers the transparent encapsulation structure and includes a local opening facing the light-filtering optical wafer.

公开(公告)号：US20210202781A1

公开(公告)日：2021-07-01

申请号：US17199180

申请日：2021-03-11

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Alexandre COULLOMB ,  Romain COFFY ,  Jean-Michel RIVIERE

IPC: H01L31/16

Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.

公开(公告)号：US20210159985A1

公开(公告)日：2021-05-27

申请号：US17169010

申请日：2021-02-05

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Jean-Michel RIVIERE ,  Romain COFFY ,  Karine SAXOD

IPC: H04B10/40 ,  H05K7/02 ,  H05K5/03 ,  H04B10/80 ,  H01L31/16 ,  H01L31/0203

Abstract: A cover for an electronic circuit package, including: a body having an opening extending therethrough; a first element located in the opening and having a surface continuing planar or rounded shapes of a surface of the cover; and a second element of connection of the first element to the body.