Abstract:
A liquid crystal display including a semiconductor layer disposed on a substrate, a transparent electrode disposed n the semiconductor layer, the transparent electrode overlapping the semiconductor layer and including a source electrode, a drain electrode facing the source electrode, and a first electrode extending from the drain electrode, and an insulating layer disposed on the transparent electrode. The semiconductor layer contacts an entire surface of the source electrode, the drain electrode, and the first electrode.
Abstract:
A display device includes: a display panel including a plurality of pixels and a plurality of dots having a pixel set including n pixels of the plurality of pixels as a unit; a signal controller configured to receive input image signals for the pixels and process the input image signals to generate output image signals; and a data driver configured to convert the output image signals into data voltages and apply the data voltages to the display panel, wherein the data driver is configured to apply data voltages having different polarities to a first dot and a second dot of the plurality of dots, the second dot being positioned in a row that is the same as a row in which the first dot is positioned to neighbor the first dot.
Abstract:
A display, includes: a substrate; first signal lines (FSLs) at least partially recessed in the substrate and extending in substantially a direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.
Abstract:
A liquid crystal display includes: a first substrate including a pixel; a pixel electrode in the pixel of the first substrate; a second substrate facing the first substrate; a common electrode on the second substrate; and a liquid crystal layer between the first substrate and the second substrate. The pixel includes a first domain, a second domain, a third domain and a fourth domain. Within the pixel including the first to fourth domains, a planar shape of each of the first domain, the second domain, the third domain and the fourth domain is a right triangle, and among sides of the right triangle, an oblique side of the first domain is adjacent to an oblique side of the second domain, and an oblique side of the third domain is adjacent to an oblique side of the fourth domain.
Abstract:
An array substrate for a display device includes a first base substrate; a thin film transistor disposed on the first base substrate that includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a first passivation layer that covers the thin film transistor and that includes an inorganic insulating material; a second passivation layer disposed on the first passivation layer that includes an exposure hole that exposes the first passivation layer on the drain electrode; a common electrode disposed on the second passivation layer; a third passivation layer that covers the common electrode and that includes a contact hole inside the exposure hole to expose the drain electrode; a cavity between the first passivation layer and the third passivation layer on the drain electrode; and a pixel electrode disposed on the third passivation layer and connected with the drain electrode.
Abstract:
A display apparatus including a first substrate, a second substrate, a pixel, and a unit color filter. The first and second substrates are opposite to each other. The pixel is disposed between the first and second substrates. The color filter is disposed between the first substrate and the pixel or between the second substrate and the pixel. The color filter includes a red color filter, a green color filter, a blue color filter, and a yellow color filter. The yellow color filter includes a sub-red color filter and a sub-green color filter.
Abstract:
A method of forming a metal pattern is disclosed. According to the method, a gate electrode and a pixel electrode are formed on a substrate. A metal layer is formed covering the gate electrode and the pixel electrode. A photo pattern is formed wherein a thickness of an area of the photo pattern that overlaps the gate electrode is smaller than a thickness of other areas of the photo pattern. The photo pattern is soft-baked. The photo pattern is exposed to light. The photo pattern is developed to expose a portion of the metal layer that overlaps the gate electrode. The exposed portion of the metal layer is removed to form a source electrode and a drain electrode, the source electrode and the drain electrode being spaced apart from each other with respect to the gate electrode.
Abstract:
A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.
Abstract:
A method for manufacturing a touch sensor panel with a reduced number of masks includes forming a first resist layer with both full and partial thickness patterns, the latter being at a region corresponding to a plurality of first sensor electrodes; etching a first transparent conductive layer and a first other conductive layer using the first resist layer patterns having both full and partial thicknesses; forming a second resist layer with both full and partial thickness patterns, the latter being at a region corresponding to a plurality of second sensor electrodes; and etching while using the second resist layer patterns.