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公开(公告)号:US11264381B2
公开(公告)日:2022-03-01
申请号:US16841806
申请日:2020-04-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seungryul Lee , Yongseung Kim , Jungtaek Kim , Pankwi Park , Dongchan Suh , Moonseung Yang , Seojin Jeong , Minhee Choi , Ryong Ha
IPC: H01L27/088 , H01L21/8234 , H01L29/423 , H01L29/78 , H01L29/06
Abstract: An integrated circuit device includes a fin-type active region protruding from a substrate and extending in a first direction, a plurality of semiconductor patterns disposed apart from an upper surface of the fin-type active region, the plurality of semiconductor patterns each including a channel region; a gate electrode surrounding the plurality of semiconductor patterns, extending in a second direction perpendicular to the first direction, and including a main gate electrode, which is disposed on an uppermost semiconductor pattern of the plurality of semiconductor patterns and extends in the second direction, and a sub-gate electrode disposed between the plurality of semiconductor patterns; a spacer structure disposed on both sidewalls of the main gate electrode; and a source/drain region connected to the plurality of semiconductor patterns, disposed at both sides of the gate electrode, and contacting a bottom surface of the spacer structure.
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22.
公开(公告)号:US10883173B2
公开(公告)日:2021-01-05
申请号:US16200149
申请日:2018-11-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yeonock Han , Wonwoong Chung , Keum Seok Park , Pankwi Park , Jeongho Yoo , Younjoung Cho , Byung Koo Kong , Mijeong Kim , Jin Wook Lee , Changeun Jang
IPC: F17C1/00 , F17C13/02 , C23C16/448 , H01L21/02
Abstract: A method of manufacturing a semiconductor device includes disposing a gas-storage cylinder storing monochlorosilane within a gas supply unit. The monochlorosilane is supplied from the gas-storage cylinder into a process chamber to form a silicon containing layer therein. The gas-storage cylinder includes manganese.
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公开(公告)号:US20250040188A1
公开(公告)日:2025-01-30
申请号:US18588322
申请日:2024-02-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yang Xu , Gyeom Kim , Pankwi Park , Ryong Ha , Yoon Heo
IPC: H01L29/423 , H01L29/06 , H01L29/08 , H01L29/66 , H01L29/775 , H01L29/786
Abstract: A semiconductor device includes a substrate; an active region extending in a first, horizontal, direction on the substrate, and including a first active pattern at a first height above a bottom surface of the substrate in a vertical direction and having a first width in a second, horizontal, direction, a second active pattern having a second width in the second direction different from the first width, and a transition active pattern connecting the first active pattern to the second active pattern; gate structures intersecting the active region each gate structure extending in the second direction across the substrate; source/drain regions disposed on sides of the gate structures, and including a first source/drain region disposed on the first active pattern, a second source/drain region disposed on the second active pattern, and a transition source/drain region disposed on the transition active pattern. Each of the source/drain regions is disposed on the active region and includes a first epitaxial layer having a recessed upper surface and a second epitaxial layer disposed on the first epitaxial layer, at a second height above a bottom surface of the substrate in a vertical direction, a first sidewall thickness of the first epitaxial layer of the first source/drain region in the first direction is different from a second sidewall thickness of the first epitaxial layer of the second source/drain region in the first direction, at the second height, thicknesses of opposing sidewalls of the first epitaxial layer of the transition source/drain region in the first direction are different, and a vertical level of a lowermost end of the second epitaxial layer of the first source/drain region, a vertical level of a lowermost end of the second epitaxial layer of the second source/drain region, and a vertical level of a lowermost end of the second epitaxial layer of the transition source/drain region are different from each other.
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公开(公告)号:US20240136425A1
公开(公告)日:2024-04-25
申请号:US18190837
申请日:2023-03-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Edwardnamkyu Cho , Seokhoon Kim , Jungtaek Kim , Pankwi Park , Sumin Yu , Seojin Jeong
IPC: H01L29/66 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/786
CPC classification number: H01L29/66545 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/78696
Abstract: A manufacturing method of a semiconductor device, includes forming a plurality of main gate sacrificial patterns spaced apart from each other on a stacked structure of subgate sacrificial patterns and semiconductor patterns; forming a first insulating layer between main gate sacrificial patterns; removing the main gate sacrificial patterns; removing the subgate sacrificial patterns; forming a main gate dummy pattern in a space from which the main gate sacrificial patterns are removed; forming a plurality of subgate dummy patterns in a space from which the subgate sacrificial patterns are removed; forming a recess under a space where the first insulating layer is removed; forming a source/drain pattern within the recess; forming a second insulating layer on the source/drain pattern; removing the main gate dummy pattern and the subgate dummy patterns; and forming a gate electrode in a space where the main gate dummy pattern and the subgate dummy patterns are removed.
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公开(公告)号:US11888026B2
公开(公告)日:2024-01-30
申请号:US17467944
申请日:2021-09-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhee Choi , Seojin Jeong , Seokhoon Kim , Jungtaek Kim , Pankwi Park , Moonseung Yang , Ryong Ha
IPC: H01L29/06 , H01L29/786 , H01L29/66
CPC classification number: H01L29/0665 , H01L29/6656 , H01L29/78618
Abstract: An integrated circuit device includes a fin-type active region on a substrate; at least one nanosheet having a bottom surface facing the fin top; a gate line on the fin-type active region; and a source/drain region on the fin-type active region, adjacent to the gate line, and in contact with the at least one nanosheet, wherein the source/drain region includes a lower main body layer and an upper main body layer, a top surface of the lower main body layer includes a lower facet declining toward the substrate as it extends in a direction from the at least one nanosheet to a center of the source/drain region, and the upper main body layer includes a bottom surface contacting the lower facet and a top surface having an upper facet. With respect to a vertical cross section, the lower facet extends along a corresponding first line and the upper facet extends along a second line that intersects the first line.
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公开(公告)号:US11710738B2
公开(公告)日:2023-07-25
申请号:US17352763
申请日:2021-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keomyoung Shin , Pankwi Park , Seunghun Lee
IPC: H01L27/088 , H01L29/26 , H01L29/78 , H01L29/08 , H01L29/06
CPC classification number: H01L27/0886 , H01L29/0673 , H01L29/0847 , H01L29/26 , H01L29/785
Abstract: An integrated circuit (IC) device includes a fin-type active region extending lengthwise in a first direction, a plurality of nanosheets overlapping each other in a second direction on a fin top surface of the fin-type active region, and a source/drain region on the fin-type active region and facing the plurality of nanosheets in the first direction. The plurality of nanosheets include a first nanosheet, which is closest to the fin top surface of the fin-type active region and has a shortest length in the first direction, from among the plurality of nanosheets. The source/drain region includes a source/drain main region and a first source/drain protruding region protruding from the source/drain main region. The first source/drain protruding region protrudes from the source/drain main region toward the first nanosheet and overlaps portions of the plurality of nanosheets in the second direction.
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公开(公告)号:US11322583B2
公开(公告)日:2022-05-03
申请号:US16821565
申请日:2020-03-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungkeun Lim , Unki Kim , Yuyeong Jo , Yihwan Kim , Jinbum Kim , Pankwi Park , Ilgyou Shin , Seunghun Lee
Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.
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公开(公告)号:US11069681B2
公开(公告)日:2021-07-20
申请号:US16694706
申请日:2019-11-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keomyoung Shin , Pankwi Park , Seunghun Lee
IPC: H01L27/088 , H01L29/26 , H01L29/78 , H01L29/08 , H01L29/06
Abstract: An integrated circuit (IC) device includes a fin-type active region extending lengthwise in a first direction, a plurality of nanosheets overlapping each other in a second direction on a fin top surface of the fin-type active region, and a source/drain region on the fin-type active region and facing the plurality of nanosheets in the first direction. The plurality of nanosheets include a first nanosheet, which is closest to the fin top surface of the fin-type active region and has a shortest length in the first direction, from among the plurality of nanosheets. The source/drain region includes a source/drain main region and a first source/drain protruding region protruding from the source/drain main region. The first source/drain protruding region protrudes from the source/drain main region toward the first nanosheet and overlaps portions of the plurality of nanosheets in the second direction.
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29.
公开(公告)号:US20200373385A1
公开(公告)日:2020-11-26
申请号:US16821565
申请日:2020-03-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungkeun Lim , Unki Kim , Yuyeong Jo , Yihwan Kim , Jinbum Kim , Pankwi Park , Ilgyou Shin , Seunghun Lee
Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.
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30.
公开(公告)号:US20190309415A1
公开(公告)日:2019-10-10
申请号:US16200149
申请日:2018-11-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yeonock Han , Wonwoong Chung , Keum Seok Park , Pankwi Park , Jeongho Yoo , Younjoung Cho , Byung Koo Kong , Mijeong Kim , Jin Wook Lee , Changeun Jang
IPC: C23C16/448 , H01L21/02
Abstract: A method of manufacturing a semiconductor device includes disposing a gas-storage cylinder storing monochlorosilane within a gas supply unit. The monochlorosilane is supplied from the gas-storage cylinder into a process chamber to form a silicon containing layer therein. The gas-storage cylinder includes manganese.
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