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公开(公告)号：US20240422991A1
公开(公告)日：2024-12-19
申请号：US18402552
申请日：2024-01-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngsun Song , Seulji Song
Abstract: A vertical memory device includes a memory cell structure extending primarily in a vertical direction. A resistive layer is electrically connected to a first end of the memory cell structure. A selector is electrically connected to a second end of the memory cell structure and includes a variable resistive material of which an electrical resistive value is reversibly changed in response to an electrical signal. A first bit line is located apart from the memory cell structure in the vertical direction with the resistive layer disposed therebetween and is connected to the resistive layer. A second bit line is located apart from the memory cell structure in the vertical direction with the selector disposed therebetween and is connected to the selector. A plurality of word line plates are spaced apart from each other in the vertical direction and overlapping each other in the vertical direction. Each word line plate at least partially surrounds a portion of a sidewall of the memory cell structure.
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公开(公告)号：US20240421081A1
公开(公告)日：2024-12-19
申请号：US18631666
申请日：2024-04-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seulji Song
IPC: H01L23/528 , H10B63/00 , H10N70/00
Abstract: A memory device includes a first conductive line extending in a first horizontal direction, a second conductive line extending in a second horizontal direction, and a memory cell extending in a vertical direction between the first conductive line and the second conductive line. The memory cell includes a lower electrode layer, a switching pattern, and an upper electrode layer, which are sequentially stacked on the first conductive line. The switching pattern includes a chalcogenide layer including a chalcogen element of group VI of the periodic table, and an element of group IV and an element of group V of the periodic table, which are chemically bonded to the group VI chalcogen element. The switching pattern is configured to have a three-level concentration gradient of the group IV element or the group V element in the vertical direction.
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公开(公告)号：US20240237348A1
公开(公告)日：2024-07-11
申请号：US18403115
申请日：2024-01-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hwayeong LEE , Hunmo Yang , Seulji Song
Abstract: A semiconductor memory device includes a semiconductor substrate; a plurality of word line layers on the semiconductor substrate, each word line layer of the plurality of word line layers including an insulating line and a word line; a plurality of insulating layers in spaces between the plurality of word line layers, the plurality of insulating layers being apart from each other in a vertical direction on the semiconductor substrate; a channel structure extending in the vertical direction on the semiconductor substrate, the channel structure including a channel region and a gate dielectric layer surrounding the channel region; and a bit line on the channel structure, the bit line extending in a first horizontal direction perpendicular to the vertical direction and being connected to the channel structure, wherein the word line of each word line layer of the plurality of word line layers has a meandering shape.
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Patent Agency Ranking
公开(公告)号：US20240112709A1
公开(公告)日：2024-04-04
申请号：US18303937
申请日：2023-04-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hwan Kim , Suhee Jeon , Seulji Song
IPC: G11C7/10
CPC classification number: G11C7/1096 , G11C7/1066 , G11C7/1069
Abstract: A method of reading data from a self-selecting memory includes generating a read pulse that has a polarity opposite to that of a write pulse. The write pulse writes data into a target memory cell in the self-selecting memory. The read pulse is applied to the target memory cell. The read pulse has a first edge that is a starting point of the read pulse and a second edge that is an ending point of the read pulse. A slope of the second edge of the read pulse is adjusted such that an undershoot or overshoot on the second edge of the read pulse increases.
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公开(公告)号：US11502130B2
公开(公告)日：2022-11-15
申请号：US16937963
申请日：2020-07-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyusul Park , Woohyun Park , Ilmok Park , Seulji Song
Abstract: A variable resistance memory device and a method of fabricating a variable resistance memory device, the device including first conductive lines extending in a first direction; second conductive lines extending in a second direction crossing the first direction; and memory cells at respective intersection points of the first conductive lines and the second conductive lines, wherein each of the memory cells includes a switching pattern, an intermediate electrode, a variable resistance pattern, and an upper electrode, which are between the first and second conductive lines and are connected in series; and a spacer structure including a first spacer and a second spacer, the first spacer being on a side surface of the upper electrode, and the second spacer covering the first spacer and a side surface of the variable resistance pattern such that the second spacer is in contact with the side surface of the variable resistance pattern.
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公开(公告)号：US10991880B2
公开(公告)日：2021-04-27
申请号：US16401297
申请日：2019-05-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ilmok Park , Gwang-Hyun Baek , Seulji Song
Abstract: A variable resistance memory device includes a substrate. A first conductive line is disposed on the substrate and extends primarily in a first direction. A second conductive line is disposed on the substrate and extends primarily in a second direction. The second direction intersects the first direction. A phase change pattern is disposed between the first conductive line and the second conductive line. A bottom electrode is disposed between the phase change pattern and the first bottom electrode includes first a first sidewall segment that connects the first conductive line and the phase change pattern to each other. The phase change pattern has a width in the first direction that decreases toward the substrate. The first sidewall segment has a first lateral surface and a second lateral surface that face each other. A lowermost portion of the phase change pattern is disposed between the first lateral surface and the second lateral surface.
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公开(公告)号：US10923654B2
公开(公告)日：2021-02-16
申请号：US16426216
申请日：2019-05-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ilmok Park , Kyusul Park , Seulji Song , Kwang-Woo Lee
Abstract: A variable resistance memory device includes a word line extending in a first direction, a bit line on the word line and extending in a second direction intersecting the first direction, a switching pattern between the bit line and the word line, a phase change pattern between the switching pattern and the word line, and a bottom electrode between the phase change pattern and the word line, wherein the phase change pattern has a bottom area greater than a top area of the bottom electrode, a thickness of the phase change pattern being greater than a thickness of the bottom electrode, and wherein the bottom and top areas are defined in the first and second directions, and the thicknesses are defined in a third direction intersecting the first and second directions.
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公开(公告)号：US20200066985A1
公开(公告)日：2020-02-27
申请号：US16401297
申请日：2019-05-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ilmok Park , Gwang-Hyun Baek , Seulji Song
Abstract: A variable resistance memory device includes a substrate. A first conductive line is disposed on the substrate and extends primarily in a first direction. A second conductive line is disposed on the substrate and extends primarily in a second direction. The second direction intersects the first direction. A phase change pattern is disposed between the first conductive line and the second conductive line. A bottom electrode is disposed between the phase change pattern and the first bottom electrode includes first a first sidewall segment that connects the first conductive line and the phase change pattern to each other. The phase change pattern has a width in the first direction that decreases toward the substrate. The first sidewall segment has a first lateral surface and a second lateral surface that face each other. A lowermost portion of the phase change pattern is disposed between the first lateral surface and the second lateral surface.
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