Variable resistance memory devices and methods of forming the same

    公开(公告)号:US10714686B2

    公开(公告)日:2020-07-14

    申请号:US15869892

    申请日:2018-01-12

    IPC分类号: H01L45/00 G11C13/00 H01L27/24

    摘要: Variable resistance memory devices and methods of forming the same are provided. The variable resistance memory devices may include a substrate including a cell region and a peripheral region, first conductive lines on the substrate, second conductive lines traversing the first conductive lines, variable resistance structures at intersecting points of the first conductive lines and the second conductive lines, and bottom electrodes between the first conductive lines and the variable resistance structures. The cell region may include a boundary region contacting the peripheral region, and one of the first conductive lines is electrically insulated from one of the variable resistance structures that is on the boundary region and overlaps the one of the first conductive lines.

    Variable resistance memory device and method of manufacturing the same

    公开(公告)号:US10547000B2

    公开(公告)日:2020-01-28

    申请号:US16014871

    申请日:2018-06-21

    IPC分类号: G11C11/00 H01L45/00 G11C13/00

    摘要: Disclosed are a variable resistance memory device and a method of manufacturing the same. The device comprises a first conductive line extending in a first direction, a second conductive line extending in a second direction intersecting the first direction, a memory cell at an intersection between the first conductive line and the second conductive line, a first electrode between the first conductive line and the memory cell, and a second electrode between the second conductive line and the memory cell. The memory cell comprises a switching pattern, an intermediate electrode, a first resistivity control pattern, and a variable resistance pattern that are connected in series between the first conductive line and the second conductive line. Resistivity of the first resistivity control pattern is less than resistivity of the second electrode.

    Three-dimensional semiconductor memory devices

    公开(公告)号:US11950517B2

    公开(公告)日:2024-04-02

    申请号:US17143493

    申请日:2021-01-07

    IPC分类号: H10N70/00 H10B63/00

    摘要: A three-dimensional semiconductor memory device may include a first conductive line extending in a first direction, a second conductive line extending in a second direction crossing the first direction, a cell stack at an intersection of the first and second conductive lines, and a gapfill insulating pattern covering a side surface of the cell stack. The cell stack may include first, second, and third electrodes sequentially stacked, a switching pattern between the first and second electrodes, and a variable resistance pattern between the second and third electrodes. A top surface of the gapfill insulating pattern may be located between top and bottom surfaces of the third electrode.

    Variable resistance memory devices and methods of manufacturing the same

    公开(公告)号:US10424619B2

    公开(公告)日:2019-09-24

    申请号:US15247987

    申请日:2016-08-26

    发明人: Ilmok Park

    IPC分类号: H01L27/24 H01L45/00

    摘要: Variable resistance memory devices are provided. A variable resistance memory device includes first and second conductive lines, and a variable resistance material and a switching element between the first and second conductive lines. The switching element includes first and second portions that extend and/or face in different first and second directions, respectively. Methods of manufacturing a variable resistance memory device are also provided.

    Variable resistance memory device and method of fabricating the same

    公开(公告)号:US11502130B2

    公开(公告)日:2022-11-15

    申请号:US16937963

    申请日:2020-07-24

    IPC分类号: H01L27/24 H01L45/00

    摘要: A variable resistance memory device and a method of fabricating a variable resistance memory device, the device including first conductive lines extending in a first direction; second conductive lines extending in a second direction crossing the first direction; and memory cells at respective intersection points of the first conductive lines and the second conductive lines, wherein each of the memory cells includes a switching pattern, an intermediate electrode, a variable resistance pattern, and an upper electrode, which are between the first and second conductive lines and are connected in series; and a spacer structure including a first spacer and a second spacer, the first spacer being on a side surface of the upper electrode, and the second spacer covering the first spacer and a side surface of the variable resistance pattern such that the second spacer is in contact with the side surface of the variable resistance pattern.

    Variable resistance memory device and method of fabricating the same

    公开(公告)号:US10991880B2

    公开(公告)日:2021-04-27

    申请号:US16401297

    申请日:2019-05-02

    摘要: A variable resistance memory device includes a substrate. A first conductive line is disposed on the substrate and extends primarily in a first direction. A second conductive line is disposed on the substrate and extends primarily in a second direction. The second direction intersects the first direction. A phase change pattern is disposed between the first conductive line and the second conductive line. A bottom electrode is disposed between the phase change pattern and the first bottom electrode includes first a first sidewall segment that connects the first conductive line and the phase change pattern to each other. The phase change pattern has a width in the first direction that decreases toward the substrate. The first sidewall segment has a first lateral surface and a second lateral surface that face each other. A lowermost portion of the phase change pattern is disposed between the first lateral surface and the second lateral surface.