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公开(公告)号:US20220216402A1
公开(公告)日:2022-07-07
申请号:US17468739
申请日:2021-09-08
发明人: Hye Ji Yoon , O Ik Kwon , Yun Seung Kang , Sang-Kuk Kim , Gwang-Hyun Baek , Tae Hyung Lee , Su Jin Jeon
IPC分类号: H01L45/00 , H01L27/24 , H01L23/528
摘要: A semiconductor memory device in which performance is improved by reducing a wiring resistance is provided. The semiconductor memory device comprising an inter-wiring insulation film on a substrate, a first wiring pattern extending in a first direction, in the inter-wiring insulation film, a barrier insulation film that is on an upper surface of the inter-wiring insulation film, a barrier conductive pattern electrically connected to the first wiring pattern, in the barrier insulation film, a memory cell electrically connected to the barrier conductive pattern and including a selection pattern and a variable resistor pattern, and a second wiring pattern extending in a second direction intersecting the first direction, on the memory cell, wherein a width of the barrier conductive pattern in the second direction is different from a width in the second direction of a portion of the memory cell that is adjacent to the barrier conductive pattern.
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公开(公告)号:US10236442B2
公开(公告)日:2019-03-19
申请号:US15227334
申请日:2016-08-03
发明人: Jaehun Seo , Jong-Kyu Kim , Jung-Ik Oh , Inho Kim , Jongchul Park , Gwang-Hyun Baek , Hyun-woo Yang
IPC分类号: H01L43/12 , H01L21/3213 , H01L21/02 , H01L27/22
摘要: Provided herein are methods of fabricating a magnetic memory device including forming magnetic tunnel junction patterns on a substrate, forming an interlayered insulating layer on the substrate to cover the magnetic tunnel junction patterns, forming a conductive layer on the interlayered insulating layer, patterning the conductive layer to form interconnection patterns electrically connected to the magnetic tunnel junction patterns, and performing a cleaning process on the interconnection patterns. The cleaning process is performed using a gas mixture of a first gas and a second gas. The first gas contains a hydrogen element (H), and the second gas contains a source gas different from that of the first gas.
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公开(公告)号:US09978932B2
公开(公告)日:2018-05-22
申请号:US15057101
申请日:2016-02-29
发明人: Hyungjoon Kwon , Sechung Oh , Vladimir Urazaev , Ken Tokashiki , Jongchul Park , Gwang-Hyun Baek , Jaehun Seo , Sangmin Lee
CPC分类号: H01L43/08 , G11C11/161 , H01L27/222 , H01L27/228 , H01L27/2436 , H01L27/2463 , H01L43/02 , H01L43/10 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.
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4.
公开(公告)号:US09876165B2
公开(公告)日:2018-01-23
申请号:US15180843
申请日:2016-06-13
发明人: Sang-Kuk Kim , Jong-Kyu Kim , Jongchul Park , Inho Kim , Gwang-Hyun Baek , Jung-Ik Oh
摘要: A method for forming a pattern, the method including forming an etch target layer on a substrate; patterning the etch target layer to form patterns; and performing a pre-oxidation trim process a plurality of times, the pre-oxidation trim process including performing an oxidation process to form an insulating layer on a sidewall of each of the patterns; and performing a sputter etch process to remove at least a portion of the insulating layer.
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5.
公开(公告)号:US20170110656A1
公开(公告)日:2017-04-20
申请号:US15227334
申请日:2016-08-03
发明人: Jaehun Seo , Jong-Kyu Kim , Jung-Ik Oh , Inho Kim , Jongchul Park , Gwang-Hyun Baek , Hyun-woo Yang
IPC分类号: H01L43/12 , H01L43/08 , H01L21/768 , H01L43/02
CPC分类号: H01L43/12 , H01L21/02071 , H01L21/32138 , H01L27/222
摘要: Provided herein are methods of fabricating a magnetic memory device including forming magnetic tunnel junction patterns on a substrate, forming an interlayered insulating layer on the substrate to cover the magnetic tunnel junction patterns, forming a conductive layer on the interlayered insulating layer, patterning the conductive layer to form interconnection patterns electrically connected to the magnetic tunnel junction patterns, and performing a cleaning process on the interconnection patterns. The cleaning process is performed using a gas mixture of a first gas and a second gas. The first gas contains a hydrogen element (H), and the second gas contains a source gas different from that of the first gas.
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公开(公告)号:US09496488B2
公开(公告)日:2016-11-15
申请号:US14070471
申请日:2013-11-01
发明人: Hyungjoon Kwon , Sechung Oh , Vladimir Urazaev , Ken Tokashiki , Jongchul Park , Gwang-Hyun Baek , Jaehun Seo , Sangmin Lee
CPC分类号: H01L43/08 , G11C11/161 , H01L27/222 , H01L27/228 , H01L27/2436 , H01L27/2463 , H01L43/02 , H01L43/10 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要: Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.
摘要翻译: 提供半导体器件及其制造方法。 半导体器件可以包括下部布线,穿过下部布线的上部布线,在下部布线和上部布线之间的交叉处提供的选择元件以及设置在选择元件和上部布线之间的存储元件。 每个存储元件可以包括具有大于底部宽度的顶部宽度的下部电极,以及包括堆叠在下部电极的顶表面上并且具有圆形边缘的多个磁性层的数据存储层。
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公开(公告)号:US10991880B2
公开(公告)日:2021-04-27
申请号:US16401297
申请日:2019-05-02
发明人: Ilmok Park , Gwang-Hyun Baek , Seulji Song
摘要: A variable resistance memory device includes a substrate. A first conductive line is disposed on the substrate and extends primarily in a first direction. A second conductive line is disposed on the substrate and extends primarily in a second direction. The second direction intersects the first direction. A phase change pattern is disposed between the first conductive line and the second conductive line. A bottom electrode is disposed between the phase change pattern and the first bottom electrode includes first a first sidewall segment that connects the first conductive line and the phase change pattern to each other. The phase change pattern has a width in the first direction that decreases toward the substrate. The first sidewall segment has a first lateral surface and a second lateral surface that face each other. A lowermost portion of the phase change pattern is disposed between the first lateral surface and the second lateral surface.
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公开(公告)号:US20200066985A1
公开(公告)日:2020-02-27
申请号:US16401297
申请日:2019-05-02
发明人: Ilmok Park , Gwang-Hyun Baek , Seulji Song
摘要: A variable resistance memory device includes a substrate. A first conductive line is disposed on the substrate and extends primarily in a first direction. A second conductive line is disposed on the substrate and extends primarily in a second direction. The second direction intersects the first direction. A phase change pattern is disposed between the first conductive line and the second conductive line. A bottom electrode is disposed between the phase change pattern and the first bottom electrode includes first a first sidewall segment that connects the first conductive line and the phase change pattern to each other. The phase change pattern has a width in the first direction that decreases toward the substrate. The first sidewall segment has a first lateral surface and a second lateral surface that face each other. A lowermost portion of the phase change pattern is disposed between the first lateral surface and the second lateral surface.
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9.
公开(公告)号:US10199566B2
公开(公告)日:2019-02-05
申请号:US15220719
申请日:2016-07-27
发明人: Jung-Ik Oh , Jong-Kyu Kim , Jongchul Park , Gwang-Hyun Baek , Kyungrae Byun , Hyun-Woo Yang
摘要: A semiconductor device includes a magnetic tunnel junction structure on a lower electrode, an intermediate electrode on the magnetic tunnel junction structure, and an upper electrode on the intermediate electrode, wherein the intermediate electrode includes a lower portion and an upper portion having a side surface profile different from that of the lower portion.
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