公开(公告)号：US07317460B2

公开(公告)日：2008-01-08

申请号：US10385249

申请日：2003-03-10

申请人： Jong-Seon Kim ,  Man-Bok Cheon ,  Seung-Woo Lee

发明人： Jong-Seon Kim ,  Man-Bok Cheon ,  Seung-Woo Lee

IPC分类号： G09G5/10

CPC分类号： G09G3/3611 ,  G09G3/20 ,  G09G2320/0276

摘要： An LCD for improving dynamic contrast by adjusting gamma voltages according to the brightness of an image is provided. The LCD includes: a liquid crystal display panel assembly having a plurality of pixels provided on crossing areas of a plurality of gate lines and a plurality of data lines; a gate driver applying voltage signals for sequentially scanning the gate lines; a source driver applying voltage signals for image display to the data lines; a timing controller providing image data and a control signal for the source driver, providing a gate line on/off control signal for the gate driver, and outputting digital gamma data to a digital/analogue (D/A) converter; and the D/A converter connected to the timing controller for converting the digital gamma data from the timing controller into analog signals to generate a plurality of gamma voltages and outputting the gamma voltages to the source driver. The LCD generates the gamma voltages by the D/A converter in place of using serially-connected resistors, and thus, the gamma voltages may vary depending on the brightness of the image.

摘要翻译： 提供了一种用于通过根据图像的亮度调整伽玛电压来改善动态对比度的LCD。 LCD包括：具有设置在多条栅极线和多条数据线的交叉区域上的多个像素的液晶显示面板组件; 栅极驱动器施加用于顺序扫描栅极线的电压信号; 源驱动器将用于图像显示的电压信号施加到数据线; 提供用于所述源极驱动器的图像数据和控制信号的定时控制器，为所述栅极驱动器提供栅极线导通/截止控制信号，以及将数字伽玛数据输出到数字/模拟（D / A）转换器; 和连接到定时控制器的D / A转换器，用于将来自定时控制器的数字伽马数据转换为模拟信号，以产生多个伽马电压，并将伽马电压输出到源驱动器。 LCD通过D / A转换器代替使用串联电阻产生伽马电压，因此，伽马电压可能会根据图像的亮度而变化。

公开(公告)号：US07315185B2

公开(公告)日：2008-01-01

申请号：US11434960

申请日：2006-05-16

申请人： Jae-Suk Yu ,  Jae-Youl Lee ,  Jong-Seon Kim ,  Kyung-Suc Nah

发明人： Jae-Suk Yu ,  Jae-Youl Lee ,  Jong-Seon Kim ,  Kyung-Suc Nah

IPC分类号： H03K17/16

CPC分类号： H04L25/0298 ,  H04L25/0278

摘要： A low voltage differential signal (LVDS) receiver includes a first receiving unit configured to receive a reference voltage and to responsively generate a first differential signal, and a second receiving unit configured to receive a voltage developed across a variable termination resistor unit having a resistance that is adjustable based on a resistance control code in response to a reference current, and to responsively generate a second differential signal. The LVDS receiver further includes a comparing unit configured to compare the first differential signal with the second differential signal and to responsively generate a counter control signal. The LVDS receiver further includes an up/down counter configured to adjust the resistance control code in response to the counter control signal. The up/down counter is further configured to provide the resistance control code to the variable termination resistor unit. Corresponding methods are also disclosed.

摘要翻译： 低电压差分信号（LVDS）接收机包括：第一接收单元，被配置为接收参考电压并响应地产生第一差分信号;以及第二接收单元，被配置为接收跨越可变终端电阻器单元产生的电压， 基于响应于参考电流的电阻控制代码可调节，并且响应地产生第二差分信号。 LVDS接收机还包括比较单元，其被配置为将第一差分信号与第二差分信号进行比较，并且响应地产生计数器控制信号。 LVDS接收器还包括一个上/下计数器，配置成响应于计数器控制信号调整电阻控制代码。 上/下计数器还被配置为向可变终端电阻器单元提供电阻控制代码。 还公开了相应的方法。

公开(公告)号：US07256802B2

公开(公告)日：2007-08-14

申请号：US10495399

申请日：2002-05-12

申请人： Haeng-Won Park ,  Jong-Seon Kim

发明人： Haeng-Won Park ,  Jong-Seon Kim

IPC分类号： G09G3/36 ,  G09G5/00

CPC分类号： G02F1/13452 ,  Y10S345/903

摘要： An LCD module includes a user connector part that receives power voltages, image signals and control signals from an external host system and outputs the power voltages, image and control signals through a first integrated type connector and an LCD module having a second integrated type connector connected with the first integrated type connector through an FPC. The LCD module receives power voltages and image and control signals through the second integrated type connector, provides image data signals and timing signals to data lines and provides scan signals to gate lines. Namely, the LCD can receive power voltage, the image signals and control signals through the integrated type connector instead of a plurality of connecting terminals, thereby providing an LCD having slim weight and compact size and reducing the size thereof.

摘要翻译： LCD模块包括从外部主机系统接收电力电压，图像信号和控制信号的用户连接器部分，并通过第一集成型连接器和具有连接到第二集成型连接器的LCD模块输出电源电压，图像和控制信号 第一个集成式连接器通过FPC。 LCD模块通过第二集成型连接器接收电源电压和图像和控制信号，向数据线提供图像数据信号和定时信号，并向栅极线提供扫描信号。 也就是说，LCD可以通过集成式连接器而不是多个连接端子接收电力电压，图像信号和控制信号，从而提供具有超薄重量和尺寸减小的LCD。

公开(公告)号：US20070182602A1

公开(公告)日：2007-08-09

申请号：US11617481

申请日：2006-12-28

申请人： Jin-Feng Zhan ,  Jong-Seon Kim ,  Dong-Yul Lee ,  Bom-Yun Kim

发明人： Jin-Feng Zhan ,  Jong-Seon Kim ,  Dong-Yul Lee ,  Bom-Yun Kim

IPC分类号： H03M7/40

CPC分类号： H03M7/40

摘要： A variable-length decoder includes a bitstream interface unit and a decoding unit, The bitstream interface unit generates a decoding bitstream for a current decoding process based on an unused decoding bitstream and an input bitstream. The unused bitstream includes unused bits of a previous decoding bitstream. The decoding unit decodes the decoding bitstream to generate a plurality of symbols per clock cycle and provides a next unused bitstream for a next decoding process to the bitstream interface unit.

摘要翻译： 可变长度解码器包括比特流接口单元和解码单元。比特流接口单元基于未使用的解码比特流和输入比特流生成用于当前解码过程的解码比特流。 未使用的比特流包括先前解码比特流的未使用比特。 解码单元解码译码比特流以在每个时钟周期产生多个符号，并向比特流接口单元提供用于下一个解码处理的下一个未使用的比特流。

公开(公告)号：US20070052857A1

公开(公告)日：2007-03-08

申请号：US11512627

申请日：2006-08-30

申请人： Min-Seok Song ,  Jong-Seon Kim ,  Jae-Youl Lee

发明人： Min-Seok Song ,  Jong-Seon Kim ,  Jae-Youl Lee

IPC分类号： H04N5/45

CPC分类号： G06F3/1431 ,  G09G5/006 ,  G09G2370/025

摘要： A display driver includes a first interface controller, a signal selector, a driver logic unit and a second interface controller. The first interface controller processes a control command transferred through a first interface mode to provide a path control command and a panel control command. The signal selector receives the path control command from the first interface controller, and separates a first video signal and a second video signal from a video signal conforming to a video interface mode. The driver logic unit receives the first video signal from the signal selector and the panel control command from the first interface controller to drive a display panel. The second interface controller outputs the second video signal device through a second interface mode to an external.

摘要翻译： 显示驱动器包括第一接口控制器，信号选择器，驱动器逻辑单元和第二接口控制器。 第一接口控制器处理通过第一接口模式传送的控制命令，以提供路径控制命令和面板控制命令。 信号选择器从第一接口控制器接收路径控制命令，并从符合视频接口模式的视频信号中分离第一视频信号和第二视频信号。 驱动器逻辑单元从第一接口控制器接收来自信号选择器的第一视频信号和面板控制命令以驱动显示面板。 第二接口控制器通过第二接口模式将第二视频信号装置输出到外部。

公开(公告)号：US20060082531A1

公开(公告)日：2006-04-20

申请号：US11045276

申请日：2005-01-31

申请人： Jong-Seon Kim

发明人： Jong-Seon Kim

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G2320/0247 ,  G09G2320/0626

摘要： A liquid crystal display device includes an liquid crystal display panel and a panel driving unit that generates a driving signal to drive the liquid crystal display panel according to a video signal provided by a scaler. The liquid crystal display device further includes a user input unit that adjusts a brightness of a screen displayed on the liquid crystal display panel, and a microcomputer that controls the panel driving unit such that a voltage of the panel driving signal outputted from the panel driving unit can be maintained within a predetermined voltage range, such that a voltage of a panel driving signal inputted to a liquid crystal display panel is maintained at a constant level regardless of the adjustment of brightness, thereby enabling to preventing occurrence of flickering phenomenon.

摘要翻译： 液晶显示装置包括液晶显示面板和面板驱动单元，其根据由缩放器提供的视频信号产生驱动信号以驱动液晶显示面板。 液晶显示装置还包括调节液晶显示​​面板上显示的画面的亮度的用户输入单元和控制面板驱动单元的微型计算机，使得从面板驱动单元输出的面板驱动信号的电压 可以保持在预定电压范围内，使得输入到液晶显示面板的面板驱动信号的电压维持在恒定水平，而与亮度的调节无关，从而能够防止发生闪烁现象。

公开(公告)号：US20060007089A1

公开(公告)日：2006-01-12

申请号：US11214787

申请日：2005-08-31

申请人： Seung-Woo Lee ,  Jong-Seon Kim ,  Su-Hyun Kwon

发明人： Seung-Woo Lee ,  Jong-Seon Kim ,  Su-Hyun Kwon

IPC分类号： G09G3/36

CPC分类号： G09G3/3607 ,  G09G3/2055 ,  G09G2320/0276

摘要： A liquid crystal display includes a liquid crystal display panel for displaying picture images, and a color correction unit. Upon receipt of raw RGB picture data corresponding to raw RGB gamma curves, the color correction unit generates corrected RGB picture data based on values over a predetermined imaginative gamma curve established in accordance with the characteristic of the liquid crystal display panel. The color correction unit stores values over corrected RGB gamma curves corresponding to the corrected picture data, and gamma-corrects the raw RGB picture data based on values over the stored corrected RGB gamma curves, thereby displaying the picture images.

公开(公告)号：US20120299974A1

公开(公告)日：2012-11-29

申请号：US13439388

申请日：2012-04-04

申请人： Yong-Yun Park ,  Jong-Seon Kim ,  Ki-Joon Kim ,  Min-Hwa Jang

发明人： Yong-Yun Park ,  Jong-Seon Kim ,  Ki-Joon Kim ,  Min-Hwa Jang

IPC分类号： G09G5/10

CPC分类号： G09G3/2096 ,  G09G3/3688 ,  G09G5/363 ,  G09G2230/00 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/0294 ,  G09G2320/103 ,  G09G2330/04 ,  G09G2340/02 ,  G09G2340/16 ,  G09G2360/18

摘要： A timing controller that includes a noise detection circuit and a setting control unit. The noise detection circuit includes a detection unit and a reset signal generating unit. The detection unit outputs a detection signal having a first logic level based on at least one of a plurality of reference data toggling asynchronous with a clock signal. The reset signal generating unit outputs a reset signal having a second logic level based on the detection signal. The setting control unit stores setting data and initializes the setting data in response to the reset signal having the first logic level, and the setting data are used to process red, green and blue (RGB) image data.

摘要翻译： 包括噪声检测电路和设定控制单元的定时控制器。 噪声检测电路包括检测单元和复位信号生成单元。 检测单元基于多个参考数据中的至少一个输出具有与时钟信号异步的第一逻辑电平的检测信号。 复位信号生成单元基于检测信号输出具有第二逻辑电平的复位信号。 设置控制单元存储设置数据并响应于具有第一逻辑电平的复位信号来初始化设置数据，并且设置数据用于处理红，绿和蓝（RGB）图像数据。

公开(公告)号：US08175164B2

公开(公告)日：2012-05-08

申请号：US11469558

申请日：2006-09-01

申请人： Bom-Yun Kim ,  Jong-Seon Kim ,  Shi-Hwa Lee ,  Sang-Jo Lee

发明人： Bom-Yun Kim ,  Jong-Seon Kim ,  Shi-Hwa Lee ,  Sang-Jo Lee

IPC分类号： H04N7/12

CPC分类号： H04N19/42 ,  H04N19/12 ,  H04N19/13 ,  H04N19/136 ,  H04N19/18 ,  H04N19/60

摘要： A device for data compression includes a domain transformer unit, a classifying unit, a variable length encoder, a fixed length encoder and a memory unit. The domain transformer unit transforms time-domain data into frequency-domain data. The classifying unit determines an encoding type of the frequency-domain data based on occurrence probability of the frequency-domain data. The variable length encoder encodes first frequency-domain data that are determined to be encoded by variable length coding. The fixed length encoder encodes second frequency-domain data that are determined to be encoded by fixed length coding. The memory unit stores the encoded first and second frequency-domain data by relocating the encoded first and second frequency-domain data such that the encoded first frequency-domain data are placed adjacently and the encoded second frequency-domain data are placed adjacently. Therefore, the time for decoding the corresponding data may be reduced.

摘要翻译： 用于数据压缩的装置包括域变换器单元，分类单元，可变长度编码器，固定长度编码器和存储器单元。 域变换器单元将时域数据转换为频域数据。 分类单元基于频域数据的发生概率来确定频域数据的编码类型。 可变长度编码器对被确定为通过可变长度编码进行编码的第一频域数据进行编码。 固定长度编码器编码被确定为由固定长度编码编码的第二频域数据。 存储器单元通过重新定位编码的第一和第二频域数据来存储经编码的第一和第二频域数据，使得编码的第一频域数据相邻放置，并且编码的第二频域数据被相邻地放置。 因此，可以减少对相应数据进行解码的时间。

公开(公告)号：US08122334B2

公开(公告)日：2012-02-21

申请号：US11829583

申请日：2007-07-27

申请人： Young-Hun Lee ,  Jae-Youl Lee ,  Jong-Seon Kim ,  Kyung-Suc Nah

发明人： Young-Hun Lee ,  Jae-Youl Lee ,  Jong-Seon Kim ,  Kyung-Suc Nah

IPC分类号： G06F11/10 ,  G06F11/28

CPC分类号： H04L1/0061

摘要： A parity error detecting circuit includes a first operation unit, a second operation unit, and a shift register. The first operation unit receives a serial data signal and a first signal, performs a logic operation on the two received signals, and outputs the result of the logic operation as the first signal in response to a first clock signal. The shift register shifts the first signal in response to the first clock signal and outputs a second signal. The second operation unit receives the first signal and the second signal, performs a logic operation on the two received signals, and outputs the result of the logic operation in response to a second clock signal.

摘要翻译： 奇偶校验错误检测电路包括第一操作单元，第二操作单元和移位寄存器。 第一操作单元接收串行数据信号和第一信号，对两个接收信号执行逻辑运算，并且响应于第一时钟信号输出逻辑运算的结果作为第一信号。 移位寄存器响应于第一时钟信号移位第一信号并输出​​第二信号。 第二操作单元接收第一信号和第二信号，对两个接收信号执行逻辑运算，并且响应于第二时钟信号输出逻辑运算的结果。