公开(公告)号：US06651172B1

公开(公告)日：2003-11-18

申请号：US09321842

申请日：1999-05-28

Applicant: Ching Yu ,  Jeffrey Dwork ,  John Chiang ,  Hung-Duy Vo

Inventor： Ching Yu ,  Jeffrey Dwork ,  John Chiang ,  Hung-Duy Vo

IPC: G06F900

CPC classification number: G06F9/4411

Abstract: A novel method is provided for initializing a data processing system having registers programmable with configuration data read from a non-volatile memory at power-up. The method includes segmenting the non-volatile memory into a first portion for storing first data, and a second portion for storing second data having lower priority than the first data. The first portion is smaller than the second portion. The first data are read from the first portion to program a first group of registers. Thereafter, the second data are read from the second portion to program a second group of registers. As a result, a host is enabled to access the first group of registers, while the second data are being read from the second memory portion.

Abstract translation: 提供一种新颖的方法来初始化具有可编程的寄存器的数据处理系统，该寄存器在上电时从非易失性存储器读取的配置数据可编程。 该方法包括将非易失性存储器分割成用于存储第一数据的第一部分，以及用于存储具有比第一数据优先级低的第二数据的第二部分。 第一部分小于第二部分。 从第一部分读取第一数据以对第一组寄存器进行编程。 此后，从第二部分读取第二数据以编程第二组寄存器。 结果，主机能够访问第一组寄存器，而第二数据正在从第二存储器部分读取。

公开(公告)号：US06542512B1

公开(公告)日：2003-04-01

申请号：US09346745

申请日：1999-07-02

Applicant: Jenny Liu Fischer ,  Ching Yu ,  Jerry Chun-Jen Kuo ,  Po-Shen Lai ,  Autumn Jane Niu ,  Ian Lam

Inventor： Jenny Liu Fischer ,  Ching Yu ,  Jerry Chun-Jen Kuo ,  Po-Shen Lai ,  Autumn Jane Niu ,  Ian Lam

IPC: H04L1228

CPC classification number: H04L49/901 ,  H04L47/50 ,  H04L49/3027 ,  H04L49/351 ,  H04L49/90

Abstract: A network switch in a packet switched network includes a plurality of network switch ports, each configured for sending and receiving data packets between a medium interface and the network switch. The network switch port includes an IEEE 802.3 compliant transmit state machine and receive state machine configured for transmitting and receiving network data to and from a medium interface, such as a reduced medium independent interface, respectively. The network switch port also includes a memory management unit configured for selectively transferring the network data between the transmit and receive state machines and a random access transmit buffer and a random access receive buffer, respectively. The transmit state machine outputs a flush transmit buffer signal to the transmit memory management unit in response to a detected error in transmitting the transmit data. The transmit memory management unit, in response to the flush transmit buffer signal, sets an incremented transmit buffer pointer value to a buffer pointer value corresponding to a next transmit data stored in the transmit buffer.

Abstract translation: 分组交换网络中的网络交换机包括多个网络交换机端口，每个网络交换机端口被配置为在介质接口和网络交换机之间发送和接收数据分组。 网络交换机端口包括符合IEEE 802.3标准的传输状态机和接收状态机，其配置用于分别向介质接口（例如简化介质独立接口）发送和接收网络数据。 网络交换机端口还包括配置用于分别在发送和接收状态机与随机接入发送缓冲器和随机接入接收缓冲器之间选择性地传送网络数据的存储器管理单元。 发送状态机响应于发送发送数据中检测到的错误，向发送存储器管理单元输出清空发送缓冲器信号。 发送存储器管理单元响应于刷新发送缓冲器信号，将增加的发送缓冲器指针值设置为对应于存储在发送缓冲器中的下一个发送数据的缓冲器指针值。

公开(公告)号：US06504846B1

公开(公告)日：2003-01-07

申请号：US09315724

申请日：1999-05-21

Applicant: Ching Yu ,  Xiaohua Zhuang ,  Bahadir Erimli

Inventor： Ching Yu ,  Xiaohua Zhuang ,  Bahadir Erimli

IPC: H04L1256

CPC classification number: H04L47/15 ,  H04L49/30 ,  H04L49/3027 ,  H04L49/351 ,  H04L49/90

Abstract: A method and apparatus are disclosed for reclaiming frame buffers used to store data frames received by a network switch. The apparatus includes a multicopy queue for queuing entries corresponding to received data frames which must be transmitted by multiple output ports of the network switch, a free buffer queue for queuing frame pointers that identify locations in an external memory where reclaimed frame buffers are located, and a multicopy circuit that retrieves entries from the multicopy queue and determines if all copies of a received data frame have been transmitted by the specified output ports. The multicopy circuit also reclaims one or more frame buffers, based on the size of the received data frame. The present invention allows efficient reclaiming of frame buffers regardless of whether the received data frame is stored in a single frame buffer or multiple frame buffers.

Abstract translation: 公开了用于回收用于存储由网络交换机接收的数据帧的帧缓冲器的方法和装置。 该装置包括用于排队对应于必须由网络交换机的多个输出端口发送的数据帧的条目的多拷贝队列，用于排队识别在回收的帧缓冲器所在的外部存储器中的位置的空闲缓冲器队列，以及 多拷贝电路，从多拷贝队列检索条目，并确定接收的数据帧的所有副本是否已由指定的输出端口发送。 多拷贝电路还基于接收的数据帧的大小回收一个或多个帧缓冲器。 本发明允许帧缓冲器的有效回收，而不管接收的数据帧是存储在单个帧缓冲器还是多个帧缓冲器中。

公开(公告)号：US06477170B1

公开(公告)日：2002-11-05

申请号：US09315974

申请日：1999-05-21

Applicant: Jing Lu ,  Ching Yu

Inventor： Jing Lu ,  Ching Yu

IPC: H04L1240

CPC classification number: H04L49/40

Abstract: A method and apparatus for interfacing a central processing unit to a network switch with an external memory that transfers data to the network switch at a different clock speed than transfers of data to the central processing unit provides an interlocking mechanism to prevent overwriting of data and underflows from occurring. The interlocking of the state machines, accomplished by the idling and advancing of a processor state machine and an external memory state machine, prevents either one of the separate state machines from outrunning the other state machine.

Abstract translation: 用于将中央处理单元与网络交换机接口的方法和装置与外部存储器进行通信，该外部存储器以与将数据传送到中央处理单元不同的时钟速度将数据传送到网络交换机提供互锁机制，以防止覆盖数据和下溢 从发生。 通过处理器状态机和外部存储器状态机的空转和前进完成的状态机的联锁防止了单独的状态机中的任一个超出其他状态机。

公开(公告)号：US06463542B1

公开(公告)日：2002-10-08

申请号：US09321834

申请日：1999-05-28

Applicant: Ching Yu ,  Jerry Chun-Jen Kuo ,  Jeffrey Dwork ,  Din-I Tsai

Inventor： Ching Yu ,  Jerry Chun-Jen Kuo ,  Jeffrey Dwork ,  Din-I Tsai

IPC: G06F100

CPC classification number: G06F1/3209

Abstract: A novel method of power management is provided in a computer system having a network interface module including a buffer memory and a MAC block. The method includes determining whether the system is inactive during a predetermined time period. If so, activity of the MAC block is checked. If the MAC block is idle, the status of the buffer memory is determined. The system is placed into a power-down mode if the buffer memory is empty.

Abstract translation: 在具有包括缓冲存储器和MAC块的网络接口模块的计算机系统中提供了一种新颖的电源管理方法。 该方法包括在预定时间段内确定系统是否不活动。 如果是，则检查MAC块的活动。 如果MAC块空闲，则确定缓冲存储器的状态。 如果缓冲存储器为空，则将系统置于掉电模式。

公开(公告)号：US06041328A

公开(公告)日：2000-03-21

申请号：US992619

申请日：1997-12-17

Applicant: Ching Yu

Inventor： Ching Yu

IPC: H04L12/56 ,  G06F17/30

CPC classification number: H04L49/9047 ,  H04L49/90 ,  H04L49/901

Abstract: The present invention keeps track of available elements in a list of elements available to a given device for processing from an index and count mechanism. Such an index and count mechanism provides an index that indicates a starting element in the list of elements that is available to the given device for processing. Such an index and count mechanism also provides a count that indicates a subsequent number of elements, from the starting element in the list of elements, that are available to the given device for processing. A first index register and a second index register alternately keep track of a last available element in the list of elements available to be processed by the given device until the last available element is a very last element in the list of elements. In addition, the first index register and the second index register also alternately keep track of a current element, in the list of elements, that is currently being processed by the given device until the very last element in the list of elements has been processed by the given device. By thus alternating between the first and second index registers for keeping track of the last available element and by thus alternating between the first and second index registers for keeping track of the currently processed element, processing through multiple cycles of the list of elements may be kept track of in a simple manner. The present invention may be used to particular advantage when the given device is a computer network peripheral device that processes descriptors within a shared memory of a host computer system.

Abstract translation: 本发明在索引和计数机制中跟踪给定设备可用的元素列表中的可用元素以进行处理。 这样的索引和计数机制提供了一个索引，该索引指示给定设备可用于处理的元素列表中的起始元素。 这样的索引和计数机制还提供了一个计数，其指示从给定设备可用于处理的元素列表中的起始元素的后续数量的元素。 第一索引寄存器和第二索引寄存器交替地跟踪可用于由给定设备处理的元素的列表中的最后可用元素，直到最后一个可用元素是元素列表中的最后一个元素。 此外，第一索引寄存器和第二索引寄存器还交替地跟踪当前由给定设备处理的元素列表中的当前元素，直到元素列表中的最后一个元素已经被处理 给定的设备。 通过这样在第一和第二索引寄存器之间交替以便跟踪最后一个可用元素，并且通过在第一和第二索引寄存器之间交替来跟踪当前处理的元件，可以保持元素列表的多个周期的处理 轨道以简单的方式。 当给定设备是处理主计算机系统的共享存储器内的描述符的计算机网络外围设备时，本发明可以被用于特别的优点。

公开(公告)号：US08131895B2

公开(公告)日：2012-03-06

申请号：US12754495

申请日：2010-04-05

Applicant: Steven L. Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

Inventor： Steven L. Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

IPC: G06F5/00 ,  H03K19/00

CPC classification number: G06F13/24 ,  G06F13/385 ,  G06F13/4282

Abstract: Method of managing interaction between a host subsystem and a peripheral device. Roughly described, the peripheral device writes an event into an individual event queue, and in conjunction therewith, also writes a wakeup event into an intermediary event queue. The wakeup event identifies the individual event queue. The host subsystem, in response to retrieval of the wakeup event from the intermediary event queue, activates an individual event handler to consume events from the individual event queue.

Abstract translation: 管理主机子系统和外围设备之间的交互的方法。 粗略描述，外围设备将事件写入单个事件队列中，并且与之结合，还将唤醒事件写入中间事件队列。 唤醒事件标识单个事件队列。 响应于从中间事件队列检索唤醒事件，主机子系统激活单个事件处理程序以从各个事件队列消耗事件。

公开(公告)号：US07769923B2

公开(公告)日：2010-08-03

申请号：US11050476

申请日：2005-02-03

Applicant: Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

Inventor： Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts

IPC: G06F3/00 ,  G06F13/28

CPC classification number: G06F13/24 ,  G06F13/385 ,  G06F13/4282

Abstract: Method of managing interaction between a host subsystem and a peripheral device. Roughly described, the peripheral device writes an event into an individual event queue, and in conjunction therewith, also writes a wakeup event into an intermediary event queue. The wakeup event identifies the individual event queue. The host subsystem, in response to retrieval of the wakeup event from the intermediary event queue, activates an individual event handler to consume events from the individual event queue.

Abstract translation: 管理主机子系统和外围设备之间的交互的方法。 粗略描述，外围设备将事件写入单个事件队列中，并且与之结合，还将唤醒事件写入中间事件队列。 唤醒事件标识单个事件队列。 响应于从中间事件队列检索唤醒事件，主机子系统激活单独的事件处理程序以从各个事件队列消耗事件。

公开(公告)号：US07596644B2

公开(公告)日：2009-09-29

申请号：US11329444

申请日：2006-01-11

Applicant: Ching Yu ,  David Riddoch ,  Steve Pope ,  John Mingyung Chiang ,  Alok Singh ,  Derek Roberts

Inventor： Ching Yu ,  David Riddoch ,  Steve Pope ,  John Mingyung Chiang ,  Alok Singh ,  Derek Roberts

IPC: G06F3/00

CPC classification number: G06F13/28

Abstract: System and method of a pace engine for governing the different transmission rates tailored for different connections by rate pacing a plurality of queues are described. Roughly described, the pace engine includes a binning controller for receiving queues from a transmit DMA queue manager and determines the earliest allowed time for a particular queue that is stored and paced in a Work Bin, a Fast Bin, or a Slow Bin. A pace table stores information about the minimum inter-packet-gap for each connection that is coupled to the transmit DMA queue manager. A timer is coupled to the binning controller with a multi-bit continuous counter that increments at a predetermined time unit and wraps around after a predetermined amount of time.

Abstract translation: 描述了用于通过速率起搏多个队列来为不同连接量身定制的不同传输速率的步调引擎的系统和方法。 粗略地描述，速度引擎包括用于从发送DMA队列管理器接收队列的分档控制器，并且确定在工作仓，快速仓或慢速仓中存储和起搏的特定队列的最早允许时间。 步速表存储关于耦合到发送DMA队列管理器的每个连接的最小间隔间隔的信息。 定时器与具有多位连续计数器的分箱控制器耦合，该计数器以预定时间单位递增并在预定时间量之后卷绕。

公开(公告)号：US07562366B2

公开(公告)日：2009-07-14

申请号：US11050483

申请日：2005-02-03

Applicant: Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts ,  John Mingyung Chiang

Inventor： Steve Pope ,  David Riddoch ,  Ching Yu ,  Derek Roberts ,  John Mingyung Chiang

IPC: G06F3/00 ,  G06F9/44 ,  G06F9/46 ,  G06F13/00

CPC classification number: H04L49/9047 ,  H04L49/90 ,  H04L49/901

Abstract: Method for managing a data transmit queue, for use with a host and a network interface device. Roughly described, the host writes data buffer descriptors into a transmit descriptor queue, and the network interface device writes events to notify the host when it has completed processing of a transmit data buffer. Each of the transmit completion event descriptors notify the host of completion of a plurality of the transmit data buffers.

Abstract translation: 用于管理与主机和网络接口设备一起使用的数据传输队列的方法。 大致描述，主机将数据缓冲区描述符写入发送描述符队列，并且网络接口设备写入事件以在完成处理发送数据缓冲区时通知主机。 每个发送完成事件描述符通知主机多个发送数据缓冲器的完成。