公开(公告)号：US20110149189A1

公开(公告)日：2011-06-23

申请号：US13039378

申请日：2011-03-03

申请人： Munehiro Azami ,  Shou Nagao ,  Yoshifumi Tanada

发明人： Munehiro Azami ,  Shou Nagao ,  Yoshifumi Tanada

IPC分类号： G02F1/136

CPC分类号： H01L29/786 ,  H03K19/01714 ,  H03K19/01721

摘要： There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node α into a floating state. When the node α is in the floating state, a potential of the node α is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.

摘要翻译： 提供了一种半导体器件，其中可以通过仅使用一种导电类型的TFT构成电路并且可以正常获得输出信号的电压振幅来减小制造步骤。 电容（205）设置在连接到输出节点的TFT（203）的栅极和源极之间，并且由TFT（201）和（202）形成的电路具有使节点α成为浮置状态的功能 。 当节点α处于浮置状态时，通过使用TFT（203）通过电容（205）的栅源电容耦合，使节点α的电位高于VDD，因此具有VDD的幅度的输出信号 通常可以获得-GND，而不会由于TFT的阈值引起振幅衰减。

公开(公告)号：US20060061384A1

公开(公告)日：2006-03-23

申请号：US11270647

申请日：2005-11-10

申请人： Munehiro Azami ,  Shou Nagao ,  Yoshifumi Tanada

发明人： Munehiro Azami ,  Shou Nagao ,  Yoshifumi Tanada

IPC分类号： H03K19/0175

CPC分类号： H01L29/786 ,  H03K19/01714 ,  H03K19/01721

摘要： There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node α into a floating state. When the node α is in the floating state, a potential of the node α is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.

摘要翻译： 提供了一种半导体器件，其中可以通过仅使用一种导电类型的TFT构成电路并且可以正常获得输出信号的电压振幅来减小制造步骤。 电容（205）设置在连接到输出节点的TFT（203）的栅极和源极之间，并且由TFT（201）和（202）形成的电路具有使节点α成为浮置状态的功能 。 当节点α处于浮置状态时，通过使用TFT（203）通过电容（205）的栅 - 源电容耦合，使得节点α的电位高于VDD，因此具有VDD的幅度的输出信号 通常可以获得-GND，而不会由于TFT的阈值引起振幅衰减。

公开(公告)号：US06646476B2

公开(公告)日：2003-11-11

申请号：US10145033

申请日：2002-05-15

申请人： Shou Nagao ,  Munehiro Azami ,  Yoshifumi Tanada

发明人： Shou Nagao ,  Munehiro Azami ,  Yoshifumi Tanada

IPC分类号： H01L21228

摘要： A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD−V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1 becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3 becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD. When SP becomes low level; CK3 becomes low level; and CK1 becomes high level, the potential at the signal output section (Out) becomes low level again.

公开(公告)号：US20060066530A1

公开(公告)日：2006-03-30

申请号：US11211075

申请日：2005-08-25

申请人： Munehiro Azami ,  Yoshifumi Tanada

发明人： Munehiro Azami ,  Yoshifumi Tanada

IPC分类号： G09G3/30

CPC分类号： G09G3/3266 ,  G09G3/2022 ,  G09G3/3258 ,  G09G2300/0809 ,  G09G2300/0838 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2310/0251 ,  G09G2320/043

摘要： A pixel having a structure in which low voltage drive is possible is provided by a simple process. A digital image signal input from a source signal line is input to the pixel through a switching TFT. At this point, a voltage compensation circuit amplifies the voltage amplitude of the digital image signal or transforms the amplitude, and applies the result to a gate electrode of a driver TFT. On-off control of TFTs within the pixel can thus be performed normally even if the voltage of a power source for driving gate signal lines becomes lower.

公开(公告)号：US07649516B2

公开(公告)日：2010-01-19

申请号：US11211075

申请日：2005-08-25

申请人： Munehiro Azami ,  Yoshifumi Tanada

发明人： Munehiro Azami ,  Yoshifumi Tanada

IPC分类号： G09G3/36 ,  G09G3/30

CPC分类号： G09G3/3266 ,  G09G3/2022 ,  G09G3/3258 ,  G09G2300/0809 ,  G09G2300/0838 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2310/0251 ,  G09G2320/043

摘要： A pixel having a structure in which low voltage drive is possible is provided by a simple process. A digital image signal input from a source signal line is input to the pixel through a switching TFT. At this point, a voltage compensation circuit amplifies the voltage amplitude of the digital image signal or transforms the amplitude, and applies the result to a gate electrode of a driver TFT. On-off control of TFTs within the pixel can thus be performed normally even if the voltage of a power source for driving gate signal lines becomes lower.

摘要翻译： 通过简单的处理提供具有可以进行低电压驱动的结构的像素。 从源极信号线输入的数字图像信号通过开关TFT输入到像素。 此时，电压补偿电路放大数字图像信号的电压振幅或变换振幅，并将结果施加到驱动TFT的栅电极。 即使用于驱动栅极信号线的电源的电压变低，因此也可以正常地进行像素内的TFT的开关控制。

公开(公告)号：US06958750B2

公开(公告)日：2005-10-25

申请号：US10198753

申请日：2002-07-16

申请人： Munehiro Azami ,  Yoshifumi Tanada

发明人： Munehiro Azami ,  Yoshifumi Tanada

IPC分类号： G02F1/136 ,  G09G3/20 ,  G09G3/32 ,  H09G5/00

CPC分类号： G09G3/3266 ,  G09G3/2022 ,  G09G3/3258 ,  G09G2300/0809 ,  G09G2300/0838 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2310/0251 ,  G09G2320/043

摘要： A pixel having a structure in which low voltage drive is possible is provided by a simple process. A digital image signal input from a source signal line is input to the pixel through a switching TFT. At this point, a voltage compensation circuit amplifies the voltage amplitude of the digital image signal or transforms the amplitude, and applies the result to a gate electrode of a driver TFT. On-off control of TFTs within the pixel can thus be performed normally even if the voltage of a power source for driving gate signal lines becomes lower.

摘要翻译： 通过简单的处理提供具有可以进行低电压驱动的结构的像素。 从源极信号线输入的数字图像信号通过开关TFT输入到像素。 此时，电压补偿电路放大数字图像信号的电压振幅或变换振幅，并将结果施加到驱动TFT的栅电极。 即使用于驱动栅极信号线的电源的电压变低，因此也可以正常地进行像素内的TFT的开关控制。

公开(公告)号：US20050062515A1

公开(公告)日：2005-03-24

申请号：US10958568

申请日：2004-10-06

申请人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

发明人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

IPC分类号： G02F1/1345 ,  G02F1/133 ,  G02F1/1368 ,  G06F1/04 ,  G09G3/20 ,  G09G3/36 ,  G11C19/00 ,  G11C19/28 ,  H01L51/50 ,  H03K3/013 ,  H03K3/353 ,  H03K17/00 ,  H03K17/693 ,  H03K19/0175 ,  H03L5/00 ,  H05B33/14

CPC分类号： G11C19/28 ,  G09G3/3688 ,  G09G2310/0275 ,  G11C19/00

摘要： A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node α is raised. When the potential of the node α reaches (VDD−VthN), the node α becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105. An output at the subsequent stage is then inputted to a TFT 103 to turn the TFT 103 ON, while the potential of the node α of TFTs 102 and 106 is dropped to turn the TFT 105 OFF. As a result, the potential of the output node becomes Low level.

摘要翻译： 一种显示装置的驱动电路，其包括单导电类型的TFT并输出具有正常振幅的输出信号。 一个脉冲被输入到TFT101和104，使TFT导通，并且提高节点α的电位。 当节点α的电位达到（VDD-VthN）时，节点α变为浮动状态。 因此，随着时钟信号变为高电平，TFT 105导通，输出节点的电位升高。 另一方面，随着输出节点的电位升高，由于电容装置107的操作，TFT 105的栅电极的电位进一步上升，使得TFT 105的栅电极的电位变为 高于（VDD + VthN）。 因此，输出节点的电位升高到VDD，而不会由于TFT 105的阈值电压引起电压降。然后，后级的输出被输入到TFT103，使TFT103导通，同时电位 的TFT102和106的节点α的下降以使TFT 105关闭。 结果，输出节点的电位变为低电平。

公开(公告)号：US07116748B2

公开(公告)日：2006-10-03

申请号：US10958568

申请日：2004-10-06

申请人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

发明人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3688 ,  G09G2310/0275 ,  G11C19/00

摘要： A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node α is raised. When the potential of the node α reaches (VDD−VthN), the node α becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105. An output at the subsequent stage is then inputted to a TFT 103 to turn the TFT 103 ON, while the potential of the node α of TFTs 102 and 106 is dropped to turn the TFT 105 OFF. As a result, the potential of the output node becomes Low level.

摘要翻译： 一种显示装置的驱动电路，其包括单导电类型的TFT并输出具有正常振幅的输出信号。 一个脉冲被输入到TFT101和104，使TFT导通，并且提高节点α的电位。 当节点α的电位达到（VDD-VthN）时，节点α变为浮动状态。 因此，随着时钟信号变为高电平，TFT 105导通，输出节点的电位升高。 另一方面，随着输出节点的电位升高，由于电容装置107的操作，TFT 105的栅电极的电位进一步上升，使得TFT 105的栅电极的电位变为 高于（VDD + VthN）。 因此，输出节点的电位升高到VDD，而不会由于TFT 105的阈值电压引起电压降。然后，后级的输出被输入到TFT103，使TFT103导通，同时电位 的TFT102和106的节点α的下降以使TFT 105关闭。 结果，输出节点的电位变为低电平。

公开(公告)号：US20050116914A1

公开(公告)日：2005-06-02

申请号：US10999176

申请日：2004-11-30

申请人： Shou Nagao ,  Hajime Kimura ,  Aya Anzai ,  Yu Yamazaki ,  Mitsuaki Osame ,  Yoshifumi Tanada

发明人： Shou Nagao ,  Hajime Kimura ,  Aya Anzai ,  Yu Yamazaki ,  Mitsuaki Osame ,  Yoshifumi Tanada

IPC分类号： G09G3/20 ,  G09G3/32 ,  H01L27/32 ,  G09G3/36

CPC分类号： G09G3/32 ,  G09G3/2022 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2310/0251 ,  G09G2310/0256 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2320/043 ,  G09G2330/08 ,  H01L27/3244 ,  H01L2251/5323

摘要： The invention provides a display device with high image quality and high definition, a driving method thereof and an element substrate. Further, the invention provides a display device with improved degradation of a light emitting element, a driving method thereof and an element substrate. The display device of the invention has a first transistor, a second transistor, a third transistor, a light emitting element, a source driver, a first gate driver, and a second gate driver. A gate electrode of the first transistor is connected to a gate line, one of a source electrode and a drain electrode thereof is connected to a source line and the other is connected to a gate electrode of the third transistor. The light emitting element, the second transistor and the third transistor are connected in series between a first power source and a second power source. A gate electrode of the second transistor is connected to a third power source, the source driver is connected to the source line, and the first gate driver and the second gate driver are connected to the gate line.

摘要翻译： 本发明提供了具有高图像质量和高清晰度的显示装置，其驱动方法和元件基板。 此外，本发明提供一种具有改善的发光元件劣化的显示装置，其驱动方法和元件基板。 本发明的显示装置具有第一晶体管，第二晶体管，第三晶体管，发光元件，源极驱动器，第一栅极驱动器和第二栅极驱动器。 第一晶体管的栅电极连接到栅极线，源极和漏极之一连接到源极线，而另一个连接到第三晶体管的栅电极。 发光元件，第二晶体管和第三晶体管串联连接在第一电源和第二电源之间。 第二晶体管的栅电极连接到第三电源，源极驱动器连接到源极线，第一栅极驱动器和第二栅极驱动器连接到栅极线。

公开(公告)号：US20060280279A1

公开(公告)日：2006-12-14

申请号：US11467022

申请日：2006-08-24

申请人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

发明人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3688 ,  G09G2310/0275 ,  G11C19/00

摘要： A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node α is raised. When the potential of the node α reaches (VDD−VthN), the node α becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105. An output at the subsequent stage is then inputted to a TFT 103 to turn the TFT 103 ON, while the potential of the node α of TFTs 102 and 106 is dropped to turn the TFT 105 OFF. As a result, the potential of the output node becomes Low level.

摘要翻译： 一种显示装置的驱动电路，其包括单导电类型的TFT并输出具有正常振幅的输出信号。 一个脉冲被输入到TFT101和104，使TFT导通，并且提高节点α的电位。 当节点α的电位达到（VDD-VthN）时，节点α变为浮动状态。 因此，随着时钟信号变为高电平，TFT 105导通，输出节点的电位升高。 另一方面，随着输出节点的电位升高，由于电容装置107的操作，TFT 105的栅电极的电位进一步上升，使得TFT 105的栅电极的电位变为 高于（VDD + VthN）。 因此，输出节点的电位升高到VDD，而不会由于TFT 105的阈值电压引起电压降。 然后，随后阶段的输出被输入到TFT 103以使TFT 103导通，同时TFT 102和106的节点α的电位下降以使TFT 105关闭。 结果，输出节点的电位变为低电平。