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公开(公告)号:US20230421154A1
公开(公告)日:2023-12-28
申请号:US18141927
申请日:2023-05-01
发明人: Yu Zhu , Oleksiy Klimashov , Paul T. DiCarlo
IPC分类号: H03K17/693 , H01L29/93 , H03K17/16 , H04B1/44
CPC分类号: H03K17/693 , H01L29/93 , H03K17/161 , H04B1/44
摘要: Described herein are switches with asymmetrical anti-series varactor pairs to improve switching performance. The disclosed switches can include asymmetrical varactor pairs to reduce distortions. The asymmetry in the varactor pairs can be associated with geometry of each varactor in the pair. The disclosed switches can stack both symmetrical and asymmetrical varactor pairs. The disclosed switches with asymmetrical anti-series varactor pairs can be configured to improve both H2 and H3 simultaneously.
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22.
公开(公告)号:US11842947B2
公开(公告)日:2023-12-12
申请号:US17317737
申请日:2021-05-11
IPC分类号: H01L27/12 , H01L23/482 , H01L23/66 , H01L27/02 , H01L29/10 , H01L21/74 , H01L29/786 , H01L29/417 , H04B1/40 , H01L21/8234 , H01L21/8238
CPC分类号: H01L23/482 , H01L21/743 , H01L23/4824 , H01L23/4825 , H01L23/66 , H01L27/0203 , H01L27/0207 , H01L27/1203 , H01L29/1087 , H01L29/41733 , H01L29/78615 , H01L29/78654 , H04B1/40 , H01L21/82385 , H01L21/823456 , H01L2223/6677 , H01L2924/1421
摘要: The fabrication of field-effect transistor (FET) devices is described herein where the FET devices include one or more body contacts implemented between source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. The FET devices can include source fingers and drain fingers interleaved with gate fingers. The source and drain fingers of a first S/G/D assembly can be electrically connected to the source and drain fingers of a second S/G/D assembly. The source fingers and the drain fingers can be arranged in alternating rows.
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公开(公告)号:US11431357B2
公开(公告)日:2022-08-30
申请号:US16946835
申请日:2020-07-08
发明人: Florinel G. Balteanu , Yu Zhu , Paul T. DiCarlo
摘要: Apparatus and methods for envelope controlled radio frequency (RF) switches are provided. In certain embodiments, a power amplifier provides an RF signal to an antenna by way of an RF switch. Additionally, the envelope signal is used not only to control a power amplifier supply voltage of the power amplifier, but also to control a regulated voltage used to turn on the RF switch. For example, a level shifter can use a regulated voltage from charge pump circuitry to turn on the RF switch, and the envelope signal can be provided to the charge pump circuitry and used to control the voltage level of the regulated voltage over time.
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公开(公告)号:US20220231733A1
公开(公告)日:2022-07-21
申请号:US17564033
申请日:2021-12-28
IPC分类号: H04B7/0413 , H04B7/0404 , H04L25/06
摘要: Apparatus and methods for multi-antenna communications are provided. In certain embodiments, a communication system includes an antenna array including a plurality of antenna elements, and a plurality of RF circuit channels each coupled to a corresponding one of the antenna elements. The plurality of RF circuit channels generate two or more analog baseband signals in response to the antenna array receiving a radio wave. The communication system further includes a controllable amplification and combining circuit that generates two or more amplified analog baseband signals based on amplifying each of the two or more analog baseband signals with a separately controllable gain, and that combines the two or more amplified analog baseband signals to generate a combined analog baseband signal.
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公开(公告)号:US11251836B2
公开(公告)日:2022-02-15
申请号:US17035406
申请日:2020-09-28
IPC分类号: H04B7/04 , H04B7/0413 , H04B7/0404 , H04L25/06
摘要: Apparatus and methods for multi-antenna communications are provided. In certain embodiments, a communication system includes an antenna array including a plurality of antenna elements, and a plurality of RF circuit channels each coupled to a corresponding one of the antenna elements. The plurality of RF circuit channels generate two or more analog baseband signals in response to the antenna array receiving a radio wave. The communication system further includes a controllable amplification and combining circuit that generates two or more amplified analog baseband signals based on amplifying each of the two or more analog baseband signals with a separately controllable gain, and that combines the two or more amplified analog baseband signals to generate a combined analog baseband signal.
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公开(公告)号:US20210151582A1
公开(公告)日:2021-05-20
申请号:US17140490
申请日:2021-01-04
发明人: Yun Shi , Paul T. DiCarlo , Hailing Wang
IPC分类号: H01L29/66 , H01L29/78 , H01L21/265 , H01L29/10 , H01L21/8234 , H01L21/84 , H03F1/22 , H01L29/423 , H03F3/195 , H03F3/24
摘要: A method of fabricating a cascode amplifier including a common-source device and a common-gate device includes performing one or more of ion implantation of a well of the common-source device, ion implantation of a source extension and/or drain extension of the common-source device, or a halo ion implantation of the common-source device with one or more of a different ionic species, a different dosage, a different energy, or a different tilt angle than a corresponding one or more of ion implantation of a well of the common-gate device, ion implantation of a source and/or drain extension of the common-gate device, or a halo ion implantation of the common-gate device.
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公开(公告)号:US10812023B2
公开(公告)日:2020-10-20
申请号:US16741512
申请日:2020-01-13
摘要: Disclosed herein are circuits, devices and methods that address challenges associated with power amplifier systems. A power amplifier system includes two or more fast error amplifiers coupled to corresponding power amplifiers. The fast error amplifiers are configured to generate envelope tracking signals based on a signal envelope, the envelope tracking signals modifying a DC-DC regulated voltage from a DC-DC converter to more efficiently operate the power amplifiers. By splitting the envelope tracking between two or more fast error amplifiers and amplification between corresponding two or more power amplifiers, the power, frequency or bandwidth, linearity, signal-to-noise ratio, efficiency, or the like of the power amplifier system can be improved. Wireless communications configurations with such power amplifier systems can provide uplink carrier aggregation and/or cellular signals based on standards and protocols that require increased bandwidth and/or power.
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28.
公开(公告)号:US10763847B2
公开(公告)日:2020-09-01
申请号:US16702477
申请日:2019-12-03
发明人: Hailing Wang , Dylan Charles Bartle , Hanching Fuh , Jerod F. Mason , David Scott Whitefield , Paul T. DiCarlo
摘要: Disclosed herein are switching or other active FET configurations that implement a branch design with one or more interior FETs of a main path coupled in parallel with one or more auxiliary FETs of an auxiliary path. Such designs include a circuit assembly for performing a switching function that includes a branch with a plurality of main FETs coupled in series and an auxiliary FET coupled in parallel with an interior FET of the plurality of main FETs. The body nodes of the FETs can be interconnected and/or connected to a body bias network. The body nodes of the FETs can be connected to body bias networks to enable individual body bias voltages to be used for individual or groups of FETs.
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公开(公告)号:US10574192B2
公开(公告)日:2020-02-25
申请号:US16225912
申请日:2018-12-19
发明人: Yu Zhu , Boshi Jin , Steven Christopher Sprinkle , Florinel G. Balteanu , Oleksiy Klimashov , Dylan Charles Bartle , Paul T. DiCarlo
IPC分类号: H03F1/32 , H04B1/48 , H03F3/24 , H03F3/193 , H03F3/19 , H03F1/02 , H03F3/195 , H03F3/21 , H03F3/45 , H04B1/40 , H04B1/3827 , H04B1/525 , H04W88/02
摘要: A linearization circuit that reduces intermodulation distortion in an amplifier output receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency. The linearization circuit generates an envelope signal based at least in part on a power level of the first signal and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal and the adjusted signal at a second terminal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation products that result from the intermodulation of the first frequency and the second frequency.
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30.
公开(公告)号:US10536116B2
公开(公告)日:2020-01-14
申请号:US16540007
申请日:2019-08-13
摘要: Disclosed herein are circuits, devices and methods that address challenges associated with power amplifier systems. A power amplifier system includes two or more fast error amplifiers coupled to corresponding power amplifiers. The fast error amplifiers are configured to generate envelope tracking signals based on a signal envelope, the envelope tracking signals modifying a DC-DC regulated voltage from a DC-DC converter to more efficiently operate the power amplifiers. By splitting the envelope tracking between two or more fast error amplifiers and amplification between corresponding two or more power amplifiers, the power, frequency or bandwidth, linearity, signal-to-noise ratio, efficiency, or the like of the power amplifier system can be improved. Wireless communications configurations with such power amplifier systems can provide uplink carrier aggregation and/or cellular signals based on standards and protocols that require increased bandwidth and/or power.
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