公开(公告)号：US20180151718A1

公开(公告)日：2018-05-31

申请号：US15830742

申请日：2017-12-04

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Xi-Zong Chen ,  Te-Chih Hsiung ,  Cha-Hsin Chao ,  Yi-Wei Chiu

IPC: H01L29/78 ,  H01L23/535 ,  H01L29/08 ,  H01L29/66 ,  H01L21/027 ,  H01L21/321 ,  H01L21/3105 ,  H01L21/768 ,  H01L21/311

CPC classification number: H01L29/785 ,  H01L21/0273 ,  H01L21/31051 ,  H01L21/31144 ,  H01L21/32115 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/845 ,  H01L23/535 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66795

Abstract: A finFET device and a method of forming are provided. The device includes a transistor comprising a gate electrode and a first source/drain region next to the gate electrode, the gate electrode being disposed over a first substrate. The device also includes a first dielectric layer extending along the first source/drain region, and a second dielectric layer overlying the first dielectric layer. The device also includes a contact disposed in the first dielectric layer and in the second dielectric layer, the contact contacting the gate electrode and the first source/drain region. A first portion of the first dielectric layer extends between the contact and the gate electrode. The contact extends along a sidewall of the first portion of the first dielectric layer and a first surface of the first portion of the first dielectric layer, the first surface of the first portion being farthest from the first substrate.

公开(公告)号：US09837539B1

公开(公告)日：2017-12-05

申请号：US15363273

申请日：2016-11-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Xi-Zong Chen ,  Te-Chih Hsiung ,  Cha-Hsin Chao ,  Yi-Wei Chiu

IPC: H01L21/768 ,  H01L29/78 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/311 ,  H01L21/027 ,  H01L29/66 ,  H01L29/08 ,  H01L23/535

CPC classification number: H01L29/785 ,  H01L21/0273 ,  H01L21/31051 ,  H01L21/31144 ,  H01L21/32115 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/845 ,  H01L23/535 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66795

Abstract: A finFET device and a method of forming are provided. The method includes forming a first dielectric layer over a transistor. The method also includes forming a second dielectric layer over the first dielectric layer. The method also includes forming a first opening in the second dielectric layer to expose at least a portion of a gate electrode of the transistor. The method also includes forming a second opening in the first dielectric layer to expose at least a portion of a source/drain region of the transistor. The second opening is connected to the first opening, and the first opening is formed before the second opening. The method also includes forming an electrical connector in the first opening and the second opening.