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公开(公告)号：US10891717B2
公开(公告)日：2021-01-12
申请号：US16178200
申请日：2018-11-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir Narendra Mody , Shashank Dabral , Jesse Gregory Villarreal, Jr. , William Wallace , Niraj Nandan
Abstract: A method for filtering noise for imaging includes receiving an image frame having position and range data. A filter size divides the frame into filter windows for processing each of the filter windows. For the first pixel, a space to the center pixel and a range difference between this pixel and the center pixel is determined and used for choosing a selected weight from weights in a 2D weight LUT including weighting for space and range difference, a filtered range value is calculated by applying the selected 2D weight to the pixel, and the range, filtered range value and selected 2D weight are summed. The determining, choosing, calculating and summing are repeated for at least the second pixel. A total sum of contributions from the first and second pixel are divided by the sum of selected 2D weights to generate a final filtered range value for the center pixel.
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公开(公告)号：US10747692B2
公开(公告)日：2020-08-18
申请号：US16234508
申请日：2018-12-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir Mody , Niraj Nandan , Hetul Sanghvi , Brian Chae , Rajasekhar Reddy Allu , Jason A. T. Jones , Anthony Lell , Anish Reghunath
Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.
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公开(公告)号：US10366471B2
公开(公告)日：2019-07-30
申请号：US15349609
申请日：2016-11-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Shashank Dabral , Mihir Narendra Mody , Denis Beaudoin , Niraj Nandan , Gang Hua
Abstract: A method of de-mosaicing pixel data from an image processor includes generating a pixel block that includes a plurality of image pixels. The method also includes determining a first image gradient between a first set of pixels of the pixel block and a second image gradient between a second set of pixels of the pixel block. The method also includes determining a first adaptive threshold value based on intensity of a third set of pixels of the pixel block. The pixels of the third set of pixels are adjacent to one another. The method also includes filtering the pixel block in a vertical, horizontal, or neutral direction based on the first and second image gradients and the first adaptive threshold value utilizing a plurality of FIR filters to generate a plurality of component images.
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公开(公告)号：US20190096077A1
公开(公告)日：2019-03-28
申请号：US15879281
申请日：2018-01-24
Applicant: Texas Instruments Incorporated
Inventor： Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: An apparatus and method for geometrically correcting an arbitrary shaped input frame and generating an undistorted output frame. The method includes capturing arbitrary shaped input images with multiple optical devices and processing the images, identifying redundant blocks and valid blocks in each of the images, allocating an output frame with an output frame size and dividing the output frame into regions shaped as a rectangle, programming the apparatus and disabling processing for invalid blocks in each of the regions, fetching data corresponding to each of the valid blocks and storing in an internal memory, interpolating data for each of the regions with stitching and composing the valid blocks for the output frame and displaying the output frame on a display module.
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公开(公告)号：US20190096042A1
公开(公告)日：2019-03-28
申请号：US15927820
申请日：2018-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.
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Patent Agency Ranking
公开(公告)号：US10121231B2
公开(公告)日：2018-11-06
申请号：US15183459
申请日：2016-06-15
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra Mody , Shashank Dabral , Jesse Gregory Villarreal, Jr. , William Wallace , Niraj Nandan
Abstract: A method for filtering noise for imaging includes receiving an image frame having position and range data. A filter size divides the frame into filter windows for processing each of the filter windows. For the first pixel, a space to the center pixel and a range difference between this pixel and the center pixel is determined and used for choosing a selected weight from weights in a 2D weight LUT including weighting for space and range difference, a filtered range value is calculated by applying the selected 2D weight to the pixel, and the range, filtered range value and selected 2D weight are summed. The determining, choosing, calculating and summing are repeated for at least the second pixel. A total sum of contributions from the first and second pixel are divided by the sum of selected 2D weights to generate a final filtered range value for the center pixel.
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公开(公告)号：US09871965B2
公开(公告)日：2018-01-16
申请号：US15183495
申请日：2016-06-15
Applicant: Texas Instruments Incorporated
Inventor： Shashank Dabral , Mihir Narendra Mody , Gang Hua , Anthony Lell , Niraj Nandan , Rajashekhar Allu
CPC classification number: H04N5/23232 , G06T5/008 , G06T2207/20208 , H04N5/2353 , H04N5/2355 , H04N5/2356 , H04N5/265 , H04N5/35572 , H04N5/3675 , H04N9/045 , H04N2201/0084
Abstract: A signal processing chain implements wide dynamic range (WDR) multi-frame processing including receiving raw image signals from a WDR sensor including a plurality of frames including a first frame including first exposure time pixel data and a second frame including second exposure time pixel data. Statistics for camera control are generated including first statistics for the first pixel data and second statistics for the second pixel data. The first and second pixel data are merged using WDR merge algorithm in a WDR merge block which utilizes the first and second statistics to generate a raw higher bit width single frame image. The single frame image is post-processed in post-processing block using at least a defect pixel correction algorithm, and at least a portion of tone mapping is performed on the single frame image after the post-processing to provide an output toned mapped image.
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公开(公告)号：US20150339234A1
公开(公告)日：2015-11-26
申请号：US14583020
申请日：2014-12-24
Applicant: Texas Instruments Incorporated
Inventor： Prashant Dinkar Karandikar , Mihir Mody , Hetul Sanghavi , Vasant Easwaran , Prithvi Y.A. Shankar , Rahul Gulati , Niraj Nandan , Subrangshu Das
IPC: G06F12/08
CPC classification number: G06F12/0862 , G06F3/06 , G06F12/08 , G06F12/0888 , G06F2212/601 , G06F2212/602
Abstract: A system includes first and second processing components, a qualified based splitter component, a first and second configurable cache element and an arbiter component. The first data processing component generates a first request for a first portion of data at a first location within a memory. The second data processing component generates a second request for a second portion of data at a second location within the memory. The qualifier based splitter component routes the first request and the second request based on a qualifier. The first configurable cache element enables or disables prefetching data within a first region of the memory. The second configurable cache element enables or disables prefetching data within a second region of the memory. The arbiter component routes the first request and the second request to the memory.
Abstract translation: 系统包括第一和第二处理组件，基于限定的分离器组件，第一和第二可配置高速缓存元件和仲裁器组件。 第一数据处理组件在存储器内的第一位置处生成对数据的第一部分的第一请求。 第二数据处理组件在存储器内的第二位置产生第二数据部分的第二请求。 基于限定符的分离器组件基于限定符路由第一请求和第二请求。 第一可配置缓存元件启用或禁用在存储器的第一区域内的预取数据。 第二可配置高速缓存元件在存储器的第二区域内启用或禁用预取数据。 仲裁器组件将第一个请求和第二个请求路由到内存。
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公开(公告)号：US20250094221A1
公开(公告)日：2025-03-20
申请号：US18970449
申请日：2024-12-05
Applicant: Texas Instruments Incorporated
Inventor： Kedar Chitnis , Mihir Narendra Mody , Jesse Gregory Villarreal, JR. , Lucas Carl Weaver , Brijesh Jadav , Niraj Nandan
Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement thread scheduling for multithreaded data processing environments are disclosed. Example thread schedulers disclosed herein for a data processing system include a buffer manager to determine availability of respective buffers to be acquired for respective processing threads implementing respective functional nodes of a processing flow, and to identify first ones of the processing threads as stalled due to unavailability of at least one buffer in the respective buffers to be acquired for the first ones of the processing threads. Disclosed example thread schedulers also include a thread execution manager to initiate execution of second ones of the processing threads that are not identified as stalled.
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公开(公告)号：US12244979B2
公开(公告)日：2025-03-04
申请号：US17983905
申请日：2022-11-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Jing-Fei Ren , Hrushikesh Garud , Rajasekhar Allu , Gang Hua , Niraj Nandan , Mayank Mangla , Mihir Narendra Mody
Abstract: Various embodiments disclosed herein relate to defective pixel detection and correction, and more specifically to using threshold functions based on color channels to compare pixel values to threshold values. A method is provided herein that comprises identifying a color channel of an image pixel in a frame and identifying a threshold function based at least on the color channel. The method further comprises applying the threshold function to one or more nearest-neighbor values to obtain a threshold value and determining whether a corresponding sensor pixel is defective based at least on a comparison of the image pixel to the threshold value.
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