公开(公告)号：US20210183844A1

公开(公告)日：2021-06-17

申请号：US16718034

申请日：2019-12-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Wei Cheng ,  Chien-Hsun Lee ,  Chi-Yang Yu ,  Hao-Cheng Hou ,  Hsin-Yu Pan ,  Tsung-Ding Wang

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/538 ,  H01L23/367 ,  H01L21/56 ,  H01L25/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor device, at least one second semiconductor device, at least one dummy die, an encapsulant and a redistribution structure. The first semiconductor device, the at least one second semiconductor device and at least one dummy die are laterally separated from one another, and laterally encapsulated by the encapsulant. A Young's modulus of the at least one dummy die is greater than a Young's modulus of the encapsulant. A sidewall of the at least one dummy die is substantially coplanar with a sidewall of the encapsulant. The redistribution structure is disposed over the encapsulant, and electrically connected to the first semiconductor device and the at least one second semiconductor device.

公开(公告)号：US10957672B2

公开(公告)日：2021-03-23

申请号：US15835466

申请日：2017-12-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Yang Yu ,  Chin-Liang Chen ,  Chien-Hsun Lee ,  Kuan-Lin Ho ,  Yu-Min Liang

IPC: H01L25/065 ,  H01L23/31 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L23/29 ,  H01L25/00 ,  H01L21/66

Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, a second encapsulant, and a plurality of conductive terminals. The first encapsulant is at least disposed between the first die and the second die, and on the second die. The second encapsulant is aside the first die and the second die. The conductive terminals are electrically connected to the first die and the second die through a redistribution layer (RDL) structure. An interface is existed between the first encapsulant and the second encapsulant.

公开(公告)号：US09812410B2

公开(公告)日：2017-11-07

申请号：US14985504

申请日：2015-12-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kuan-Lin Ho ,  Chin-Liang Chen ,  Chi-Yang Yu ,  Yu-Chih Liu

IPC: H01L23/12 ,  H01L23/58 ,  H01L23/00 ,  H01L21/48 ,  H01L23/367 ,  H01L21/78 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L23/585 ,  H01L21/4853 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/17 ,  H01L24/27 ,  H01L24/32 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2924/15311 ,  H01L2924/15313

Abstract: A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a substrate and a die structure formed over the substrate. The semiconductor device structure also includes a lid structure formed over the die structure. The lid structure includes a top portion with a top length and a bottom portion with a bottom length, and the top length is greater than the bottom length. The semiconductor device structure also includes a package layer formed between the lid structure and the die structure, and a sidewall of the bottom portion of the lid structure is not aligned with a sidewall of the die structure.