公开(公告)号：US20110110156A1

公开(公告)日：2011-05-12

申请号：US12910788

申请日：2010-10-23

Applicant: Yoshiyuki KAWASHIMA ,  Takashi Hashimoto

Inventor： Yoshiyuki KAWASHIMA ,  Takashi Hashimoto

IPC: G11C16/04 ,  H01L29/94 ,  H01L21/8242 ,  H01L21/336

CPC classification number: H01L29/792 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/11573 ,  H01L27/11575 ,  H01L28/60 ,  H01L29/42344 ,  H01L29/66833

Abstract: There is provided a technology which can allow a semiconductor chip formed with a nonvolatile memory to be sufficiently reduced in size. There is also provided a technology which can ensure the reliability of the nonvolatile memory. In a memory cell of the present invention, a boost gate electrode is formed over a control gate electrode via an insulating film. The boost gate electrode has the function of boosting a voltage applied to a memory gate electrode through capacitive coupling between the boost gate electrode and the memory gate electrode. That is, during a write operation or an erase operation to the memory cell, a high voltage is applied to the memory gate electrode and, to apply the high voltage to the memory gate electrode, the capacitive coupling using the boost gate electrode is subsidiarily used in the present invention.

Abstract translation: 提供了可以使形成有非易失性存储器的半导体芯片的尺寸充分减小的技术。 还提供了可以确保非易失性存储器的可靠性的技术。 在本发明的存储单元中，通过绝缘膜在升压栅极上形成升压栅电极。 升压栅电极具有通过升压栅电极和存储栅电极之间的电容耦合来提升施加到存储栅电极的电压的功能。 也就是说，在对存储单元的写入操作或擦除操作期间，高电压被施加到存储器栅极，并且为了将高电压施加到存储栅电极，使用升压栅极的电容耦合被辅助地使用 在本发明中。

公开(公告)号：US20100294743A1

公开(公告)日：2010-11-25

申请号：US12864195

申请日：2008-01-31

Applicant: Takashi Hashimoto ,  Koichiro Hattori ,  Takashi Yuzawa ,  Yoshikazu Ukai

Inventor： Takashi Hashimoto ,  Koichiro Hattori ,  Takashi Yuzawa ,  Yoshikazu Ukai

IPC: B23K15/00

CPC classification number: B23H1/022

Abstract: To provide an electric discharge device capable of performing an optimum process that achieves a high-quality process in a satisfactory quality of processing precision and the like. In an electric discharge device that processes a workpiece by electric discharge, a reserve electric-discharge pulse is applied by alternately switching between a positive polarity and a reverse polarity, and a current waveform shape of a main electric-discharge pulse is differentiated corresponding to a polarity of a reserve electric-discharge pulse, to a main electric-discharge pulse to be applied after detecting electric discharge following the reserve electric-discharge pulse. With this arrangement, a processing current shape can be optimized corresponding to an electric discharge characteristic, and thus a high-precision process can be performed.

Abstract translation: 提供一种能够以令人满意的加工精度等进行优质加工的最佳工序的放电装置。 在通过放电处理工件的放电装置中，通过在正极性和反极性之间交替切换来施加保留放电脉冲，并且主放电脉冲的电流波形形状对应于 保留放电脉冲的极性与在保留放电脉冲之后检测到放电后施加的主放电脉冲。 通过这种布置，可以根据放电特性来优化处理电流形状，因此可以进行高精度处理。

公开(公告)号：US20100266049A1

公开(公告)日：2010-10-21

申请号：US12301870

申请日：2007-05-23

Applicant: Takashi Hashimoto ,  Yoshiyuki Wada

Inventor： Takashi Hashimoto ,  Yoshiyuki Wada

IPC: H04N7/12

CPC classification number: H04N19/436 ,  H04N19/156 ,  H04N19/174 ,  H04N19/176 ,  H04N19/44 ,  H04N19/61 ,  H04N19/70

Abstract: An image decoding apparatus pertaining to the present invention includes a plurality of decoders. The image decoding apparatus (i) divides image data to decode into a plurality of pieces of partial data, (ii) acquires attribute information pieces each affecting decoding processing time of a corresponding one of the plurality of pieces of partial data, (iii) determines which of the plurality of decoders is caused to decode which of the plurality of pieces of partial data based on the attribute information pieces on the plurality of pieces of partial data and (iv) causes two or more of the plurality of decoders to decode two or more corresponding pieces of the partial data in parallel.

Abstract translation: 本发明的图像解码装置包括多个解码器。 图像解码装置（i）将图像数据分解为多个部分数据，（ii）获取影响多个部分数据中的相应一个部分数据的解码处理时间的属性信息，（iii）确定 基于多条部分数据上的属性信息，使多个解码器中的哪一个解码多个部分数据中的哪一个，并且（iv）使多个解码器中的两个或更多个解码两个或 更多的对应片段的部分数据并行。

公开(公告)号：US20100239024A1

公开(公告)日：2010-09-23

申请号：US12743033

申请日：2008-11-14

Applicant: Keishi Chikamura ,  Takashi Hashimoto

Inventor： Keishi Chikamura ,  Takashi Hashimoto

IPC: H04N7/12

CPC classification number: H04N19/436 ,  H04N19/44 ,  H04N19/51 ,  H04N19/52 ,  H04N19/61

Abstract: To decode coded pictures each of which has dependencies within the picture, using conventional decoding circuits and without deteriorating the efficiency in parallel processing.An image decoding device (100) includes: a stream segmentation unit (110) which segments a bit stream such that each of the coded pictures are segmented into two areas; and decoding processing units (120, 130) each of which decodes a corresponding one of the two segmented bit streams. The respective decoding processing units (120, 130) include: decoding units (123, 133) each of which generates decoded data including pixel data and control data; transfer determination units (124, 134) each of which determines whether or not the decoded data is referred to in another one of the processing units; data transfer units (125, 135) each of which transfers decoded data to the other processing unit; and decoding determination units (122, 132) each of which determines whether or not the decoded data to be referred to has been obtained. Each of the decoding units (123, 133) decodes a corresponding one of the segmented bit streams when reference decoded data has been obtained.

Abstract translation: 为了解码每个图像中具有依赖性的编码图像，使用传统的解码电路并且不降低并行处理的效率。 图像解码装置（100）包括：流分割单元（110），其分割位流，使得每个编码图像被分割成两个区域; 以及解码处理单元（120,130），每个解码处理单元解码两个分段比特流中的对应的一个。 相应的解码处理单元（120,130）包括：解码单元（123,133），每个解码单元生成包括像素数据和控制数据的解码数据; 转移确定单元（124,134），每个确定单元确定在另一个处理单元中是否参考解码数据; 数据传送单元（125,135），每个数据传送单元将解码的数据传送到另一个处理单元; 以及解码确定单元（122,132），每个解码确定单元确定是否已经获得了要被提及的解码数据。 当已经获得参考解码数据时，解码单元（123,133）中的每一个解码对应的一个分段比特流。

公开(公告)号：US20100133237A1

公开(公告)日：2010-06-03

申请号：US11883999

申请日：2006-10-24

Applicant: Yasuo Onodera ,  Tatsushi Sato ,  Yoshikazu Ukai ,  Takashi Hashimoto ,  Koichiro Hattori ,  Hisashi Yamada

Inventor： Yasuo Onodera ,  Tatsushi Sato ,  Yoshikazu Ukai ,  Takashi Hashimoto ,  Koichiro Hattori ,  Hisashi Yamada

IPC: B23H1/02

CPC classification number: B23H1/022 ,  B23H1/024 ,  B23H7/04

Abstract: A wire-discharge machining apparatus controls a short circuit between a wire electrode and a workpiece and wire-breakage, and makes it easy to improve productivity, by performing power supply control to mix an upper-side power supply state in which a high-frequency pulse voltage is applied from an upper-side power supplying unit, a lower-side power supply state in which the high-frequency pulse voltage is applied from a lower-side power supplying unit, and a both-sides power supply state in which the high-frequency pulse voltage is applied to the wire electrode from both power supplying units in synchronization with each other during a period of electric discharge machining.

Abstract translation: 放线加工装置控制线电极和工件之间的短路以及断线，并且通过进行电源控制来容易地提高生产率，以混合高频率的上侧电源状态 从上侧供电单元施加脉冲电压，从下侧供电单元向其施加高频脉冲电压的下侧电源状态，以及双侧供电状态， 在放电加工期间，高频脉冲电压从两个供电单元同时施加到线电极上。

公开(公告)号：US20100084378A1

公开(公告)日：2010-04-08

申请号：US12445207

申请日：2006-10-24

Applicant: Yasuo Onodera ,  Tatsushi Sato ,  Takashi Hashimoto ,  Hisashi Yamada ,  Koichiro Hattori ,  Yoshikazu Ukai

Inventor： Yasuo Onodera ,  Tatsushi Sato ,  Takashi Hashimoto ,  Hisashi Yamada ,  Koichiro Hattori ,  Yoshikazu Ukai

IPC: B23H1/02

CPC classification number: B23H7/04

Abstract: A machining-energy calculating unit accumulates a discharge current value for each discharge position to calculate a machining energy in a certain time period from the present time to the past time. An energy-distribution changing unit determines the presence or absence of imbalance in the energy by obtaining a machining energy distribution in an up-down direction of the machining gap based on the machining energy, and when there is imbalance, the energy-distribution changing unit produces a new open/close pattern in which a machining energy distribution that eliminates the imbalance. Power feeding is then performed based on the new open/close pattern.

Abstract translation: 加工能量计算单元累积针对每个排出位置的排出电流值，以计算从当前时间到过去时间的一定时间段内的加工能量。 能量分配改变单元通过基于加工能量获得加工间隙的上下方向的加工能量分布来确定能量的不平衡，并且当存在不平衡时，能量分配改变单元 产生新的开/关模式，其中消除不平衡的加工能量分布。 然后基于新的开/关模式进行供电。

公开(公告)号：US20090256193A1

公开(公告)日：2009-10-15

申请号：US12490147

申请日：2009-06-23

Applicant: YASUSHI ISHII ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

Inventor： YASUSHI ISHII ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

IPC: H01L29/792

CPC classification number: H01L27/115 ,  H01L21/823462 ,  H01L27/0629 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L29/6653

Abstract: In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.

Abstract translation: 在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。 控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于 存储器栅极的栅极长度大于1.控制栅极和栅电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是形成的单层结构 同时作为控制栅极的电极材料膜8A。

公开(公告)号：US20090212488A1

公开(公告)日：2009-08-27

申请号：US12320868

申请日：2009-02-06

Applicant: Takashi Hashimoto ,  Toshiyuki Andoh ,  Takashi Hodoshima ,  Seiji Hoshino ,  Hidetaka Noguchi ,  Tatsuhiko Oikawa

Inventor： Takashi Hashimoto ,  Toshiyuki Andoh ,  Takashi Hodoshima ,  Seiji Hoshino ,  Hidetaka Noguchi ,  Tatsuhiko Oikawa

IPC: B65H5/06

CPC classification number: G03G15/1605 ,  G03G15/0131 ,  G03G15/6564 ,  G03G2215/00409 ,  G03G2215/00599 ,  G03G2215/0129 ,  G03G2215/0154 ,  G03G2215/1695

Abstract: A sheet conveying device includes a torque estimation unit that, based upon a first load torque generated at a time that a sheet-like member passes through a first nip between a first driving roller and a first driven roller of an upstream sheet conveying unit, estimates a second load torque generated at a time that the sheet-like member passes through a second nip between a second driving roller and a second driven roller of a downstream sheet conveying unit; and a control unit that controls the driving torque such that the second load torque is counterbalanced by applying a counterbalancing torque in synchronization with a timing of entry of the sheet-like member into the second nip.

Abstract translation: 片材输送装置包括扭矩估计单元，其基于在片状构件通过上游片材输送单元的第一驱动辊和第一从动辊之间的第一辊隙时产生的第一负载扭矩，估计 在片状构件通过下游片材输送单元的第二驱动辊和第二从动辊之间的第二压合时产生的第二负载扭矩; 以及控制单元，其控制驱动转矩，使得通过与片状构件进入第二压区的定时同步地施加平衡转矩来平衡第二负载转矩。

公开(公告)号：US07557005B2

公开(公告)日：2009-07-07

申请号：US11727591

申请日：2007-03-27

Applicant: Yasushi Ishii ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

Inventor： Yasushi Ishii ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

IPC: H01L21/336

CPC classification number: H01L27/115 ,  H01L21/823462 ,  H01L27/0629 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L29/6653

Abstract: In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.

Abstract translation: 在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。 控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于 存储器栅极的栅极长度大于1.控制栅极和栅电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是形成的单层结构 同时作为控制栅极的电极材料膜8A。

公开(公告)号：US07519396B2

公开(公告)日：2009-04-14

申请号：US11182556

申请日：2005-07-15

Applicant: Takashi Hashimoto

Inventor： Takashi Hashimoto

IPC: H04M1/00 ,  H04B7/14 ,  H04B15/00 ,  H01Q21/00

CPC classification number: H01Q3/24 ,  H01Q23/00

Abstract: The integrated circuit package according to the present invention comprises: a plurality of functioning units operable to perform processing on input data and output a result of the processing; a plurality of antenna units each of which is positioned to (i) receive radio-transmitted data from at least another one of the plurality of antenna units by radio and (ii) transmit data to at least another one of the plurality of antenna units by radio; a first switching unit operable to selectively connect output of a first functioning unit, which is one of the plurality of functioning units, and a first antenna unit, which is one of the plurality of antenna units; and a second switching unit operable to selectively connect a second antenna unit, which is positioned to receive the radio-transmitted data from the first antenna unit by radio, and input of a second functioning unit different from the first functioning unit.

Abstract translation: 根据本发明的集成电路封装包括：多个功能单元，用于对输入数据执行处理并输出处理结果; 多个天线单元，每个天线单元定位成（i）通过无线电从多个天线单元中的至少另一个天线单元接收无线电发送的数据;以及（ii）通过以下方式将数据发送到所述多个天线单元中的至少另一个天线单元 无线电; 第一切换单元，其可操作以选择性地连接作为所述多个功能单元中的一个的第一功能单元的输出和作为所述多个天线单元之一的第一天线单元; 以及第二切换单元，其可操作以选择性地连接第二天线单元，所述第二天线单元被定位成通过无线电从第一天线单元接收无线电发送的数据，以及与第一功能单元不同的第二功能单元的输入。