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公开(公告)号：US20070159747A1
公开(公告)日：2007-07-12
申请号：US11615542
申请日：2006-12-22
申请人： Uwe Weder , Korbinian Engl , Holger Sedlak , Bernd Zimek
发明人： Uwe Weder , Korbinian Engl , Holger Sedlak , Bernd Zimek
IPC分类号： H02H3/20
CPC分类号： G06F1/32 , G06F1/08 , G06F1/26 , G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A circuit arrangement including a voltage supply device, which has an output, and that provides a variable supply voltage, a supply-voltage-controlled clock generator, which is coupled to the output of the voltage supply device, and that provides a system clock signal having a variable effective system clock frequency, a circuit section having a supply terminal, which is coupled to the output of the voltage supply device, and a clock input, which receives the system clock signal, and a regulating device that determines a supply-voltage-dependent supply current value and detects the extent to which the supply current value lies within a predetermined current value range, and which is coupled to the voltage supply device such that the supply voltage is regulated based on whether the supply current value lies within the predetermined current value range.
摘要翻译： 一种电路装置，包括电压供应装置，其具有输出并且提供可变电源电压，电源电压控制的时钟发生器，其耦合到电压供应装置的输出，并且提供系统时钟信号 具有可变的有效系统时钟频率，具有耦合到电压供应装置的输出的供电端子的电路部分和接收系统时钟信号的时钟输入端和确定电源电压的调节装置 并且检测供电电流值位于预定电流值范围内的程度，并且耦合到电压供应装置，使得基于供电电流值是否在预定的电流值范围内来调节供电电压 当前值范围。
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22.发明授权公开(公告)号：US07129683B2
公开(公告)日：2006-10-31
申请号：US11335158
申请日：2006-01-18
IPC分类号： G05F1/565
CPC分类号： G05F3/267
摘要： A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage regulator has a second NMOS transistor, which forms a current mirror with the first NMOS transistor. Furthermore, in the case of the voltage regulator, the first NMOS transistor is connected in series with a first PMOS transistor and a third transistor. The second NMOS transistor is likewise connected in series with a second PMOS transistor and a fourth transistor, the control inputs of the first and second PMOS transistors being connected to one another and the control inputs of the third and fourth transistors being connected to a control terminal for setting the magnitude of the partial current to be decoupled.
摘要翻译： 一种电压调节器，具有电流镜，用于使包含第一NMOS晶体管的部分电流作为串联晶体管去耦。 此外，电压调节器具有第二NMOS晶体管，其与第一NMOS晶体管形成电流镜。 此外，在电压调节器的情况下，第一NMOS晶体管与第一PMOS晶体管和第三晶体管串联连接。 第二NMOS晶体管同样与第二PMOS晶体管和第四晶体管串联连接，第一和第二PMOS晶体管的控制输入彼此连接，并且第三和第四晶体管的控制输入连接到控制端 用于设置要解耦的部分电流的大小。
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公开(公告)号：US06762635B2
公开(公告)日：2004-07-13
申请号：US10373891
申请日：2003-02-25
申请人： Michael Bruhnke , Viktor Preis , Uwe Weder
发明人： Michael Bruhnke , Viktor Preis , Uwe Weder
IPC分类号： H03L700
摘要： In accordance with the USB specifications, an accuracy of 0.25% is required for the data transmission rate. To generate a clock signal that allows this accuracy, the invention uses a clock generator unit that does not require a crystal. The clock generator unit includes an internal clock generator, a pulse counter that is connected to the internal clock generator, a pulse number memory, and a pulse filter. The pulse counter counts the number of internally generated clock pulses between two pulses of the synchronization signal, which are transmitted in accordance with the USB specification. The difference between the ascertained pulse number and a nominal pulse number is evaluated and is used for controlling the pulse-suppressing pulse filter. This results in a stabilized clock signal.
摘要翻译： 根据USB规格，数据传输速率需要0.25％的精度。 为了产生允许该精度的时钟信号，本发明使用不需要晶体的时钟发生器单元。 时钟发生器单元包括内部时钟发生器，连接到内部时钟发生器的脉冲计数器，脉冲数存储器和脉冲滤波器。 脉冲计数器对同步信号的两个脉冲之间的内部产生的时钟脉冲数进行计数，这些脉冲根据USB规范进行传输。 评估所确定的脉冲数和标称脉冲数之间的差异，并用于控制脉冲抑制脉冲滤波器。 这导致稳定的时钟信号。
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24.发明授权Circuit and method for sensing a physical quantity, an oscillator circuit, a smartcard, and a temperature-sensing circuit 有权用于感测物理量的电路和方法，振荡器电路，智能卡和温度感测电路公开(公告)号：US08979362B2
公开(公告)日：2015-03-17
申请号：US13396923
申请日：2012-02-15
申请人： Uwe Weder , Korbinian Engl
发明人： Uwe Weder , Korbinian Engl
CPC分类号： G01K7/32 , G01D5/243 , G06K19/0717
摘要： A circuit for sensing a physical quantity according to an embodiment of the present invention includes a first oscillator circuit configured to provide a first clock signal including a first frequency depending on the physical quantity, and a second oscillator circuit configured to provide a second clock signal comprising a second frequency depending on the physical quantity. The circuit also includes a frequency comparator circuit configured to provide a frequency signal indicative of the physical quantity, the frequency signal being based on the first and second frequencies, wherein the first and second oscillator circuits are configured to provide the first and second clock signals such that due to a change in the physical quantity one frequency of the first and second frequencies increases, while the other frequency of the first and second frequencies decreases.
摘要翻译： 根据本发明的实施例的用于感测物理量的电路包括：第一振荡器电路，被配置为提供包括取决于物理量的第一频率的第一时钟信号;以及第二振荡器电路，被配置为提供第二时钟信号，所述第二时钟信号包括 第二个频率取决于物理量。 电路还包括频率比较器电路，其被配置为提供表示物理量的频率信号，频率信号基于第一和第二频率，其中第一和第二振荡器电路被配置为提供第一和第二时钟信号， 由于物理量的变化，第一和第二频率的一个频率增加，而第一和第二频率的另一个频率减小。
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公开(公告)号：US07865755B2
公开(公告)日：2011-01-04
申请号：US11688462
申请日：2007-03-20
申请人： Korbinian Engl , Josef Haid , Dietmar Scheiblhofer , Uwe Weder , Bernd Zimek
发明人： Korbinian Engl , Josef Haid , Dietmar Scheiblhofer , Uwe Weder , Bernd Zimek
CPC分类号： G06F1/3203 , G06F1/08 , G06F1/324 , Y02D10/126
摘要： A frequency regulator for varying a clock frequency of a power-supplied consumer operated in a clocked manner, wherein the frequency regulator is implemented to perform an overall variation of the clock frequency from an actual frequency to a set frequency, such that the overall variation is obtained by a plurality of clock changes, each with a different amount of change, wherein each of the respective amounts of change depends on a power change caused by the associated clock frequency change.
摘要翻译： 一种用于改变以时钟方式操作的供电消费者的时钟频率的频率调节器，其中实施所述频率调节器以执行所述时钟频率从实际频率到设定频率的总体变化，使得所述总体变化是 通过多个时钟变化获得，每个具有不同的变化量，其中各个变化量中的每一个取决于由关联的时钟频率变化引起的功率变化。
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公开(公告)号：US20060232255A1
公开(公告)日：2006-10-19
申请号：US11340000
申请日：2006-01-25
申请人： Gunter Haider , Christoph Mayerl , Gerhard Nebel , Iker San Sebastian , Holger Sedlak , Uwe Weder
发明人： Gunter Haider , Christoph Mayerl , Gerhard Nebel , Iker San Sebastian , Holger Sedlak , Uwe Weder
IPC分类号： G05F1/00
摘要： A circuit arrangement for voltage regulation having a series regulator with a regulating amplifier and a charge pump that is connected downstream of the regulating amplifier, a reference voltage unit that generates a reference voltage for the regulating amplifier, and a starter unit that generates a starter voltage in order to supply the regulating amplifier, the charge pump, and the reference voltage unit with voltage while the series regulator is being started.
摘要翻译： 一种用于电压调节的电路装置，具有串联调节器，其具有调节放大器和连接在调节放大器下游的电荷泵，产生用于调节放大器的参考电压的参考电压单元和产生起动器电压的起动器单元 以便在串联稳压器正在启动时向电压调节放大器，电荷泵和参考电压单元提供电压。
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公开(公告)号：US20060214652A1
公开(公告)日：2006-09-28
申请号：US11335158
申请日：2006-01-18
CPC分类号： G05F3/267
摘要： A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage regulator has a second NMOS transistor, which forms a current mirror with the first NMOS transistor. Furthermore, in the case of the voltage regulator, the first NMOS transistor is connected in series with a first PMOS transistor and a third transistor. The second NMOS transistor is likewise connected in series with a second PMOS transistor and a fourth transistor, the control inputs of the first and second PMOS transistors being connected to one another and the control inputs of the third and fourth transistors being connected to a control terminal for setting the magnitude of the partial current to be decoupled.
摘要翻译： 一种电压调节器，具有电流镜，用于使包含第一NMOS晶体管的部分电流作为串联晶体管去耦。 此外，电压调节器具有第二NMOS晶体管，其与第一NMOS晶体管形成电流镜。 此外，在电压调节器的情况下，第一NMOS晶体管与第一PMOS晶体管和第三晶体管串联连接。 第二NMOS晶体管同样与第二PMOS晶体管和第四晶体管串联连接，第一和第二PMOS晶体管的控制输入彼此连接，并且第三和第四晶体管的控制输入连接到控制端 用于设置要解耦的部分电流的大小。
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公开(公告)号：US20060192681A1
公开(公告)日：2006-08-31
申请号：US11305821
申请日：2005-12-16
申请人： Gunter Haider , Gerhard Nebel , Iker San Sebastian , Holger Sedlak , Uwe Weder
发明人： Gunter Haider , Gerhard Nebel , Iker San Sebastian , Holger Sedlak , Uwe Weder
CPC分类号： G05F1/465
摘要： A circuit arrangement having a voltage regulator, which is designed to generate a regulated operating voltage, and a voltage monitoring unit, which is designed to monitor the regulated operating voltage for deviations from desired values. The voltage monitoring unit has a first detector, which is designed to cause an alarm signal to be generated when the first detector detects that the regulated operating voltage is outside a first voltage interval, and a second detector, which is designed to cause an initiator to initiate countermeasures which influence the regulated operating voltage when the second detector detects that the regulated operating voltage is outside a second voltage interval, which is inside the first voltage interval.
摘要翻译： 具有设计用于产生调节工作电压的电压调节器和电压监视单元的电路装置，其被设计成监测调节的工作电压以偏离期望值。 电压监视单元具有第一检测器，其被设计为当第一检测器检测到调节的工作电压在第一电压间隔之外时产生报警信号;以及第二检测器，其被设计为使引发器 当第二检测器检测到调节的工作电压在第一电压间隔内的第二电压间隔之外时，启动影响调节工作电压的对策。
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公开(公告)号：US07005894B2
公开(公告)日：2006-02-28
申请号：US11045000
申请日：2005-01-26
申请人： Uwe Weder
发明人： Uwe Weder
CPC分类号： G01R19/1659 , G01R19/165 , G01R19/16519 , G01R19/16528
摘要： A voltage monitoring arrangement including a number of comparison devices, which corresponds to a prescribed number of voltage ranges, compares the value of an input voltage with a reference voltage and outputs a prescribed signal if the input voltage is within one of the prescribed voltage ranges. The voltage monitoring arrangement has a latch circuit which, when a latch signal is applied, establishes which voltage range the input voltage is currently in when the latch signal is applied, resulting in the arrangement having automatic voltage range reduction. The voltage monitoring arrangement has a monitoring unit which outputs a predetermined signal if the input voltage is outside the voltage range which exists when the latch signal is applied.
摘要翻译： 包括对应于规定数量的电压范围的多个比较装置的电压监视装置将输入电压的值与参考电压进行比较，并且如果输入电压在规定的电压范围内，则输出规定的信号。 电压监视装置具有锁存电路，当施加锁存信号时，锁存电路在施加锁存信号时确定输入电压当前处于哪个电压范围，导致具有自动电压范围减小的布置。 如果输入电压在施加锁存信号的电压范围之外，则电压监视装置具有输出预定信号的监视单元。
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公开(公告)号：US06747440B2
公开(公告)日：2004-06-08
申请号：US10461818
申请日：2003-06-06
申请人： Uwe Weder
发明人： Uwe Weder
IPC分类号： G05F1569
CPC分类号： G06K19/0701 , G05F1/565 , G06K7/0008 , G06K19/07 , H02M1/36 , H02M3/156
摘要： The circuit contains a series regulator with an FET. A capacitor and a further FET, which is provided as a transfer gate and is driven by the POR signal, are connected in series between the source terminal, to which the external supply voltage is applied, and the gate connection. When the external voltage is applied, the FET opens, with the transfer gate switched on, corresponding to the charging of the capacitor which now takes place. Because this charging process takes a certain amount of time, overshoots in the internal voltage are prevented.
摘要翻译： 该电路包含具有FET的串联稳压器。 设置为传输门并由POR信号驱动的电容器和另一FET串联连接在施加外部电源电压的源极端子和栅极连接之间。 当施加外部电压时，FET会打开，传输门接通，对应于现在发生的电容器的充电。 由于该充电过程需要一定的时间，所以可以防止内部电压过冲。
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