公开(公告)号：US06762635B2

公开(公告)日：2004-07-13

申请号：US10373891

申请日：2003-02-25

申请人： Michael Bruhnke ,  Viktor Preis ,  Uwe Weder

发明人： Michael Bruhnke ,  Viktor Preis ,  Uwe Weder

IPC分类号： H03L700

CPC分类号： H03L7/00 ,  G06F1/04

摘要： In accordance with the USB specifications, an accuracy of 0.25% is required for the data transmission rate. To generate a clock signal that allows this accuracy, the invention uses a clock generator unit that does not require a crystal. The clock generator unit includes an internal clock generator, a pulse counter that is connected to the internal clock generator, a pulse number memory, and a pulse filter. The pulse counter counts the number of internally generated clock pulses between two pulses of the synchronization signal, which are transmitted in accordance with the USB specification. The difference between the ascertained pulse number and a nominal pulse number is evaluated and is used for controlling the pulse-suppressing pulse filter. This results in a stabilized clock signal.

摘要翻译： 根据USB规格，数据传输速率需要0.25％的精度。 为了产生允许该精度的时钟信号，本发明使用不需要晶体的时钟发生器单元。 时钟发生器单元包括内部时钟发生器，连接到内部时钟发生器的脉冲计数器，脉冲数存储器和脉冲滤波器。 脉冲计数器对同步信号的两个脉冲之间的内部产生的时钟脉冲数进行计数，这些脉冲根据USB规范进行传输。 评估所确定的脉冲数和标称脉冲数之间的差异，并用于控制脉冲抑制脉冲滤波器。 这导致稳定的时钟信号。

公开(公告)号：US08222700B2

公开(公告)日：2012-07-17

申请号：US11620524

申请日：2007-01-05

申请人： Marcus Gehle ,  Uwe Weder

发明人： Marcus Gehle ,  Uwe Weder

IPC分类号： H01L21/70

CPC分类号： H01L23/576 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A semiconductor component including a semiconductor substrate, a doped well formed in the semiconductor substrate, transistor structures arranged in the doped well, and an integrated circuit connected to the doped well, wherein the integrated circuit intermittently charges the doped well to a provided electrical potential, ascertains a deviation of the potential present at the doped well from the provided potential, and triggers an alarm signal in the event of a specific deviation.

摘要翻译： 包括半导体衬底的半导体部件，在半导体衬底中形成的掺杂阱，布置在掺杂阱中的晶体管结构以及连接到掺杂阱的集成电路，其中集成电路将掺杂阱间歇地充电至所提供的电位， 确定掺杂阱处存在的电位与所提供的电位的偏差，并且在特定偏差的情况下触发报警信号。

公开(公告)号：US20100026377A1

公开(公告)日：2010-02-04

申请号：US12183225

申请日：2008-07-31

申请人： Uwe Weder ,  Christoph Mayerl ,  Julia Kresse ,  Christoph Saas ,  Dennis Tischendorf

发明人： Uwe Weder ,  Christoph Mayerl ,  Julia Kresse ,  Christoph Saas ,  Dennis Tischendorf

IPC分类号： G05F1/10

CPC分类号： G05F1/561

摘要： A circuit for providing a desired voltage difference in dependence on a reference signal, the circuit including a first resistor; a second resistor; a regulation circuit configured to regulate a current flowing through the first resistor, such that a voltage difference across the first resistor is determined by the reference signal; and a current mirror, wherein the current mirror is configured to mirror the current flowing through the first resistor to obtain a mirrored current flowing through the second resistor, such that the desired voltage difference is obtained across the second resistor.

摘要翻译： 一种用于根据参考信号提供所需电压差的电路，所述电路包括第一电阻器; 第二电阻器; 调节电路，被配置为调节流过所述第一电阻器的电流，使得所述第一电阻器两端的电压差由所述参考信号确定; 以及电流镜，其中所述电流镜被配置为镜像流过所述第一电阻器的电流以获得流过所述第二电阻器的镜像电流，使得跨所述第二电阻器获得期望的电压差。

公开(公告)号：US20080204158A1

公开(公告)日：2008-08-28

申请号：US11685656

申请日：2007-03-13

申请人： Uwe Weder

发明人： Uwe Weder

IPC分类号： H03B5/04

CPC分类号： H03K3/0315 ,  H03K5/133 ,  H03K2005/00058 ,  H03K2005/00065 ,  H03K2005/00071 ,  H03K2005/0013

摘要： An integrated circuit having a logic circuit having logic elements in a signal path having a signal propagation duration, wherein the logic elements have switching times depending on a supply voltage, and having an input for a clock signal, and an oscillator circuit having oscillator elements having switching times depending on the supply voltage, so that a frequency of the clock signal is adapted depending on the supply voltage to allow signal propagation of a signal through the signal path during a clock cycle of the clock signal in a case of a supply voltage drop, and having an output for the clock signal connected to the input of the logic circuit.

摘要翻译： 一种具有逻辑电路的集成电路，具有在具有信号传播持续时间的信号路径中的逻辑元件，其中所述逻辑元件具有取决于电源电压的切换时间，并且具有用于时钟信号的输入，以及具有振荡器元件的振荡器元件， 切换时间取决于电源电压，使得根据电源电压来适应时钟信号的频率，以在电源电压降的情况下在时钟信号的时钟周期期间允许信号通过信号路径的信号传播 并且具有连接到逻辑电路的输入的时钟信号的输出。

公开(公告)号：US20050174249A1

公开(公告)日：2005-08-11

申请号：US11045000

申请日：2005-01-26

申请人： Uwe Weder

发明人： Uwe Weder

IPC分类号： G01R19/165 ,  G08B21/00

CPC分类号： G01R19/1659 ,  G01R19/165 ,  G01R19/16519 ,  G01R19/16528

摘要： A voltage monitoring arrangement including a number of comparison devices, which corresponds to a prescribed number of voltage ranges, compares the value of an input voltage with a reference voltage and outputs a prescribed signal if the input voltage is within one of the prescribed voltage ranges. The voltage monitoring arrangement has a latch circuit which, when a latch signal is applied, establishes which voltage range the input voltage is currently in when the latch signal is applied, resulting in the arrangement having automatic voltage range reduction. The voltage monitoring arrangement has a monitoring unit which outputs a predetermined signal if the input voltage is outside the voltage range which exists when the latch signal is applied.

摘要翻译： 包括对应于规定数量的电压范围的多个比较装置的电压监视装置将输入电压的值与参考电压进行比较，并且如果输入电压在规定的电压范围内，则输出规定的信号。 电压监视装置具有锁存电路，当施加锁存信号时，锁存电路在施加锁存信号时确定输入电压当前处于哪个电压范围，导致具有自动电压范围减小的布置。 如果输入电压在施加锁存信号的电压范围之外，则电压监视装置具有输出预定信号的监视单元。

公开(公告)号：US20050057299A1

公开(公告)日：2005-03-17

申请号：US10946579

申请日：2004-09-20

申请人： Peter Fleischmann ,  Gerhard Nebel ,  Andreas Schlaffer ,  Uwe Weder

发明人： Peter Fleischmann ,  Gerhard Nebel ,  Andreas Schlaffer ,  Uwe Weder

IPC分类号： G11C5/14 ,  H02M3/07 ,  H02J1/00

CPC分类号： H02M3/07 ,  G11C5/147

摘要： A voltage regulator arrangement having a first voltage regulator, whose input connection is connected to the supply potential connection and whose output connection is connected to a first supply potential connection of a circuit arrangement, with the first voltage regulator supplying the circuit arrangement with a supply voltage in a rest state. A second voltage regulator is also provided, whose input connection is connected to the supply potential connection, and whose output connection is connected to a second supply potential connection of the circuit arrangement, with the second voltage regulator supplying the circuit arrangement with a supply voltage during its normal operation.

摘要翻译： 一种电压调节器装置，其具有第一电压调节器，其输入连接连接到电源电位连接，并且其输出连接连接到电路装置的第一电源电位连接，第一电压调节器向电路装置提供电源电压 在休息状态。 还提供了第二电压调节器，其输入连接连接到电源电位连接，并且其输出连接被连接到电路装置的第二电源电位连接，第二电压调节器为电路装置提供电源电压 其正常运行。

公开(公告)号：US20130100559A1

公开(公告)日：2013-04-25

申请号：US13450907

申请日：2012-04-19

申请人： Thomas Kuenemund ,  Dennis Tischendorf ,  Uwe Weder

发明人： Thomas Kuenemund ,  Dennis Tischendorf ,  Uwe Weder

IPC分类号： H02H1/00 ,  H01L23/544 ,  H01L27/04

CPC分类号： H03K19/17768 ,  G06F21/755 ,  H01L21/761 ,  H01L23/544 ,  H01L23/573 ,  H01L27/04 ,  H01L27/1443 ,  H01L2924/0002 ,  H02H1/00 ,  H01L2924/00

摘要： A semiconductor component includes a semiconductor substrate, and a doped well having a well terminal and a transistor structure having at least one potential terminal formed in the semiconductor substrate. The transistor structure has a parasitic thyristor, and is at least partly arranged in the doped well. The potential terminal and the well terminal are connected via a resistor.

摘要翻译： 半导体部件包括半导体衬底，以及具有阱端子和晶体管结构的掺杂阱，其具有形成在半导体衬底中的至少一个电位端子。 晶体管结构具有寄生晶闸管，并且至少部分地布置在掺杂阱中。 电位端子和阱端子通过电阻连接。

公开(公告)号：US07952841B2

公开(公告)日：2011-05-31

申请号：US11560804

申请日：2006-11-16

申请人： Christoph Mayerl ,  Uwe Weder

发明人： Christoph Mayerl ,  Uwe Weder

IPC分类号： H02H7/00 ,  H02H9/00 ,  G01R25/00 ,  H03D13/00 ,  H03K3/00

CPC分类号： G05F1/569

摘要： A device for determining an interference with a regulated voltage provided by a control loop with a unit for monitoring a control variable of the control loop and a unit for generating a notification signal if the control variable or a change in the time of the control variable is beyond a tolerance range around a normal value.

摘要翻译： 一种用于确定由控制环路提供的具有用于监视控制环路的控制变量的单元的监控电压的干扰的装置，以及如果控制变量或控制变量的时间变化是用于产生通知信号的单元 超出正常值附近的公差范围。

公开(公告)号：US20070257713A1

公开(公告)日：2007-11-08

申请号：US11688462

申请日：2007-03-20

申请人： Korbinian Engl ,  Josef Haid ,  Dietmar Scheiblhofer ,  Uwe Weder ,  Bernd Zimek

发明人： Korbinian Engl ,  Josef Haid ,  Dietmar Scheiblhofer ,  Uwe Weder ,  Bernd Zimek

IPC分类号： H03B19/00

CPC分类号： G06F1/3203 ,  G06F1/08 ,  G06F1/324 ,  Y02D10/126

摘要： A frequency regulator for varying a clock frequency of a power-supplied consumer operated in a clocked manner, wherein the frequency regulator is implemented to perform an overall variation of the clock frequency from an actual frequency to a set frequency, such that the overall variation is obtained by a plurality of clock changes, each with a different amount of change, wherein each of the respective amounts of change depends on a power change caused by the associated clock frequency change.

摘要翻译： 一种用于改变以时钟方式操作的供电消费者的时钟频率的频率调节器，其中实施所述频率调节器以执行所述时钟频率从实际频率到设定频率的总体变化，使得所述总体变化是 通过多个时钟变化获得，每个具有不同的变化量，其中各个变化量中的每一个取决于由关联的时钟频率变化引起的功率变化。

公开(公告)号：US06590821B2

公开(公告)日：2003-07-08

申请号：US10127670

申请日：2002-04-22

申请人： Uwe Weder ,  Hans-Heinrich Viehmann

发明人： Uwe Weder ,  Hans-Heinrich Viehmann

IPC分类号： G11C700

CPC分类号： G11C16/26 ,  G11C7/062

摘要： A description is given of a memory device having memory cells for storing data. The memory device described is distinguished by the fact that a current switch-off device is provided, which prevents an existing current flow through the memory cell to be read in response to the identification of the memory cell content, and/or that a discharge device is provided, which partly discharges again a node in the memory cell which is to be precharged before the memory cell is read.