公开(公告)号：US20090085642A1

公开(公告)日：2009-04-02

申请号：US11865368

申请日：2007-10-01

Applicant: Shaorui LI ,  Jinghong Chen ,  Lawrence Rigge

Inventor： Shaorui LI ,  Jinghong Chen ,  Lawrence Rigge

IPC: G06G7/12

CPC classification number: H03F3/45197 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03F2203/45488

Abstract: A passive mixer includes a transconductance amplifier having a source degeneration capacitance. The transconductance amplifier has an input for receiving an input signal and an output for outputting a current signal. A multiplier is provided for mixing a local oscillator signal with the current signal so as to provide an output signal at an output of the passive mixer. A capacitive load is connected to the output of the passive mixer.

Abstract translation: 无源混频器包括具有源极退化电容的跨导放大器。 跨导放大器具有用于接收输入信号的输入和用于输出电流信号的输出。 提供了一个乘法器，用于将本地振荡器信号与当前信号混频，以便在无源混频器的输出处提供输出信号。 电容负载连接到无源混频器的输出端。

公开(公告)号：US20070018693A1

公开(公告)日：2007-01-25

申请号：US11420098

申请日：2006-05-24

Applicant: Jinghong Chen

Inventor： Jinghong Chen

IPC: H03K19/094

CPC classification number: H03K19/09432

Abstract: A CML digital circuit includes a load coupled between a power supply node and at least one output node and a logic circuit component coupled to the output node. The logic circuit component has at least one data input node. The logic circuit component comprises a first circuit module and a second circuit module. A first tail current source is coupled to the first circuit module. A second tail current source is coupled to the second circuit module. A first switch is coupled between the power supply node and the first tail current source. A second switch is coupled between the power supply node and the second tail current source, wherein the first switch is triggered to deactivate the first circuit module when the second circuit module is operating and the second switch is triggered to deactivate the second circuit module when the first circuit module is operating.

Abstract translation: CML数字电路包括耦合在电源节点和至少一个输出节点之间的负载以及耦合到输出节点的逻辑电路组件。 逻辑电路组件具有至少一个数据输入节点。 逻辑电路部件包括第一电路模块和第二电路模块。 第一尾电流源耦合到第一电路模块。 第二尾电流源耦合到第二电路模块。 第一开关耦合在电源节点和第一尾电流源之间。 第二开关耦合在电源节点和第二尾电流源之间，其中第一开关被触发以在第二电路模块工作时停用第一电路模块，并且当第二开关被触发时停用第二电路模块 第一个电路模块正在运行。

公开(公告)号：US20160196825A1

公开(公告)日：2016-07-07

申请号：US14859342

申请日：2015-09-20

Applicant: Jinghong Chen

Inventor： Jinghong Chen ,  Xiangning Chen ,  Jingzhun Feng

IPC: G10L19/005 ,  G10L19/008 ,  G10L19/06 ,  G10L19/022

CPC classification number: H04B11/00

Abstract: It discloses an acoustic channel-based data communications method which performs channel coding on an original data signal using a CRC coding method and a BCH coding method to obtain a coded sequence; modulates the coded sequence using a preset audio sequence symbol set via a symbol mapping method to obtain a digital audio signal; selects a channel frequency band according to characteristics of a transmitting equipment and interference between frequency bands; and converts the digital audio signal into an analog audio signal through a digital-to-analog converter and transmits the signal to a channel for transmission according to the selected channel frequency band.

Abstract translation: 它公开了一种基于声道的数据通信方法，其使用CRC编码方法和BCH编码方法对原始数据信号进行信道编码以获得编码序列; 使用经由符号映射方法设置的预设音频序列符号来调制编码序列以获得数字音频信号; 根据发射设备的特性和频带之间的干扰选择信道频带; 并通过数模转换器将数字音频信号转换为模拟音频信号，并根据所选择的频道频带将信号发送到用于传输的信道。

公开(公告)号：US09054935B1

公开(公告)日：2015-06-09

申请号：US14599573

申请日：2015-01-19

Applicant: Jinghong Chen

Inventor： Jinghong Chen ,  Xiangning Chen ,  Jingzhun Feng

IPC: H04L27/28 ,  H04L27/26

CPC classification number: H04L27/2666 ,  H04B11/00 ,  H04L27/2602 ,  H04L27/2634 ,  H04L27/265 ,  H04L27/2655 ,  H04L27/2656 ,  H04L27/2662 ,  H04L27/2675

Abstract: Disclosed is an orthogonal frequency division multiplexing (OFDM)-based acoustic communications system. At an acoustic transmitting end, original data is modulated through channel coding into an acoustic signal of a data frame formed by multiple OFDM symbols and the acoustic signal is transmitted through a loudspeaker; at an acoustic receiving end, after a microphone receives the acoustic signal, and the acoustic signal is restored to the original data through demodulation and channel decoding. In a communication process, symbol synchronization is implemented through pilot information, and data frame synchronization is implemented in a manner of inserting baker codes, thereby simplifying processing, having a low bit error rate, improving acoustic communication efficiency, promoting development of acoustic communication, and having a good application prospect.

Abstract translation: 公开了一种基于正交频分复用（OFDM）的声学通信系统。 在声发射端，将原始数据通过信道编码调制成由多个OFDM符号形成的数据帧的声信号，声信号通过扬声器传输; 在声音接收端，在麦克风接收到声信号之后，通过解调和信道解码将声信号恢复到原始数据。 在通信过程中，通过导频信息实现符号同步，并且以插入面包代码的方式实现数据帧同步，从而简化具有低误码率的处理，提高声通信效率，促进声通信的发展，以及 具有良好的应用前景。

公开(公告)号：US07688130B2

公开(公告)日：2010-03-30

申请号：US11865368

申请日：2007-10-01

Applicant: Shaorui Li ,  Jinghong Chen ,  Lawrence Rigge

Inventor： Shaorui Li ,  Jinghong Chen ,  Lawrence Rigge

IPC: G06F7/44

CPC classification number: H03F3/45197 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03F2203/45488

Abstract: A passive mixer includes a transconductance amplifier having a source degeneration capacitance. The transconductance amplifier has an input for receiving an input signal and an output for outputting a current signal. A multiplier is provided for mixing a local oscillator signal with the current signal so as to provide an output signal at an output of the passive mixer. A capacitive load is connected to the output of the passive mixer.

Abstract translation: 无源混频器包括具有源极退化电容的跨导放大器。 跨导放大器具有用于接收输入信号的输入和用于输出电流信号的输出。 提供了一个乘法器，用于将本地振荡器信号与当前信号混频，以便在无源混频器的输出处提供输出信号。 电容负载连接到无源混频器的输出端。

公开(公告)号：US07598815B2

公开(公告)日：2009-10-06

申请号：US11866766

申请日：2007-10-03

Applicant: Jinghong Chen ,  Chunbing Guo ,  Fuji Yang

Inventor： Jinghong Chen ,  Chunbing Guo ,  Fuji Yang

IPC: H03B21/01 ,  H03L7/00 ,  H03L7/18

CPC classification number: H03B21/00 ,  H03B25/00 ,  H03L7/183 ,  H03L7/185 ,  H04L27/2637 ,  H04L27/2653

Abstract: Multiple carrier frequencies are provided from a phase locked loop, especially closely adjacent quadrature amplitude modulated subcarriers for multiplexed data communications. A quadrature voltage controlled oscillator (VCO) and cascaded frequency dividers provide feedback to a phase comparator to lock the VCO to a reference signal. In addition to frequency divider outputs for use as subcarriers, e.g., binary division factors of the VCO frequency, a quadrature mixer multiplies and adds corresponding quadrature components at two of the frequencies, to generate a differential signal at a difference frequency. The mixer may be outside of the feedback signal path but preferably is in the feedback path to suppress noise. A polyphase filter converts the mixer output to a quadrature signal useful as a subcarrier. The technique efficiently generates sequential integer multiples of a basic frequency, such as sixteen adjacent integer multiples of a frequency reference.

Abstract translation: 多个载波频率从锁相环提供，特别是紧密相邻的正交幅度调制副载波，用于复用数据通信。 正交压控振荡器（VCO）和级联分频器向相位比较器提供反馈以将VCO锁定到参考信号。 除了用作子载波的分频器输出，例如VCO频率的二进制分频因子之外，正交混频器在两个频率上乘法并相加正交分量，以产生差分频率的差分信号。 混频器可以在反馈信号路径之外，但是优选地在反馈路径中以抑制噪声。 多相滤波器将混频器输出转换为可用作子载波的正交信号。 该技术有效地生成基本频率的顺序整数倍，例如频率参考的十六个相邻整数倍。

公开(公告)号：US07560957B2

公开(公告)日：2009-07-14

申请号：US11421675

申请日：2006-06-01

Applicant: Jinghong Chen ,  Gregory W. Sheets ,  Lane A. Smith

Inventor： Jinghong Chen ,  Gregory W. Sheets ,  Lane A. Smith

IPC: H03K17/16 ,  H03K19/003 ,  H03K19/0175 ,  H03K19/20 ,  H03K19/094

CPC classification number: H03K19/09432 ,  H03K19/01707

Abstract: A current mode logic digital circuit is provided comprising a logic circuit component having at least one data input node and at least one output node. A load is coupled between a power supply node and the output node. The load comprises a folded active inductor coupled to the output node.

Abstract translation: 提供了一种电流模式逻辑数字电路，包括具有至少一个数据输入节点和至少一个输出节点的逻辑电路组件。 负载耦合在电源节点和输出节点之间。 负载包括耦合到输出节点的折叠有源电感器。

公开(公告)号：US20080042754A1

公开(公告)日：2008-02-21

申请号：US11462180

申请日：2006-08-03

Applicant: Jinghong Chen

Inventor： Jinghong Chen

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03B27/00 ,  H03L7/099

Abstract: A voltage controlled oscillator unit is provided with cross coupled voltage controlled oscillators to generate quadrature phases. One control stage adjusts coupling between the oscillators. Another control stage adjusts the tail current that applies operating bias to the oscillators and to the couplers, respectively. The cross coupling and tail current control stages are arranged so that tuning one simultaneously and oppositely tunes the other for simultaneous adjustment in opposite directions. This limits the power consumption of the oscillator unit throughout the range of frequency control.

Abstract translation: 压控振荡器单元设有交叉耦合电压控制振荡器以产生正交相位。 一个控制级调节振荡器之间的耦合。 另一个控制级分别调节向振荡器和耦合器施加工作偏压的尾电流。 交叉耦合和尾电流控制级被布置成使得调谐一个同时并相反地调谐另一个以在相反方向上同时进行调整。 这限制了整个频率控制范围内振荡器单元的功耗。

公开(公告)号：US20070018694A1

公开(公告)日：2007-01-25

申请号：US11421675

申请日：2006-06-01

Applicant: Jinghong Chen ,  Gregory Sheets ,  Lane Smith

Inventor： Jinghong Chen ,  Gregory Sheets ,  Lane Smith

IPC: H03K19/094

CPC classification number: H03K19/09432 ,  H03K19/01707

Abstract: A current mode logic digital circuit is provided comprising a logic circuit component having at least one data input node and at least one output node. A load is coupled between a power supply node and the output node. The load comprises a folded active inductor coupled to the output node.

Abstract translation: 提供了一种电流模式逻辑数字电路，包括具有至少一个数据输入节点和至少一个输出节点的逻辑电路组件。 负载耦合在电源节点和输出节点之间。 负载包括耦合到输出节点的折叠有源电感器。

公开(公告)号：US20070013440A1

公开(公告)日：2007-01-18

申请号：US11420177

申请日：2006-05-24

Applicant: Jinghong Chen ,  Gregory Sheets ,  Joseph Anidjar ,  Robert Kapuschinsky ,  Lane Smith

Inventor： Jinghong Chen ,  Gregory Sheets ,  Joseph Anidjar ,  Robert Kapuschinsky ,  Lane Smith

IPC: H03F1/02

CPC classification number: H03F3/45973 ,  H03F3/45977 ,  H03F2203/45101 ,  H03F2203/45434 ,  H03F2203/45564 ,  H03F2203/45588 ,  H03F2203/45622

Abstract: An amplifier having DC offset compensation includes at least one input node and a pair of differential output nodes, a biasing circuit coupled to the input node; and a plurality of current sources. Selected ones of said current sources are coupled to the input node to adjust a DC voltage at the input node to provide DC offset compensation for the amplifier

Abstract translation: 具有DC偏移补偿的放大器包括至少一个输入节点和一对差分输出节点，耦合到输入节点的偏置电路; 和多个电流源。 所选择的所述电流源耦合到输入节点以调整输入节点处的DC电压，以为放大器提供DC偏移补偿