Abstract:
An ergonomic full body sleep support system includes an ergonomic back pillow and an ergonomic leg support for global musculoskeletal alignment and correction. The ergonomic back pillow supporting a global neutral spinal pelvic alignment of the head, neck, torso, and hip, consists of three segments including a transverse head and upper cervical supporting pillow, a transverse lumbar supporting segment, a longitudinal lower cervical and thoracic supporting segment aligned to the longitudinal centerlines of the other two segments, forming a longitudinally symmetrical assembly, a left cut-out and right cut-out to support a range of sleeping positions from supine to lateral sleep. An ergonomic leg support to elevate and facilitate leg venous return consists of a transverse lower portion, longitudinal upper left and right wings, and a cut-out. Ergonomic full body sleep support system provides a pragmatic solution to accommodate global neutral musculoskeletal alignment, facilitate the associated biological functions and sleep comfort.
Abstract:
A buffer circuit uses (e.g., active) inductors for driving capacitive loads. In one embodiment, the buffer circuit has one or more stages, each stage having one CMOS inverter. Each CMOS inverter has one NMOS transistor and one PMOS transistor and is coupled to a stage input and a stage output. Additionally, at least one stage of the buffer circuit has two inductors, each coupled between a different voltage reference for the buffer circuit and the stage output. One inductor has a PMOS transistor coupled to the gate of an NMOS transistor and the other inductor has an NMOS transistor coupled to the gate of a PMOS transistor. When driving capacitive loads, the inductors partially tune out the apparent load capacitance CL, thereby improving the charging capabilities of inverter and enabling quicker charge and discharge times. Furthermore, partially tuning out apparent load capacitance facilitates the driving of larger capacitive loads.
Abstract:
A wideband amplifier having an amplifier input terminal and an amplifier output terminal includes at least one transistor coupled to the amplifier input terminal and an impedance element coupled between the amplifier input terminal and the amplifier output terminal. A feedback signal is transmitted between the amplifier output terminal and the amplifier input terminal by way of the impedance element wherein the feedback signal varies in accordance with changes in an impedance of the impedance element so as to peak a frequency response of the amplifier.
Abstract:
An amplifier having DC offset compensation includes at least one input node and a pair of differential output nodes, a biasing circuit coupled to the input node; and a plurality of current sources. Selected ones of said current sources are coupled to the input node to adjust a DC voltage at the input node to provide DC offset compensation for the amplifier
Abstract:
In one embodiment, an amplifier circuit has at least one branch and current-source circuitry providing a tail current to the branch, which has at least one load tank, at least one input transistor coupled to the load tank, and variable-impedance circuitry coupled between an input node of the amplifier circuit and the gate of the input transistor. The transconductance of the input transistor can be altered to achieve two or more different gain settings for the amplifier circuit. The variable-impedance circuitry can be controlled to contribute any one of at least two different levels of impedance to the overall input impedance of the amplifier circuit. If the transconductance of the input transistor is reduced, then the variable-impedance circuitry can increase the level of impedance contributed to the overall input impedance of the amplifier circuit such that the overall input impedance of the amplifier circuit remains substantially unchanged.
Abstract:
It discloses an acoustic channel-based data communications method which performs channel coding on an original data signal using a CRC coding method and a BCH coding method to obtain a coded sequence; modulates the coded sequence using a preset audio sequence symbol set via a symbol mapping method to obtain a digital audio signal; selects a channel frequency band according to characteristics of a transmitting equipment and interference between frequency bands; and converts the digital audio signal into an analog audio signal through a digital-to-analog converter and transmits the signal to a channel for transmission according to the selected channel frequency band.
Abstract:
Disclosed is an orthogonal frequency division multiplexing (OFDM)-based acoustic communications system. At an acoustic transmitting end, original data is modulated through channel coding into an acoustic signal of a data frame formed by multiple OFDM symbols and the acoustic signal is transmitted through a loudspeaker; at an acoustic receiving end, after a microphone receives the acoustic signal, and the acoustic signal is restored to the original data through demodulation and channel decoding. In a communication process, symbol synchronization is implemented through pilot information, and data frame synchronization is implemented in a manner of inserting baker codes, thereby simplifying processing, having a low bit error rate, improving acoustic communication efficiency, promoting development of acoustic communication, and having a good application prospect.
Abstract:
A passive mixer includes a transconductance amplifier having a source degeneration capacitance. The transconductance amplifier has an input for receiving an input signal and an output for outputting a current signal. A multiplier is provided for mixing a local oscillator signal with the current signal so as to provide an output signal at an output of the passive mixer. A capacitive load is connected to the output of the passive mixer.
Abstract:
Multiple carrier frequencies are provided from a phase locked loop, especially closely adjacent quadrature amplitude modulated subcarriers for multiplexed data communications. A quadrature voltage controlled oscillator (VCO) and cascaded frequency dividers provide feedback to a phase comparator to lock the VCO to a reference signal. In addition to frequency divider outputs for use as subcarriers, e.g., binary division factors of the VCO frequency, a quadrature mixer multiplies and adds corresponding quadrature components at two of the frequencies, to generate a differential signal at a difference frequency. The mixer may be outside of the feedback signal path but preferably is in the feedback path to suppress noise. A polyphase filter converts the mixer output to a quadrature signal useful as a subcarrier. The technique efficiently generates sequential integer multiples of a basic frequency, such as sixteen adjacent integer multiples of a frequency reference.
Abstract:
A current mode logic digital circuit is provided comprising a logic circuit component having at least one data input node and at least one output node. A load is coupled between a power supply node and the output node. The load comprises a folded active inductor coupled to the output node.