公开(公告)号：US10741455B2

公开(公告)日：2020-08-11

申请号：US16782083

申请日：2020-02-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Fu-Jung Chuang ,  Ching-Ling Lin ,  Po-Jen Chuang ,  Yu-Ren Wang ,  Wen-An Liang ,  Chia-Ming Kuo ,  Guan-Wei Huang ,  Yuan-Yu Chung ,  I-Ming Tseng

IPC: H01L21/00 ,  H01L21/8238 ,  H01L21/762 ,  H01L27/092

Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion, and a gate structure on the SDB structure. Preferably, the SDB structure includes silicon oxycarbonitride (SiOCN), a concentration portion of oxygen in SiOCN is between 30% to 60%, and the gate structure includes a metal gate.

公开(公告)号：US10658458B2

公开(公告)日：2020-05-19

申请号：US16028386

申请日：2018-07-05

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： I-Ming Tseng ,  Chun-Hsien Lin ,  Wen-An Liang

IPC: H01L21/762 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66

Abstract: A method of forming a semiconductor structure is disclosed. A fin structure is formed on a substrate and a trench is formed in the fin structure. The trench has a top corner, an upper portion having an upper sidewall and a lower portion having a lower sidewall. A first dielectric layer is then formed on the substrate and fills the lower portion of the trench. After that, a second dielectric layer is formed on the substrate and covers the top corner and the upper sidewall of the trench. The second dielectric layer also covers an upper surface of the first dielectric layer.

公开(公告)号：US10607897B2

公开(公告)日：2020-03-31

申请号：US16589032

申请日：2019-09-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Fu-Jung Chuang ,  Ching-Ling Lin ,  Po-Jen Chuang ,  Yu-Ren Wang ,  Wen-An Liang ,  Chia-Ming Kuo ,  Guan-Wei Huang ,  Yuan-Yu Chung ,  I-Ming Tseng

IPC: H01L21/00 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/762

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; removing part of the first fin-shaped structure to form a first trench; forming a dielectric layer in the first trench, wherein the dielectric layer comprises silicon oxycarbonitride (SiOCN); and planarizing the dielectric layer to form a first single diffusion break (SDB) structure.

公开(公告)号：US10043868B2

公开(公告)日：2018-08-07

申请号：US15249462

申请日：2016-08-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： I-Ming Tseng ,  Chun-Hsien Lin ,  Wen-An Liang

IPC: H01L21/762 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor structure and method of forming the same. The semiconductor structure includes a fin structure formed on a substrate and an isolation structure formed therein. The isolation structure includes a trench with a concave upper sidewall, a straight lower sidewall and a rounded top corner. A first dielectric layer fills a lower portion of the trench. A second dielectric layer covers a top surface of the first dielectric layer, the concave upper sidewall and the rounded top corner of the trench.

公开(公告)号：US09607985B1

公开(公告)日：2017-03-28

申请号：US14864908

申请日：2015-09-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： I-Ming Tseng ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/70 ,  H01L27/088 ,  H01L29/06 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/306

CPC classification number: H01L27/0886 ,  H01L21/3081 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0653

Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a substrate, a plurality of fin shaped structures, a first trench and at least one bump. The substrate has a base. The fin shaped structures protrude from the base of the substrate. The first trench recesses from the base of the substrate and has a depth being smaller than a width of each of the fin shaped structures. The at least one bump is disposed on a surface of the first trench.

公开(公告)号：US20170012000A1

公开(公告)日：2017-01-12

申请号：US14844004

申请日：2015-09-03

Applicant: United Microelectronics Corp.

Inventor： I-Ming Tseng ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L23/535 ,  H01L29/16 ,  H01L29/06 ,  H01L29/161 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823475 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L23/535 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66515 ,  H01L29/66545 ,  H01L29/6681 ,  H01L29/7851

Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device including a fin structure, a first liner, a first insulating layer and a dummy gate structure. The fin structure is disposed on a substrate, where the fin structure has a trench. The first liner disposed in the trench. The first insulating layer disposed on the first liner. The dummy gate structure is disposed on the first insulating layer and disposed above the trench, where a bottom surface of the dummy gate and a top surface of the fin structure are on a same level.

Abstract translation: 一种半导体器件及其制造方法，所述半导体器件包括翅片结构，第一衬垫，第一绝缘层和虚拟栅极结构。 翅片结构设置在基板上，其中鳍结构具有沟槽。 布置在沟槽中的第一个衬垫。 第一绝缘层设置在第一衬垫上。 虚拟栅极结构设置在第一绝缘层上并且设置在沟槽上方，其中虚拟栅极的底表面和鳍状结构的顶表面处于同一水平面上。

公开(公告)号：US20250098252A1

公开(公告)日：2025-03-20

申请号：US18379667

申请日：2023-10-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ke-Ting Chen ,  Ching-Ling Lin ,  Wen-An Liang ,  Chia-Fu Hsu

IPC: H01L29/40 ,  H01L21/311 ,  H01L29/417 ,  H01L29/423

Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a contact etch stop layer (CESL) adjacent to the metal gate, and an interlayer dielectric (ILD) layer around the gate structure, performing a first etching process to remove the ILD layer, performing a second etching process to remove the CESL for forming a first contact hole, and then forming a first contact plug in the first contact hole. Preferably, a width of the first contact plug adjacent to the CESL is less than a width of the first contact plug under the CESL.

公开(公告)号：US20240371699A1

公开(公告)日：2024-11-07

申请号：US18208896

申请日：2023-06-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chia-Fu Hsu ,  Huang-Ren Wei

IPC: H01L21/8234 ,  H01L21/768 ,  H01L23/528 ,  H01L27/088 ,  H01L29/66

Abstract: The invention provides a semiconductor structure, the semiconductor structure comprises a substrate, a dielectric layer located on the substrate, a plurality of gate structures located in the dielectric layer on the substrate, a plurality of first metal layers located on a part of the gate structures, and the first metal layers are respectively electrically connected with the corresponding gate structures, at least one second metal layer, the second metal layer is bridged over at least two of the gate structures, wherein the depth of the first metal layer is greater than that of the second metal layer.

公开(公告)号：US20200328126A1

公开(公告)日：2020-10-15

申请号：US16914483

申请日：2020-06-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Fu-Jung Chuang ,  Ching-Ling Lin ,  Po-Jen Chuang ,  Yu-Ren Wang ,  Wen-An Liang ,  Chia-Ming Kuo ,  Guan-Wei Huang ,  Yuan-Yu Chung ,  I-Ming Tseng

IPC: H01L21/8238 ,  H01L27/092 ,  H01L21/762

Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion, and a gate structure on the SDB structure. Preferably, the SDB structure includes silicon oxycarbonitride (SiOCN), a concentration portion of oxygen in SiOCN is between 30% to 60%, and the gate structure includes a metal gate having a n-type work function metal layer or a p-type work function metal layer.

公开(公告)号：US10679903B2

公开(公告)日：2020-06-09

申请号：US15859775

申请日：2018-01-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ching-Ling Lin ,  Wen-An Liang ,  Chen-Ming Huang

IPC: H01L21/8234 ,  H01L21/764 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a first gate structure and a second gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; transforming the first gate structure and the second gate structure into a first metal gate and a second metal gate; forming a hard mask on the first metal gate and the second metal gate; removing part of the hard mask, the second metal gate, and part of the fin-shaped structure to form a trench; and forming a dielectric layer into the trench to form a single diffusion break (SDB) structure.