Methods of manufacture MEMS devices
    21.
    发明授权
    Methods of manufacture MEMS devices 有权
    制造MEMS器件的方法

    公开(公告)号:US09266719B2

    公开(公告)日:2016-02-23

    申请号:US13406069

    申请日:2012-02-27

    IPC分类号: H01L41/00 B81C1/00 H01L41/09

    摘要: Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a first semiconductive material and at least one trench disposed in the first semiconductive material, the at least one trench having a sidewall. An insulating material layer is disposed over an upper portion of the sidewall of the at least one trench in the first semiconductive material and over a portion of a top surface of the first semiconductive material proximate the sidewall. A second semiconductive material or a conductive material is disposed within the at least one trench and at least over the insulating material layer disposed over the portion of the top surface of the first semiconductive material proximate the sidewall.

    摘要翻译: 公开了微机电系统(MEMS)装置及其制造方法。 在一个实施例中,MEMS器件包括第一半导体材料和设置在第一半导体材料中的至少一个沟槽,所述至少一个沟槽具有侧壁。 绝缘材料层设置在第一半导体材料中的至少一个沟槽的侧壁的上部上方,以及靠近侧壁的第一半导体材料的顶表面的一部分之上。 第二半导体材料或导电材料设置在至少一个沟槽内,并且至少在绝缘材料层的上方设置在靠近侧壁的第一半导体材料的顶表面的部分之上。

    MEMS devices and methods of manufacture thereof
    25.
    发明授权
    MEMS devices and methods of manufacture thereof 有权
    MEMS器件及其制造方法

    公开(公告)号:US07851875B2

    公开(公告)日:2010-12-14

    申请号:US12013174

    申请日:2008-01-11

    IPC分类号: H01L29/84

    摘要: Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a first semiconductive material and at least one trench disposed in the first semiconductive material, the at least one trench having a sidewall. An insulating material layer is disposed over an upper portion of the sidewall of the at least one trench in the first semiconductive material and over a portion of a top surface of the first semiconductive material proximate the sidewall. A second semiconductive material or a conductive material is disposed within the at least one trench and at least over the insulating material layer disposed over the portion of the top surface of the first semiconductive material proximate the sidewall.

    摘要翻译: 公开了微机电系统(MEMS)装置及其制造方法。 在一个实施例中,MEMS器件包括第一半导体材料和设置在第一半导体材料中的至少一个沟槽,所述至少一个沟槽具有侧壁。 绝缘材料层设置在第一半导体材料中的至少一个沟槽的侧壁的上部上方,以及靠近侧壁的第一半导体材料的顶表面的一部分之上。 第二半导体材料或导电材料设置在至少一个沟槽内,并且至少在绝缘材料层的上方设置在靠近侧壁的第一半导体材料的顶表面的部分之上。

    Layer structures comprising chalcogenide materials
    27.
    发明申请
    Layer structures comprising chalcogenide materials 审中-公开
    包含硫族化物材料的层结构

    公开(公告)号:US20080078983A1

    公开(公告)日:2008-04-03

    申请号:US11529564

    申请日:2006-09-28

    申请人: Wolfgang Raberg

    发明人: Wolfgang Raberg

    IPC分类号: H01L47/00

    摘要: The invention provides a layer structure comprising a first layer, the first layer comprising chalcogenide material, and a second layer being deposited onto the first layer, the second layer comprising silver and another material which decreases the mobility of silver atoms or ions or alternately the second layer being a seed layer deposited onto the first layer and the second layer comprising copper and optionally other material, a memory cell comprising such layer structure and the processes for manufacturing the layer structure and the memory cell.

    摘要翻译: 本发明提供了一种层结构,其包括第一层,第一层包括硫族化物材料,第二层沉积在第一层上,第二层包含银和另一种材料,其降低银原子或离子的迁移率, 层是沉积到第一层上的种子层,第二层包括铜和任选的其它材料,包括这种层结构的存储单元和用于制造层结构和存储单元的工艺。

    Method of fabricating an integrated electronic circuit with programmable resistance cells
    28.
    发明申请
    Method of fabricating an integrated electronic circuit with programmable resistance cells 有权
    制造具有可编程电阻单元的集成电子电路的方法

    公开(公告)号:US20070200155A1

    公开(公告)日:2007-08-30

    申请号:US11363494

    申请日:2006-02-28

    IPC分类号: H01L29/94 B05D5/12 G11C11/00

    摘要: Method of fabricating an integrated electronic circuit with programmable resistance cells, which comprises providing a substrate; forming an inert electrode; forming a solid electrolyte on the inert electrode; forming an interlayer on the solid electrolyte, the interlayer comprising an active electrode material and nitrogen; and forming an active electrode on the interlayer, the active electrode comprising the active electrode material.

    摘要翻译: 制造具有可编程电阻电池的集成电子电路的方法,其包括提供衬底; 形成惰性电极; 在惰性电极上形成固体电解质; 在所述固体电解质上形成中间层,所述中间层包含活性电极材料和氮气; 以及在所述中间层上形成有源电极,所述有源电极包括所述活性电极材料。

    Method of fabricating an integrated electronic circuit with programmable resistance cells
    29.
    发明授权
    Method of fabricating an integrated electronic circuit with programmable resistance cells 有权
    制造具有可编程电阻单元的集成电子电路的方法

    公开(公告)号:US08492810B2

    公开(公告)日:2013-07-23

    申请号:US11363494

    申请日:2006-02-28

    IPC分类号: H01L29/94 B05D5/12 G11C11/00

    摘要: Method of fabricating an integrated electronic circuit with programmable resistance cells, which comprises providing a substrate; forming an inert electrode; forming a solid electrolyte on the inert electrode; forming an interlayer on the solid electrolyte, the interlayer comprising an active electrode material and nitrogen; and forming an active electrode on the interlayer, the active electrode comprising the active electrode material.

    摘要翻译: 制造具有可编程电阻电池的集成电子电路的方法,其包括提供衬底; 形成惰性电极; 在惰性电极上形成固体电解质; 在所述固体电解质上形成中间层,所述中间层包含活性电极材料和氮气; 以及在所述中间层上形成有源电极,所述有源电极包括所述活性电极材料。

    Integrated circuit with magnetic material magnetically coupled to magneto-resistive sensing element
    30.
    发明授权
    Integrated circuit with magnetic material magnetically coupled to magneto-resistive sensing element 有权
    具有磁耦合到磁阻感测元件的磁性材料的集成电路

    公开(公告)号:US08174260B2

    公开(公告)日:2012-05-08

    申请号:US12198143

    申请日:2008-08-26

    IPC分类号: G01R33/02

    摘要: An integrated circuit including a first magneto-resistive sensing element, magnetic material and a spacer. The magnetic material is situated laterally to the first magneto-resistive sensing element. The spacer is situated between the first magneto-resistive sensing element and the magnetic material. The magnetic material is magnetically coupled to the first magneto-resistive sensing element.

    摘要翻译: 一种集成电路,包括第一磁阻感测元件,磁性材料和间隔物。 磁性材料横向于第一磁阻感测元件。 间隔件位于第一磁阻感测元件和磁性材料之间。 磁性材料磁耦合到第一磁阻感测元件。