Abstract:
A fixing auxiliary device includes a main body, at least an extension arm and an adhesive element. The main body has a first portion in contact with a connecting portion of a circuit board and a second portion coupled to an extension plate of a metallic assembly. The at least an extension arm extends from an edge of the main body and is bent toward one side of the main body so as to clamp the extension plate of the metallic assembly. The adhesive element is used for bonding the first portion of the main body onto the connecting portion of the circuit board.
Abstract:
A temperature-homogenizing device for uniformly dissipating heat generated from electronic components in an electronic device to a housing of the electronic device includes a first and a second higher thermally conductive layers and a first lower thermally conductive layer. The first lower thermally conductive layer is disposed between the first and the second higher thermally conductive layers, and made of a material or a medium having a lower thermal conductivity than each of the first and the second higher thermally conductive layers. By means of this temperature-homogenizing device, the heat is homogeneously distributed throughout the first and the second higher thermally conductive layers at a higher thermal conduction rate and transferred through the first lower thermally conductive layer at a lower thermal conduction rate so as to maintain homogeneous temperature distribution on the housing.
Abstract:
The present invention provides a method and apparatus for a memory build-in self-diagnosis and repair with syndrome identification. It uses a fail-pattern identification and a syndrome-format structure to identify faulty rows, faulty columns and single faulty word in the memory during the testing process, then exports the syndrome information. Based on the syndrome information, a redundancy analysis algorithm is applied to allocate the spare memory elements repairing the faulty memory cells. It has a sequencer with enhanced fault syndrome identification, a build-in redundancy-analysis circuit with improved redundancy utilization, and an address reconfigurable circuit with reduced timing penalty during normal access. The invention reduces the occupation time and the required capture memory space in the automatic test equipment. It also increases the repair rate and reduces the required area overhead.
Abstract:
The air pump is installed on the frame of a bicycle which utilizes the sprocket of the bicycle as the power source. The air pump contains a cylinder member, a transmission member, and a positioning member. The positioning and transmission members are connected to the cylinder member. The positioning member allows the adjustment and positioning of the cylinder member along the bicycle frame so that the cylinder member can be engaged by a front sprocket of the bicycle. The transmission member contains a shaft and a gear. The shaft has one end connected to the cylinder member and another end connected to the gear. When a rider rotates the front sprocket, the rotational power is delivered to the gear and then to the shaft of the transmission member, which in turn drives the cylinder member to pump air for inflation.
Abstract:
A cable winding mechanism with reduced friction includes a cable, a case, a reel disc, a spring device, a roller and a friction-reducing member. The case includes a first case element and a second case element, wherein a cable locking structure is formed in an inner surface of the second case element. The reel disc has a confining groove. The roller is movable along the confining groove of the reel disc. When a pulling operation of the cable causes the roller to move in the cable locking structure of the second case element, a desired length of the cable is pulled out and locked. When the roller is detached from the cable locking structure, the cable pulled outside the case is rewound on the reel disc. The friction-reducing member is disposed on the reel disc for reducing friction during the process of pulling out or rewinding the cable.
Abstract:
A wrapper testing circuit of system-on-a-chip for electrical tests of at least a core circuit of an integrated circuit and a wrapper testing method thereof are provided. A controller outputs control signals and test signals and receives result signals executed by the core circuit. The wrapper testing circuit comprises a decoding logic and a plurality of wrapper boundary registers. The decoding logic has a signal decoding table which receives and decodes the control signals and then issues decoded signals according to the signal decoding table. The WBR shifts, updates and captures the test signals for the core circuit to execute and output the result signals according to the decoded signals. In comparison with prior art, the testing time is reduced.
Abstract:
Disclosed is a scan test data compression method and decoding apparatus for multiple-scan-chain designs. The apparatus comprises a on-chip decoder connected to a tester. The decoder includes a decoding buffer configured as a multilayer architecture, a controller, and a switching box for receiving a shift signal or a copy signal. The decoding buffer is used to store decoded test data. While the decoder decodes the encoded data, it transmits control signals to both the decoding buffer and the switching box from the controller, and sends the decoded data to scan chains of a CUT for testing through the decoding buffer. This invention has the advantages of simple encoding method, high compression rate, low power consumption in testing, and without the fault coverage loss.
Abstract:
The present invention provides a method and apparatus for a memory build-in self-diagnosis and repair with syndrome identification. It uses a fail-pattern identification and a syndrome-format structure to identify faulty rows, faulty columns and single faulty word in the memory during the testing process, then exports the syndrome information. Based on the syndrome information, a redundancy analysis algorithm is applied to allocate the spare memory elements repairing the faulty memory cells. It has a sequencer with enhanced fault syndrome identification, a build-in redundancy-analysis circuit with improved redundancy utilization, and an address reconfigurable circuit with reduced timing penalty during normal access. The invention reduces the occupation time and the required capture memory space in the automatic test equipment. It also increases the repair rate and reduces the required area overhead.
Abstract:
An electronic device with a heat-dissipation structure is disclosed. The electronic device comprises a housing, a printed circuit board assembly, and a heat sink. The printed circuit board assembly is disposed in an interior of the housing, and the printed circuit board assembly forms a high-temperatured heat flow area and a low-temperatured heat flow area in the electronic device. The heat sink is disposed between the printed circuit board assembly and the housing and in the low-temperatured heat flow area for balancing heat flow and homogenizing temperature of the electronic device to enhance heat-dissipation efficiency.
Abstract:
The present invention is to provide a case comprising a structure for fastening a sliding button having a fixing member and a manipulating member together forming an L-shaped member, two spaced ribs provided on an inner surface of the manipulating member above the fixing member, and a projection provided on an outer surface of the manipulating member and adapted to insert through an opening of the case and project therefrom to outside of the case while placing the sliding button in the case; and a circuit board threadedly secured to a bottom of the case for clamping the fixing member and thus fastening the sliding button.