公开(公告)号：US20050053321A1

公开(公告)日：2005-03-10

申请号：US10849593

申请日：2004-05-20

申请人： Elefterios Lidorikis ,  Steven Johnson ,  Michelle Povinelli ,  John Joannopoulos

发明人： Elefterios Lidorikis ,  Steven Johnson ,  Michelle Povinelli ,  John Joannopoulos

IPC分类号： G02B6/12 ,  G02B6/126 ,  G02B6/26

CPC分类号： G02B6/1225 ,  B82Y20/00

摘要： A photonic crystal includes a plurality of photonic crystal slabs that is suited for confining TE polarizations and TM polarizations. The photonic crystal slabs include alternating slabs of dielectric rods and air holes. The alternating slabs create a lateral symmetry plane. The alternating slabs of dielectric rods and air holes further include planar line defects resulting in the formation of defect bands inside the bandgap of the photonic crystal.

摘要翻译： 光子晶体包括适合于限制TE极化和TM偏振的多个光子晶体板。 光子晶体板包括介质棒和气孔的交替平板。 交替的平板产生横向对称平面。 介质棒和空气孔的交替平板还包括平面线缺陷，导致在光子晶体的带隙内形成缺陷带。

公开(公告)号：US4933955A

公开(公告)日：1990-06-12

申请号：US161019

申请日：1988-02-26

申请人： Toney Warren ,  Steven Johnson

发明人： Toney Warren ,  Steven Johnson

IPC分类号： H03K5/00 ,  H04J3/06 ,  H04L7/04

CPC分类号： H04J3/0688 ,  H04L7/0037

摘要： The circuitry of the present invention taps a DS0 data stream and outputs a timing signal to drive terminal multiplexers. Even if the data bit stream is lost, the present invention continues to provide proper clocking signals. A composite clock (bit and byte clock) is provided by the present invention with the bit clock at 64 KHz and the byte clock at 8 KHz in the preferred embodiment. To avoid the problem of phase shift over long distances (limiting cable length) the present invention phase adjusts the digital bit stream clocking signal with a 360 degree delay, giving the appearance of advancing the signal in phase. An additional delay of one frame width is applied to the signal. A negative phase delay equivalent to cable runs from 0-1500 feet in 500 foot increments is also applied. In the preferred embodiment, a shift register is tapped in reverse order to accomplish this phase delay.

摘要翻译： 本发明的电路分接DS0数据流并将定时信号输出到驱动终端多路复用器。 即使数据比特流丢失，本发明继续提供适当的时钟信号。 在优选实施例中，本发明提供复合时钟（位和字节时钟），位时钟为64KHz，字节时钟为8KHz。 为了避免长距离相移的问题（限制电缆长度），本发明相位调整了360度延迟的数字比特流计时信号，从而使信号同步进行。 一个帧宽的附加延迟被施加到该信号。 相当于电缆的负相位延迟从0-1500英尺增加到500英尺。 在优选实施例中，以相反的顺序抽头移位寄存器来实现该相位延迟。

公开(公告)号：US4849993A

公开(公告)日：1989-07-18

申请号：US131141

申请日：1987-12-10

申请人： Steven Johnson ,  Toney Warren

发明人： Steven Johnson ,  Toney Warren

IPC分类号： H03L7/14 ,  H04L7/00 ,  H04L7/033

CPC分类号： H03L7/143 ,  H04L7/0083 ,  H03L7/145

摘要： The present invention provides a clock holdover circuit which will provide a replacement clock signal within predetermined parameters independently of time and temperature variations. The circuit of the present invention has only a single component which is time and temperature dependent. By selecting the components parameters to be within the desired tolerances, the accuracy of the circuit is maintained. In the present invention, digital circuitry is combined with an accurate local crystal frequency source to provide a replacement clock signal. The present invention allows phase consistency upon loss of a reference clock signal as well as on return of the reference clock signal. A reference clock signal is phase locked to a VCO to produce a desired output. The frequency of the output is compared to a local frequency standard to generate an offset frequency used to control a frequency synthesizer. The offset frequency is digitally stored. Upon loss of the reference clock signal, the stored offset frequency is used to drive the frequency synthesizer along with the local frequency standard so as to provide an acceptable replacement clock signal. The frequency comparator, storage, and synthesizer are all digital so as to be time and temperature independent. The local frequency standard is crystal based having known time and temperature tolerances. By choosing a local frequency standard having tolerances within a predetermined range, an acceptable clock holdover signal may be provided indefinitely. The replacement clock signal is phase compared to the reference clock signal so that no loss of phase occurs upon reference loss.

摘要翻译： 本发明提供了一种时钟保持电路，其将在独立于时间和温度变化的情况下提供在预定参数内的替换时钟信号。 本发明的电路仅具有时间和温度依赖性的单一部件。 通过选择组件参数在所需的公差范围内，可以保持电路的精度。 在本发明中，数字电路与准确的本地晶体频率源组合以提供替换时钟信号。 本发明允许参考时钟信号丢失以及参考时钟信号返回时的相位一致性。 参考时钟信号被锁相到VCO以产生期望的输出。 将输出的频率与本地频率标准进行比较，以产生用于控制频率合成器的偏移频率。 偏移频率被数字存储。 在丢失参考时钟信号时，存储的偏移频率用于驱动频率合成器以及本地频率标准，以便提供可接受的替换时钟信号。 频率比较器，存储器和合成器都是数字的，以便与时间和温度无关。 本地频率标准是基于晶体的，具有已知的时间和温度公差。 通过选择具有在预定范围内的公差的本地频率标准，可以无限期地提供可接受的时钟保持信号。 替换时钟信号与参考时钟信号进行相位比较，从而在参考损耗时不发生相位损失。

公开(公告)号：US20140090951A1

公开(公告)日：2014-04-03

申请号：US14033484

申请日：2013-09-22

申请人： Steven Johnson ,  Bryan Allen Wilcutt ,  Omar Jorge Rivera ,  Connie R. Masters ,  Scott A. Toth, SR. ,  Daniel Peterson ,  Brian Anthony Montano ,  Dominic Mohrhardt

发明人： Steven Johnson ,  Bryan Allen Wilcutt ,  Omar Jorge Rivera ,  Connie R. Masters ,  Scott A. Toth, SR. ,  Daniel Peterson ,  Brian Anthony Montano ,  Dominic Mohrhardt

IPC分类号： G07D11/00

CPC分类号： G07D11/0018 ,  G07D11/0036 ,  G07D11/0051 ,  G07F19/20 ,  G07F19/205 ,  Y10S902/06 ,  Y10S902/08

摘要： The bezel assembly for data reception, for use with a bill validator in a financial transactional device, includes a bezel housing and a data reception assembly. The bezel housing includes a customer-facing front portion and a back plate connectable to the bill validator that is mounted within the transactional device cabinet. The front portion includes an insertion/dispensing slot for receiving currency and a projecting hollow tongue forward of the casing. The forward-extending hollow tongue accommodates at least a portion of the data reception assembly. The bezel assembly can include a wireless communication function that is communicably connectable with a mobile device via a wireless communication method, a manual entry function, a biometric reader, one or more cameras for scanning and decrypting 2D barcodes and the like, thus enhancing the overall functionality of the financial transactional device.

摘要翻译： 用于数据接收的挡板组件，用于与金融交易设备中的钞票验证器一起使用，包括边框外壳和数据接收组件。 表圈外壳包括面向客户的前部和可连接到安装在事务设备柜内的纸币确认器的后板。 前部包括用于接收货币的插入/分配槽和壳体前方的突出的空心舌状物。 向前延伸的中空的舌头容纳数据接收组件的至少一部分。 挡板组件可以包括通过无线通信方法，手动输入功能，生物测定读取器，用于扫描和解密2D条形码的一个或多个相机等可移动设备可通信地连接的无线通信功能，从而增强整体 金融交易设备的功能。

公开(公告)号：US20140007163A1

公开(公告)日：2014-01-02

申请号：US13534381

申请日：2012-06-27

申请人： Steven Johnson ,  Stephen Glennon

发明人： Steven Johnson ,  Stephen Glennon

IPC分类号： H04N21/482

CPC分类号： H04N21/482 ,  H04N5/44543 ,  H04N21/42209 ,  H04N21/42224 ,  H04N21/4622 ,  H04N21/4722

摘要： An interactive matrix tile transformation user interface is contemplated. The user interface may be configured to facilitate user navigation of a display or other interface through which services may be requested, including facilitating navigation of television related services. The user interface may be operable in a device having capabilities sufficient to control operation of an output device in response to user input.

摘要翻译： 预期交互式矩阵瓦片转换用户界面。 用户界面可以被配置为便于用户导航可以请求服务的显示器或其他接口，包括促进电视相关服务的导航。 用户接口可以在具有足以控制响应于用户输入的输出设备的操作的能力的设备中操作。

公开(公告)号：US20130061586A1

公开(公告)日：2013-03-14

申请号：US13605881

申请日：2012-09-06

申请人： Anthony Bernard Demots ,  Robert Andrew Wade ,  Steven Johnson ,  Michael John Cade

发明人： Anthony Bernard Demots ,  Robert Andrew Wade ,  Steven Johnson ,  Michael John Cade

IPC分类号： F01N13/10 ,  B22D25/00 ,  B21D53/88

CPC分类号： F01N13/1811 ,  F01N13/1861 ,  Y10T29/49398

摘要： A cast exhaust manifold for an engine is disclosed that is fastened to the engine by a number of independent flanges between each pair of which a spacer is positioned to produce an interference fit when the exhaust manifold is at ambient temperature. The use of independent flanges allow the exhaust manifold to expand when heated without creating high levels of internal stress and the spacers prevent undue distortion of the exhaust manifold when the exhaust manifold cools.

摘要翻译： 公开了一种用于发动机的铸造排气歧管，其通过在每对之间的多个独立的凸缘紧固到发动机，间隔件定位成在排气歧管处于环境温度时产生过盈配合。 使用独立的凸缘允许排气歧管在加热时膨胀而不产生高水平的内部应力，并且间隔件防止当排气歧管冷却时排气歧管的不适当的变形。

公开(公告)号：US20110276537A1

公开(公告)日：2011-11-10

申请号：US13099311

申请日：2011-05-02

申请人： Beat Jegerlehner ,  Alex Makarewycz ,  Steven Johnson

发明人： Beat Jegerlehner ,  Alex Makarewycz ,  Steven Johnson

IPC分类号： G06F17/30

CPC分类号： G06F16/27

摘要： Embodiments for methods, systems, apparatuses for an enterprise application providing user control of sharing of data between multiple Enterprise Resource Planning (ERP) systems are disclosed. One method includes identifying types of shared data between the multiple ERPs, conveying the identified shared data types to a user, allowing the user to selectively load shared data to a parent realm based on the identified types of shared data, allowing the user to selectively indicate which data is not to be shared between ERPs to identified child realms, and providing sharing of shared data between child realms.

摘要翻译： 公开了用于在多个企业资源规划（ERP）系统之间提供数据共享的企业应用的方法，系统，装置的实施例。 一种方法包括识别多个ERP之间的共享数据的类型，将所识别的共享数据类型传送给用户，允许用户基于所识别的共享数据类型选择性地将共享数据加载到父域，允许用户选择性地指示 哪些数据不被分配给被确定的子领域的ERP之间，并且在子域之间提供共享数据。

公开(公告)号：US20100234234A1

公开(公告)日：2010-09-16

申请号：US12440832

申请日：2007-09-13

申请人： Paul Ko Ferrigno ,  Christoph Walti ,  David Evans ,  Steven Johnson ,  Alexander Giles Davies

发明人： Paul Ko Ferrigno ,  Christoph Walti ,  David Evans ,  Steven Johnson ,  Alexander Giles Davies

IPC分类号： C40B30/00 ,  C40B40/10 ,  G01F1/64

CPC分类号： G01N33/5438 ,  B01J19/0046 ,  B01J2219/00653 ,  B01J2219/00659 ,  B01J2219/00704 ,  B01J2219/00725

摘要： The invention relates to a method of detecting a structural change in a molecule, said molecule being attached to a surface, said surface being electrically conductive, wherein the phase of the electrochemical impedance at said surface is monitored, and wherein a change in the phase in the electrochemical impedance at said surface indicates a change in the structure of said molecule. The invention further relates to methods for making arrays having molecules such as, polypeptides attached to electrically conductive surfaces such as electrodes, and to arrays.

摘要翻译： 本发明涉及一种检测分子中的结构变化的方法，所述分子附着于表面，所述表面是导电的，其中监测所述表面处的电化学阻抗的相位，并且其中相的变化 所述表面的电化学阻抗表示所述分子的结构的变化。 本发明还涉及制备具有分子的阵列的方法，所述分子例如附着到诸如电极的导电表面上的多肽，以及阵列。

公开(公告)号：US20090047004A1

公开(公告)日：2009-02-19

申请号：US12221981

申请日：2008-08-07

申请人： Steven Johnson ,  Anthony E. Cunha

发明人： Steven Johnson ,  Anthony E. Cunha

IPC分类号： H04N5/00

CPC分类号： H04N5/2624 ,  G11B27/10 ,  G11B27/322 ,  G11B2220/2562 ,  H04N5/85 ,  H04N9/8227 ,  H04N21/21805 ,  H04N21/42646 ,  H04N21/4312 ,  H04N21/4314 ,  H04N21/4325 ,  H04N21/472

摘要： A digital disc interface for a plurality of audio-video streams produced from multiple recordings of an event is described. The video recordings include a primary audio-video recording, as well as one or more participant audio-video recordings. The interface provides time-synchronized rendering of a composite video image of the various video streams, including a main full-size rendering of one video stream, the accompanying audio stream, and miniaturized versions of participant streams. Using a video menu-driven interface, the consumer is able to simultaneously monitor the streams, and when desired, to navigate among the various video streams and select an alternative audio-video stream for full-size rendering and an accompanying audio stream.

摘要翻译： 描述了从事件的多个记录产生的多个音频 - 视频流的数字光盘接口。 视频记录包括主音频视频记录以及一个或多个参与者音频 - 视频记录。 该界面提供了各种视频流的复合视频图像的时间同步呈现，包括一个视频流的主要全尺寸渲染，伴随的音频流和参与者流的小型化版本。 使用视频菜单驱动界面，消费者能够同时监视流，并且当需要时能够在各种视频流之间导航，并且选择用于全尺寸渲染的替代音频 - 视频流和伴随的音频流。

公开(公告)号：USD564981S1

公开(公告)日：2008-03-25

申请号：US29247502

申请日：2006-06-22

申请人： Steven Johnson

设计人： Steven Johnson