公开(公告)号：US09383264B2

公开(公告)日：2016-07-05

申请号：US13428549

申请日：2012-03-23

申请人： Yung-Chow Peng ,  Ching-Ho Chang ,  Jui-Cheng Huang

发明人： Yung-Chow Peng ,  Ching-Ho Chang ,  Jui-Cheng Huang

IPC分类号： G01K7/00 ,  G01K7/01

CPC分类号： G01K7/01 ,  Y10T307/76

摘要： A thermal sensing system includes a circuit having a layout including standard cells arranged in rows and columns. First and second current sources provide first and second currents, respectively. The thermal sensing system includes thermal sensing units, first and second switching modules, and an analog to digital converter (ADC). Each thermal sensing unit is configured to provide a voltage drop dependent on a temperature at that thermal sensing unit. The first switching module is configured to select one of the thermal sensing units. The second switching module includes at least one switch controllable by a control signal. The at least one switch is configured to selectively couple the thermal sensing units, based on the control signal, to one of the first and second current sources, via the first switching module. The ADC is configured to convert an analog voltage, provided by the selected thermal sensing unit, to a digital value.

摘要翻译： 热感测系统包括具有布置成行和列的标准单元的布局的电路。 第一和第二电流源分别提供第一和第二电流。 热感测系统包括热敏单元，第一和第二开关模块以及模数转换器（ADC）。 每个热敏单元被配置成提供取决于该热感测单元处的温度的电压降。 第一开关模块被配置为选择一个热感测单元。 第二开关模块包括可由控制信号控制的至少一个开关。 所述至少一个开关被配置为经由所述第一开关模块将所述热感测单元基于所述控制信号选择性地耦合到所述第一和第二电流源之一。 ADC配置为将所选热敏单元提供的模拟电压转换为数字值。

公开(公告)号：US09158883B2

公开(公告)日：2015-10-13

申请号：US13569717

申请日：2012-08-08

申请人： Yung-Chow Peng ,  Wen-Shen Chou ,  Jaw-Juinn Horng

发明人： Yung-Chow Peng ,  Wen-Shen Chou ,  Jaw-Juinn Horng

IPC分类号： G06F17/50

CPC分类号： H01L27/0207 ,  G06F17/5072 ,  G06F17/5081

摘要： This disclosure relates to a method of making a semiconductor device. The method includes comparing a schematic design of the semiconductor device to a layout design of the semiconductor device. The method further includes generating layout style information based on the layout design and generating array edge information based on the layout design and the schematic design. The method further includes selectively revising the layout design using smart dummy insertion using the layout style information and the array edge information. The method further includes performing a design rule check on the revised layout design using the layout style information and the array edge information. This disclosure also relates to a system for making a semiconductor device and a semiconductor device.

摘要翻译： 本公开涉及制造半导体器件的方法。 该方法包括将半导体器件的示意图设计与半导体器件的布局设计进行比较。 该方法还包括基于布局设计生成布局样式信息，并基于布局设计和原理图设计生成阵列边缘信息。 该方法还包括使用布局样式信息和阵列边缘信息来选择性地修改使用智能虚拟插入的布局设计。 该方法还包括使用布局样式信息和阵列边缘信息对修改的布局设计执行设计规则检查。 本公开还涉及一种用于制造半导体器件和半导体器件的系统。

公开(公告)号：US09016939B2

公开(公告)日：2015-04-28

申请号：US13632498

申请日：2012-10-01

申请人： Ching-Ho Chang ,  Jui-Cheng Huang ,  Yung-Chow Peng

发明人： Ching-Ho Chang ,  Jui-Cheng Huang ,  Yung-Chow Peng

IPC分类号： G01K7/00 ,  G01K7/01

CPC分类号： G01K7/01 ,  G01K15/005

摘要： Some embodiments of the present disclosure relate to a stacked integrated chip structure having a thermal sensor that detects a temperature of one or a plurality of integrated chips. In some embodiments, the stacked integrated chip structure has a main integrated chip and a secondary integrated chip located on an interposer wafer. The main integrated chip has a reference voltage source that generates a bias current. The secondary integrated chip has a second thermal diode that receives the bias current and based thereupon generates a second thermal sensed voltage and a second reference voltage that is proportional to a temperature of the secondary integrated chip. A digital thermal sensor within the main integrated chip determines a temperature of the secondary integrated chip based upon as comparison of the second thermal sensed voltage and the reference voltage.

摘要翻译： 本公开的一些实施例涉及具有检测一个或多个集成芯片的温度的热传感器的堆叠集成芯片结构。 在一些实施例中，堆叠集成芯片结构具有位于插入器晶片上的主集成芯片和次集成芯片。 主集成芯片具有产生偏置电流的参考电压源。 次级集成芯片具有接收偏置电流的第二热二极管，并且基于此产生第二热感测电压和与次级集成芯片的温度成比例的第二参考电压。 基于与第二热感测电压和参考电压的比较，主集成芯片内的数字热传感器确定二次集成芯片的温度。

公开(公告)号：US08847321B2

公开(公告)日：2014-09-30

申请号：US12766972

申请日：2010-04-26

申请人： Fu-Lung Hsueh ,  Chih-Ping Chao ,  Chewn-Pu Jou ,  Yung-Chow Peng ,  Harry-Hak-Lay Chuang ,  Kuo-Tung Sung

发明人： Fu-Lung Hsueh ,  Chih-Ping Chao ,  Chewn-Pu Jou ,  Yung-Chow Peng ,  Harry-Hak-Lay Chuang ,  Kuo-Tung Sung

IPC分类号： H01L29/78 ,  G06F17/50 ,  H01L27/088

CPC分类号： G06F17/5068 ,  G06F17/50 ,  G06F17/5009 ,  H01L27/088 ,  H01L27/0922

摘要： A MOS device includes an active area having first and second contacts. First and second gates are disposed between the first and second contacts. The first gate is disposed adjacent to the first contact and has a third contact. The second gate is disposed adjacent to the second contact and has a fourth contact coupled to the third contact. A transistor defined by the active area and the first gate has a first threshold voltage, and a transistor defined by the active area and the second gate has a second threshold voltage.

摘要翻译： MOS器件包括具有第一和第二触点的有源区。 第一和第二栅极设置在第一和第二触点之间。 第一门被设置成与第一接触相邻并且具有第三接触。 第二栅极被设置成与第二触点相邻并且具有耦合到第三触点的第四触点。 由有源区和第一栅极限定的晶体管具有第一阈值电压，并且由有源区和第二栅极限定的晶体管具有第二阈值电压。

公开(公告)号：US08675724B2

公开(公告)日：2014-03-18

申请号：US12836999

申请日：2010-07-15

申请人： Yung-Chow Peng ,  Yu-Chun Lin

发明人： Yung-Chow Peng ,  Yu-Chun Lin

IPC分类号： H03K5/159

CPC分类号： H04L25/03885 ,  H04L25/03006 ,  H04L25/03057 ,  H04L2025/03535 ,  H04L2025/03681 ,  H04L2025/03707 ,  H04L2025/03745

摘要： A method for updating a tap coefficient of a decision feedback equalizer is provided. The method includes sampling a first input signal received by a sampler of a decision feedback equalizer. It is determined if an amplitude of the first input signal falls within a range defined between a first predetermined voltage level and a second predetermined voltage level. If the amplitude of the first input signal falls outside the range, a tap coefficient is updated to generate an updated tap coefficient that is fed back to adjust an amplitude of a second input signal received at an input end of the decision feedback equalizer. If the amplitude of the first input signal falls within the range, the tap coefficient is free from being updated.

摘要翻译： 提供了一种用于更新判决反馈均衡器的抽头系数的方法。 该方法包括对由判决反馈均衡器的采样器接收的第一输入信号进行采样。 确定第一输入信号的振幅是否落在在第一预定电压电平和第二预定电压电平之间限定的范围内。 如果第一输入信号的振幅超出该范围，则抽头系数被更新以产生被反馈的更新抽头系数，以调整在判决反馈均衡器的输入端接收的第二输入信号的幅度。 如果第一输入信号的振幅落在该范围内，则抽头系数不被更新。

公开(公告)号：US20120218235A1

公开(公告)日：2012-08-30

申请号：US13035444

申请日：2011-02-25

申请人： Yung-Chow Peng ,  Jui-Cheng Huang ,  Ching-Ho Chang ,  Nang Ping Tu

发明人： Yung-Chow Peng ,  Jui-Cheng Huang ,  Ching-Ho Chang ,  Nang Ping Tu

IPC分类号： G06F3/038 ,  G09G3/36 ,  H03M1/66

CPC分类号： H03M1/68 ,  G09G3/3688 ,  G09G2300/023 ,  G09G2310/027 ,  G09G2330/023 ,  H03M1/804

摘要： A method for converting a multi-bit digital value to an analog value. The method includes, in a first conversion cycle, converting a first set of digital bits to a first analog voltage using passive charge-sharing. The method also includes, in a second conversion cycle, converting a second set of digital bits to a second analog voltage added to the first analog voltage using active charge-sharing. The first set of digital bits and the second set of digital bits are different bits of the multi-bit digital value.

摘要翻译： 一种用于将多位数字值转换为模拟值的方法。 该方法包括在第一转换周期中，使用无源电荷共享将第一组数字位转换为第一模拟电压。 该方法还包括在第二转换周期中，使用有源电荷共享将第二组数字位转换为添加到第一模拟电压的第二模拟电压。 第一组数字位和第二组数字位是多位数字值的不同位。

公开(公告)号：US08130036B2

公开(公告)日：2012-03-06

申请号：US12917652

申请日：2010-11-02

申请人： Yu-Wei Lin ,  Yung-Chow Peng

发明人： Yu-Wei Lin ,  Yung-Chow Peng

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/45475 ,  H03F3/45632 ,  H03F3/45928 ,  H03F2203/45512 ,  H03F2203/45588

摘要： A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.

摘要翻译： 电路提供对应于差分输入Inn和Inp的第一电流，以及对应于共模输入Vcm的第二电流。 电路然后将差分电流和共模电流反射到第三电流和第四电流。 基于镜像差分电流和镜像共模电流之间的差异，电路拉起或拉下这些电流，以平衡差分输入和共模输入之间的相应差值。 实际上，该电路将输入共模电压调整到期望的电平，而不给它提供上升到不需要的电平的机会。

公开(公告)号：US20100020862A1

公开(公告)日：2010-01-28

申请号：US12180390

申请日：2008-07-25

申请人： Yung-Chow Peng

发明人： Yung-Chow Peng

IPC分类号： H03H7/30

CPC分类号： H04B1/036

摘要： This invention discloses a tap circuit in a summer of a decision feedback equalizer (DFE), the tap circuit comprises a differential pair of received signal lines, a current source having a magnitude being substantially proportional to a tap weight coupled between a first node and a ground, a plurality of NMOS transistors controllably coupled the current source to either one of the received signal lines, and DFE data signals and DEF logic sign signals being coupled only to the gates of the plurality of NMOS transistors, wherein tap circuit can operate at low supply voltage without losing speed.

摘要翻译： 本发明公开了一种在判决反馈均衡器（DFE）的加法器中的抽头电路，抽头电路包括差分对的接收信号线，电流源的幅度基本上与耦合在第一节点和第 接地，可控地将电流源耦合到接收信号线中的任一个的多个NMOS晶体管，以及只耦合到多个NMOS晶体管的栅极的DFE数据信号和DEF逻辑符号信号，其中分接电路可以在低电平 电源电压不失速。

公开(公告)号：US07043223B2

公开(公告)日：2006-05-09

申请号：US10632194

申请日：2003-07-31

申请人： Yi Lu ,  Yung-Chow Peng

发明人： Yi Lu ,  Yung-Chow Peng

IPC分类号： H04B1/16

CPC分类号： H04B1/30 ,  H03D11/02

摘要： A high sensitivity of a Super-Regenerative Radio Frequency Receiver and its method is provided in the embodiment of the present invention. By using a common-mode feedback circuit and by replacing the rectifier with a feedback integral-rectifier, the rectifier, the low-pass filter, and the slicer will not be saturated during operation so that the output of the slicer is correctly generated, and the sensitivity of the Super-Regenerative Radio Frequency Receiver is greatly improved as a result.

摘要翻译： 在本发明的实施例中提供了超级再生射频接收机的高灵敏度及其方法。 通过使用共模反馈电路并通过用反馈整流器代替整流器，整流器，低通滤波器和限幅器在运行期间将不会饱和，以便切片器的输出被正确地产生，以及 因此，超级再生射频接收机的灵敏度大大提高。

公开(公告)号：US6084961A

公开(公告)日：2000-07-04

申请号：US73298

申请日：1998-05-05

申请人： Bar-Chung Hwang ,  Jizoo Lin ,  Gwo-Shu Chiou ,  Yung-Chow Peng

发明人： Bar-Chung Hwang ,  Jizoo Lin ,  Gwo-Shu Chiou ,  Yung-Chow Peng

IPC分类号： H04M19/00 ,  H04M1/00

CPC分类号： H04M19/00

摘要： A circuit for monitoring battery voltages of a telephone terminal facility is disclosed. This circuit mainly includes a ringing detection circuit for generating a pulse signal in response to an off-hook signal or a ringing signal, a power detecting circuit for detecting battery voltages and a latch being in series connection with the power detecting circuit for outputting a signal showing a status of the detected battery voltages. The power detecting circuit and the latch are of an edge-triggered type and are activated only when a handset of a telephone is picked up or a ringing signal is received so that both the consumed power and the voltage variations are low.

摘要翻译： 公开了一种用于监视电话终端设备的电池电压的电路。 该电路主要包括响应于摘机信号或振铃信号产生脉冲信号的振铃检测电路，用于检测电池电压的功率检测电路和与功率检测电路串联连接的锁存器，用于输出信号 显示检测到的电池电压的状态。 功率检测电路和锁存器是边缘触发型的，并且只有在接收到电话的手机或者接收到振铃信号时激活，以便消耗功率和电压变化都低。