Adaptive equalization processing circuit and adaptive equalization processing method
    1.
    发明授权
    Adaptive equalization processing circuit and adaptive equalization processing method 有权
    自适应均衡处理电路和自适应均衡处理方法

    公开(公告)号:US09559876B2

    公开(公告)日:2017-01-31

    申请号:US14889652

    申请日:2014-05-23

    发明人: Noriaki Sumita

    摘要: Provided is an adaptive equalization processing circuit with which an adaptive equalization process converges in a stable manner without reducing the transmission efficiency. This adaptive equalization processing circuit is characterized by being equipped with: a demodulation means that demodulates a received signal, and generates and outputs a training signal; an adaptive equalization processing means that uses a tap coefficient (generated using the received signal or the training signal) to perform an adaptive equalization process for removing waveform distortion in the received signal, and then outputs an equalization output signal; and a selection means that selects the training signal when the adaptive equalization processing means is in a non-convergent state, and inputs the training signal to the adaptive equalization processing means.

    摘要翻译: 提供了一种自适应均衡处理电路,其中自适应均衡处理以稳定的方式收敛而不降低传输效率。 该自适应均衡处理电路的特征在于配备有:解调装置,对接收到的信号进行解调,生成并输出训练信号; 使用抽头系数(使用接收信号或训练信号生成)的自适应均衡处理装置执行用于去除接收信号中的波形失真的自适应均衡处理,然后输出均衡输出信号; 以及选择装置,其在自适应均衡处理装置处于非收敛状态时选择训练信号,并将训练信号输入到自适应均衡处理装置。

    Loop Adaptation Control With Pattern Detection
    2.
    发明申请
    Loop Adaptation Control With Pattern Detection 有权
    带有模式检测的环路适配控制

    公开(公告)号:US20170005838A1

    公开(公告)日:2017-01-05

    申请号:US14788765

    申请日:2015-06-30

    IPC分类号: H04L25/03

    摘要: An apparatus for controlling a feedback loop includes a digital finite impulse response filter configured to equalize digital samples to yield equalized data, a data detector circuit configured to detect values of the equalized data to yield detected data, a pattern detection circuit configured to detect at least one pattern in the detected data, an expected value comparison circuit configured to compare the digital samples corresponding to the at least one pattern with an expected value, and a feedback loop adaptation circuit configured to control a feedback loop based in part on whether the at least one pattern is detected by the pattern detection circuit and on an output of the expected value comparison circuit.

    摘要翻译: 一种用于控制反馈回路的装置包括:数字有限脉冲响应滤波器,被配置为均衡数字样本以产生均衡数据;数据检测器电路,被配置为检测均衡数据的值以产生检测数据;模式检测电路,被配置为至少检测 检测数据中的一个模式,被配置为将对应于至少一个模式的数字采样与预期值进行比较的预期值比较电路,以及被配置为基于至少是否至少 模式检测电路和预期值比较电路的输出检测一个图案。

    Dynamic task scheduling for multi-receive-path equalizer
    3.
    发明授权
    Dynamic task scheduling for multi-receive-path equalizer 有权
    多接收路径均衡器的动态任务调度

    公开(公告)号:US09148319B2

    公开(公告)日:2015-09-29

    申请号:US14344474

    申请日:2013-02-20

    IPC分类号: H04K1/10 H04L25/03

    摘要: Dynamically scheduling multi-receive-path signal equalizer tasks. An estimated maximum Doppler frequency and an estimated delay spread of a particular wireless communications channel may be determined at a particular time. A particular task queue format and a particular predictor model order update period may be identified based on the estimated maximum Doppler frequency and delay spread. A particular predictor model order update rate may be selected based on the identified particular equalizer task queue format. A plurality of task control signals may be generated based on the particular task queue format, the particular predictor model order-update period, and the particular predictor model order-search range, to control equalizer coefficient generation within a particular time period.

    摘要翻译: 动态调度多接收路径信号均衡器任务。 可以在特定时间确定特定无线通信信道的估计的最大多普勒频率和估计的延迟扩展。 可以基于估计的最大多普勒频率和延迟扩展来识别特定任务队列格式和特定​​预测器模型顺序更新周期。 可以基于所识别的特定均衡器任务队列格式来选择特定预测器模型订单更新速率。 可以基于特定任务队列格式,特定预测器模型顺序更新周期和特定预测器模型顺序搜索范围来生成多个任务控制信号,以在特定时间段内控制均衡器系数生成。

    Transceiver employing training-while-working mode
    9.
    发明授权
    Transceiver employing training-while-working mode 有权
    收发器采用训练同时工作模式

    公开(公告)号:US07227891B2

    公开(公告)日:2007-06-05

    申请号:US10008069

    申请日:2001-11-05

    申请人: Zhenyu Wang

    发明人: Zhenyu Wang

    IPC分类号: H04M1/00 H03H7/30 H04L5/16

    摘要: A data communication transceiver, such as a PCM or xDSL modem, is operable in a training-while-working mode in which it both trains and communicates user data. In some embodiments, upon initiation of a data communication session, the transceiver operates in a startup training mode in which partial training occurs that is sufficient to enable low rate data communication; the transceiver then enters the training-while-working mode in which it communicates user data and completes training. When training is completed, the transceiver enters a data mode in which it communicates user data but does not train. In some embodiments, if in the data mode conditions arise requiring retraining or making retraining desirable, the transceiver enters the training-while-working mode and retrains while continuing to communicate user data.

    摘要翻译: 诸如PCM或xDSL调制解调器的数据通信收发器可以在训练同时工作的模式中操作,其中它训练和传送用户数据。 在一些实施例中,在数据通信会话开始时,收发器以启动训练模式工作,其中出现部分训练足以实现低速率数据通信; 然后收发器进入其中传达用户数据并完成训练的同时工作模式。 训练完成后,收发器进入数据模式,在该模式下,用户数据进行通信,但不进行训练。 在一些实施例中,如果在数据模式中出现需要再训练或需要再培训的条件,则收发器进入同步工作模式并在继续传送用户数据的同时继续训练。