公开(公告)号：US09158883B2

公开(公告)日：2015-10-13

申请号：US13569717

申请日：2012-08-08

申请人： Yung-Chow Peng ,  Wen-Shen Chou ,  Jaw-Juinn Horng

发明人： Yung-Chow Peng ,  Wen-Shen Chou ,  Jaw-Juinn Horng

IPC分类号： G06F17/50

CPC分类号： H01L27/0207 ,  G06F17/5072 ,  G06F17/5081

摘要： This disclosure relates to a method of making a semiconductor device. The method includes comparing a schematic design of the semiconductor device to a layout design of the semiconductor device. The method further includes generating layout style information based on the layout design and generating array edge information based on the layout design and the schematic design. The method further includes selectively revising the layout design using smart dummy insertion using the layout style information and the array edge information. The method further includes performing a design rule check on the revised layout design using the layout style information and the array edge information. This disclosure also relates to a system for making a semiconductor device and a semiconductor device.

摘要翻译： 本公开涉及制造半导体器件的方法。 该方法包括将半导体器件的示意图设计与半导体器件的布局设计进行比较。 该方法还包括基于布局设计生成布局样式信息，并基于布局设计和原理图设计生成阵列边缘信息。 该方法还包括使用布局样式信息和阵列边缘信息来选择性地修改使用智能虚拟插入的布局设计。 该方法还包括使用布局样式信息和阵列边缘信息对修改的布局设计执行设计规则检查。 本公开还涉及一种用于制造半导体器件和半导体器件的系统。

公开(公告)号：US20120212208A1

公开(公告)日：2012-08-23

申请号：US13460432

申请日：2012-04-30

申请人： Chi-Ping Yao ,  Wen-Shen Chou

发明人： Chi-Ping Yao ,  Wen-Shen Chou

IPC分类号： G05F3/16

CPC分类号： G05F3/30

摘要： A method includes generating a first current, wherein the first current flows through a first resistor and a first bipolar transistor. A first end of the first resistor is serially connected to an emitter-collector path of the first bipolar transistor, and a second end of the resistor is connected to an input of an operational amplifier. A second current is generated to flow through a second resistor that is connected to the input of the operational amplifier. An emitter of a second bipolar transistor is connected to a base of the first bipolar transistor, wherein a base and a collector of the second bipolar transistor are connected to VSS. The first and the second currents are added to generate a third current, which is mirrored to generate a fourth current proportional to the third current. The fourth current is conducted through a third resistor to generate an output reference voltage.

摘要翻译： 一种方法包括产生第一电流，其中第一电流流过第一电阻器和第一双极晶体管。 第一电阻器的第一端串联连接到第一双极晶体管的发射极 - 集电极路径，并且电阻器的第二端连接到运算放大器的输入端。 产生第二电流以流过连接到运算放大器的输入端的第二电阻器。 第二双极晶体管的发射极连接到第一双极晶体管的基极，其中第二双极晶体管的基极和集电极连接到VSS。 添加第一和第二电流以产生第三电流，其被镜像以产生与第三电流成比例的第四电流。 第四电流通过第三电阻器传导以产生输出参考电压。

公开(公告)号：US07852250B2

公开(公告)日：2010-12-14

申请号：US12340462

申请日：2008-12-19

申请人： Mei-Chen Chuang ,  Wen-Shen Chou

发明人： Mei-Chen Chuang ,  Wen-Shen Chou

IPC分类号： H03M1/66

CPC分类号： H03M1/687 ,  H03M1/745 ,  H03M1/747

摘要： This invention discloses a digital to analog converter (DAC) for converting a digital signal with a predetermined number of bits to a corresponding analog signal, the DAC comprises a first current source element having a first control signal, the first control signal controlling the conduction current provided by the first current source element, and a second current source element having a second control signal, the second control signal controlling the conduction current provided by the second current source element, wherein the first and the second control signals have different voltages during operation of the DAC.

摘要翻译： 本发明公开了一种用于将预定位数的数字信号转换为相应模拟信号的数模转换器（DAC），该DAC包括具有第一控制信号的第一电流源元件，第一控制信号控制导通电流 由第一电流源元件提供，以及具有第二控制信号的第二电流源元件，所述第二控制信号控制由第二电流源元件提供的传导电流，其中第一和第二控制信号在运行期间具有不同的电压 DAC。

公开(公告)号：US20100283642A1

公开(公告)日：2010-11-11

申请号：US12708417

申请日：2010-02-18

申请人： Yu-Jen Lai ,  Mei-Chen Chuang ,  Wen-Shen Chou

发明人： Yu-Jen Lai ,  Mei-Chen Chuang ,  Wen-Shen Chou

IPC分类号： H03M1/10 ,  H03M1/66

CPC分类号： H03M1/1061 ,  H03M1/687 ,  H03M1/745 ,  H03M1/747

摘要： A system for converting a digital signal to an analog signal is provided. The present invention provides a digital-to-analog converter (DAC) that can convert a large bit value digital signal to a corresponding analog signal. The digital-to-analog converter includes a bias regeneration circuit, and three sub-DACs. The bias regeneration circuit provides biasing to the three sub-DACs allowing the DAC to be implemented with smaller circuit area. In addition, the three sub-DACs may be digitally calibrated during the conversion process to increase the linearity of the DAC.

摘要翻译： 提供了一种将数字信号转换为模拟信号的系统。 本发明提供一种数模转换器（DAC），其可以将大比特数字数字信号转换成对应的模拟信号。 数模转换器包括偏置再生电路和三个子DAC。 偏置再生电路为三个子DAC提供偏置，允许以较小的电路面积实现DAC。 此外，三个子DAC可以在转换过程中进行数字校准，以增加DAC的线性度。

公开(公告)号：US08232903B2

公开(公告)日：2012-07-31

申请号：US12771327

申请日：2010-04-30

申请人： Ying-Chih Hsu ,  Wen-Shen Chou

发明人： Ying-Chih Hsu ,  Wen-Shen Chou

IPC分类号： H03M1/66

CPC分类号： H03M1/0648 ,  G06F17/5063 ,  H03M1/742

摘要： A current cell array includes a number of current cell groups arranged such that they extend in a first direction. Each of the current cell groups is identified by a first identifier that increases in a direction of a gradient across the current cell array. A number of current cells are included in each of the current cell groups. Each of the current cells is identified by a respective second identifier that increases in the direction of the gradient across the current cell array. The current cells are positioned in the current cell groups based on the first and second identifiers.

摘要翻译： 当前单元阵列包括多个当前单元组，其布置使得它们沿第一方向延伸。 当前单元组中的每一个由在当前单元阵列上的梯度方向上增加的第一标识符来标识。 在当前单元组的每一个中包括许多当前单元。 当前小区中的每一个由相应的第二标识符识别，该第二标识符沿着当前小区阵列的梯度方向增加。 基于第一和第二标识符将当前小区定位在当前小区组中。

公开(公告)号：US20110279150A1

公开(公告)日：2011-11-17

申请号：US12889492

申请日：2010-09-24

申请人： Yung-Chow PENG ,  Wen-Shen CHOU ,  Ching-Ho CHANG ,  Wan-Te CHEN

发明人： Yung-Chow PENG ,  Wen-Shen CHOU ,  Ching-Ho CHANG ,  Wan-Te CHEN

IPC分类号： H03K3/00

CPC分类号： G09G3/3688 ,  G09G2310/027

摘要： A driver utilizes selective biasing of the terminal of an operational amplifier to reduce offset in the operational amplifier output. Each operational amplifier input includes a differential input pair of transistors including a NMOS transistor and PMOS transistor. At low and high ends of the input voltage range these transistors are selectively and individually coupled to either a standard input or biased to be on so as to contribute offset for offset compensation. The transistors are biased in a conventional manner for input voltages between the low and high ends of the voltage range.

摘要翻译： 驱动器利用运算放大器的端子的选择性偏置来减小运算放大器输出中的偏移。 每个运算放大器输入包括包括NMOS晶体管和PMOS晶体管的差分输入对晶体管。 在输入电压范围的低端和高端，这些晶体管选择性地和单独地耦合到标准输入或偏置为导通，以便补偿偏移补偿。 晶体管以常规方式偏置，用于在电压范围的低端和高端之间的输入电压。

公开(公告)号：US20110267213A1

公开(公告)日：2011-11-03

申请号：US12771327

申请日：2010-04-30

申请人： Ying-Chih HSU ,  Wen-Shen Chou

发明人： Ying-Chih HSU ,  Wen-Shen Chou

IPC分类号： H03M1/66 ,  G06F17/50

CPC分类号： H03M1/0648 ,  G06F17/5063 ,  H03M1/742

摘要： A current cell array includes a number of current cell groups arranged such that they extend in a first direction. Each of the current cell groups is identified by a first identifier that increases in a direction of a gradient across the current cell array. A number of current cells are included in each of the current cell groups. Each of the current cells is identified by a respective second identifier that increases in the direction of the gradient across the current cell array. The current cells are positioned in the current cell groups based on the first and second identifiers.

摘要翻译： 当前单元阵列包括多个当前单元组，其布置使得它们沿第一方向延伸。 当前单元组中的每一个由在当前单元阵列上的梯度方向上增加的第一标识符来标识。 在当前单元组的每一个中包括许多当前单元。 当前小区中的每一个由相应的第二标识符识别，该第二标识符沿着当前小区阵列的梯度方向增加。 基于第一和第二标识符将当前小区定位在当前小区组中。

公开(公告)号：US08013770B2

公开(公告)日：2011-09-06

申请号：US12331049

申请日：2008-12-09

申请人： Robit Yang ,  Ying-Chi Hsu ,  You-Cheng Xiao ,  Wen-Shen Chou

发明人： Robit Yang ,  Ying-Chi Hsu ,  You-Cheng Xiao ,  Wen-Shen Chou

IPC分类号： H03M1/66

CPC分类号： H03M1/0651 ,  H03M1/0648 ,  H03M1/682 ,  H03M1/687 ,  H03M1/747

摘要： A digital-to-analog converter (DAC) for converting a digital signal to an analog signal includes a first thermometer decoder and a second thermometer decoder. The first thermometer decoder is configured to decode most-significant bits (MSBs) of the digital signal to generate a first thermometer code. The second thermometer decoder is configured to decode middle bits of the digital signal to generate a second thermometer code. The DAC further includes a plurality of macro cells with each controlled by one bit of the first thermometer code. The plurality of macro cells is configured to provide a first analog signal according to the first thermometer code. The DAC further includes a macro cell configured to provide a second analog signal according to the second thermometer code. The macro cell is further configured to provide a third analog signal according to least-significant bits (LSBs) of the digital signal.

摘要翻译： 用于将数字信号转换为模拟信号的数模转换器（DAC）包括第一温度计解码器和第二温度计解码器。 第一温度计解码器被配置为解码数字信号的最高有效位（MSB），以产生第一温度计代码。 第二温度计解码器被配置为解码数字信号的中间位以产生第二温度计代码。 DAC还包括多个宏单元，每个宏单元由第一温度计代码的一位控制。 多个宏小区被配置为根据第一温度计代码提供第一模拟信号。 DAC还包括配置成根据第二温度计代码提供第二模拟信号的宏单元。 宏小区还被配置为根据数字信号的最低有效位（LSB）提供第三模拟信号。

公开(公告)号：US07978110B2

公开(公告)日：2011-07-12

申请号：US12708417

申请日：2010-02-18

申请人： Yu-Jen Lai ,  Mei-Chen Chuang ,  Wen-Shen Chou

发明人： Yu-Jen Lai ,  Mei-Chen Chuang ,  Wen-Shen Chou

IPC分类号： H03M1/66

CPC分类号： H03M1/1061 ,  H03M1/687 ,  H03M1/745 ,  H03M1/747

摘要： A system for converting a digital signal to an analog signal is provided. The present invention provides a digital-to-analog converter (DAC) that can convert a large bit value digital signal to a corresponding analog signal. The digital-to-analog converter includes a bias regeneration circuit, and three sub-DACs. The bias regeneration circuit provides biasing to the three sub-DACs allowing the DAC to be implemented with smaller circuit area. In addition, the three sub-DACs may be digitally calibrated during the conversion process to increase the linearity of the DAC.

摘要翻译： 提供了一种将数字信号转换为模拟信号的系统。 本发明提供一种数模转换器（DAC），其可以将大比特数字数字信号转换成对应的模拟信号。 数模转换器包括偏置再生电路和三个子DAC。 偏置再生电路为三个子DAC提供偏置，允许以较小的电路面积实现DAC。 此外，三个子DAC可以在转换过程中进行数字校准，以增加DAC的线性度。

公开(公告)号：US20100207597A1

公开(公告)日：2010-08-19

申请号：US12617933

申请日：2009-11-13

申请人： Chi-Ping Yao ,  Wen-Shen Chou

发明人： Chi-Ping Yao ,  Wen-Shen Chou

IPC分类号： G05F3/16

CPC分类号： G05F3/30

摘要： A circuit includes an operational amplifier including a first input and a second input. A first resistor has a first end coupled to the first input. A first bipolar transistor includes a first emitter coupled to a second end of the first resistor, and a first base. A second bipolar transistor includes a second emitter coupled to the second input, and a second base. A third bipolar transistor includes a third emitter coupled to the first base, a first collector, and a third base connected to the first collector. A fourth bipolar transistor includes a fourth emitter coupled to the second base, a second collector, and a fourth base connected to the second collector. A second resistor is coupled to the first input, wherein the second resistor is parallel to the first resistor and the first bipolar transistor.

摘要翻译： 电路包括运算放大器，包括第一输入和第二输入。 第一电阻器具有耦合到第一输入的第一端。 第一双极晶体管包括耦合到第一电阻器的第二端的第一发射极和第一基极。 第二双极晶体管包括耦合到第二输入端的第二发射极和第二基极。 第三双极晶体管包括耦合到第一基极的第三发射极，第一集电极和连接到第一集电极的第三基极。 第四双极晶体管包括耦合到第二基极的第四发射极，第二集电极和连接到第二集电极的第四基极。 第二电阻器耦合到第一输入端，其中第二电阻器平行于第一电阻器和第一双极晶体管。