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公开(公告)号:US09886050B2
公开(公告)日:2018-02-06
申请号:US15126929
申请日:2014-11-14
发明人: Shengdong Zhang , Congwei Liao , Zhijin Hu , Wenjie Li , Junmei Li
CPC分类号: G05F1/625 , G09G3/20 , G09G3/2092 , G09G2300/0408 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0289 , G09G2310/08 , G09G2330/021 , G11C19/184
摘要: An adaptive voltage source, comprising a signal output end, and a reference resistance forming circuit and a sensing module connected in series between a voltage source and a low power level; the sensing module comprises a sensing end coupled to a transistor to be sensed to sense the threshold voltage drift of the transistor to be sensed in a device circuit; the equivalent resistance of the sensing module increases with the increase of the sensed threshold voltage drift; and the signal output end is coupled to a first node coupled to the reference resistance forming circuit and the sensing module, and is used to output adaptive voltage. The output adaptive voltage is adjusted via the threshold voltage drift sensed by the sensing module. Based on the circuit, also disclosed are a shift register and unit thereof, and display.
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公开(公告)号:US20170270862A1
公开(公告)日:2017-09-21
申请号:US15310086
申请日:2014-11-07
发明人: Shengdong ZHANG , Cuicui WANG , Chuanli LENG , Longyan WANG
IPC分类号: G09G3/3258 , G09G3/3291 , G09G3/3266
CPC分类号: G09G3/3233 , G09G3/3291 , G09G2300/043 , G09G2300/0439 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08 , G09G2320/043
摘要: A pixel circuit, a drive method based on the pixel circuit, and a display device. The pixel circuit comprises: a first capacitor (C1), a second capacitor (C2), a second transistor (T2), a third transistor (T3) and a light-emitting branch for being coupled between a first common electrode (VDD) and a second common electrode (VSS); wherein the light-emitting branch comprises a first transistor (T1), a fourth transistor (T4) and a light-emitting element (OLED) which are connected in series; a first electrode of the first transistor (T1) is coupled to a second electrode of the fourth transistor (T4), and a coupling node is a third node (C); and a control electrode of the fourth transistor (T4) is used for inputting a second scanning control signal (VEM), and the fourth transistor (T4) switches the ON/OFF state of the light-emitting branch in response to the second scanning control signal (VEM). At the programming stage, a threshold voltage of the first transistor (T1) is input to a first node (A) through the third transistor (T3) and is stored; and at the light-emitting stage, a light-emitting current for driving the light-emitting element (OLED) is generated according to information about a voltage difference across two ends of the first capacitor (C1). The pixel circuit is used for compensating for the threshold voltage shift of the first transistor (T1) and the light-emitting element (OLED).
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公开(公告)号:US20170213500A1
公开(公告)日:2017-07-27
申请号:US15329143
申请日:2014-11-14
发明人: Shengdong ZHANG , Congwei LIAO , Zhijin HU , Wenjie LI , Junmei LI
CPC分类号: G09G3/2092 , G09G3/20 , G09G3/36 , G09G3/3677 , G09G2300/043 , G09G2300/0809 , G09G2310/0286 , G09G2330/028 , G11C5/145 , G11C19/28 , H02M3/07
摘要: A controllable voltage source, comprising a control module (1), a storage module (2) and an output module (3); the control module (1) is coupled between a high level end and a low level end; the storage module (2) comprises a storage capacitor; two ends of the storage capacitor are respectively coupled to the control module (1) to form a first terminal and a second terminal; the output module (3) is coupled to the second terminal, and the signal output end thereof is used to output to an external circuit the voltage signal of the controllable voltage source; the control module (1) responds the effective level of a first clock signal so as to enable the first terminal to be coupled to the high level end, and the first terminal is charged from the high level end; the control module (1) responds the effective level of a second clock signal so as to enable the second terminal to be coupled to the high level end, and the second terminal is charged from the high level end; and the first terminal is coupled to the low level end and discharges via the low level end. The effective level of the first clock signal does not overlap with the effective level of the second clock signal. Also disclosed are a shift register and unit thereof, and display based on the controllable voltage source.
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公开(公告)号:US09679771B1
公开(公告)日:2017-06-13
申请号:US14998926
申请日:2016-03-07
发明人: Yijian Chen
IPC分类号: H01L21/331 , H01L21/033
CPC分类号: H01L21/0337
摘要: Design and fabrication methods to reduce the effect of edge-placement errors in the cut-hole patterning process are invented using selective etching and dual-material self-aligned multiple patterning processes. The invented methods consist of a series of processing steps to decompose the original cut-hole mask into multiple separate masks, pattern the cut holes on the resist to expose certain targeted lines, and selectively etch the exposed targeted lines (formed by dual-material self-aligned multiple patterning processes) without attacking the non-target lines. This invention provides production-worthy methods for the semiconductor industry to continue IC scaling down to sub-10 nm half pitch.
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25.
公开(公告)号:US09647698B2
公开(公告)日:2017-05-09
申请号:US13978315
申请日:2013-02-26
CPC分类号: H03M13/617 , G06F11/1076 , G06F11/1088 , H03M13/373
摘要: The invention relates to a method for encoding MSR (Minimum-storage Regenerating) codes, which comprises the following steps of: acquiring n first data packets which are represented by Si, i=1, 2, . . . , n; setting n storage nodes and a positive integer k, wherein n=2K; respectively adding a specified number of 0 bits on data heads or data tails of subsequent successive k first data packets by taking the next first data packet of the ith first data packet as a starting point, acquiring k second data packets, and acquiring an encoded data packet by computing the k second data packets; repeating the above steps and acquiring n encoded data packets which are represented by Pi, i=1, 2, . . . , n; and storing the ith first data packet and the encoded data packet acquired by taking the next first data packet of the first data packet as the starting point into the ith storage node.
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公开(公告)号:US20170097650A1
公开(公告)日:2017-04-06
申请号:US15126929
申请日:2014-11-14
发明人: Shengdong ZHANG , Congwei LIAO , Zhijin HU , Wenjie LI , Junmei LI
CPC分类号: G05F1/625 , G09G3/20 , G09G3/2092 , G09G2300/0408 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0289 , G09G2310/08 , G09G2330/021 , G11C19/184
摘要: An adaptive voltage source, comprising a signal output end, and a reference resistance forming circuit and a sensing module connected in series between a voltage source and a low power level; the sensing module comprises a sensing end coupled to a transistor to be sensed to sense the threshold voltage drift of the transistor to be sensed in a device circuit; the equivalent resistance of the sensing module increases with the increase of the sensed threshold voltage drift; and the signal output end is coupled to a first node coupled to the reference resistance forming circuit and the sensing module, and is used to output adaptive voltage. The output adaptive voltage is adjusted via the threshold voltage drift sensed by the sensing module. Based on the circuit, also disclosed are a shift register and unit thereof, and display.
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公开(公告)号:US09058986B2
公开(公告)日:2015-06-16
申请号:US13376835
申请日:2011-06-13
申请人: Shengdong Zhang , Ruqi Han , Dedong Han
发明人: Shengdong Zhang , Ruqi Han , Dedong Han
IPC分类号: H01L21/336 , H01L21/02 , H01L29/66
CPC分类号: H01L21/02488 , H01L21/02592 , H01L29/66795
摘要: Designs and fabrication of a FinFET are provided. In one implementation, the fabrication can include forming a dielectric stripe on a substrate; implanting ions to the substrate by using the dielectric stripe as a mask so as to convert a surface layer of the substrate to an amorphous layer; forming an amorphous semiconductor layer on the substrate covering the dielectric stripe and recrystallizing each of the amorphous layer and the amorphous semiconductor layer to be a monocrystalline layer; processing regions beside two ends of the dielectric stripe to form a protective layer, the regions being predesigned as source and drain regions; forming recrystallized semiconductor spacers at two sides of the dielectric stripe uncovered by the protective layer, and forming recrystallized semiconductor blocks on regions covered by the protective layer; removing the dielectric stripe between the spacers so that the spacers can be formed as Fin bodies.
摘要翻译: 提供FinFET的设计和制造。 在一个实施方式中,制造可以包括在基板上形成电介质条纹; 通过使用介电条纹作为掩模将离子注入基片,以便将基片的表面层转变成非晶层; 在覆盖所述电介质条的基板上形成非晶半导体层,并将所述非晶层和所述非晶半导体层中的每一个重结晶为单晶层; 在介质条的两端之间的处理区域形成保护层,该区域被预先设计为源区和漏区; 在由保护层未覆盖的电介质条的两侧形成再结晶半导体间隔物,并在由保护层覆盖的区域上形成再结晶半导体块; 去除间隔物之间的电介质条,使得间隔物可以形成为鳍状体。
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公开(公告)号:US20240248353A1
公开(公告)日:2024-07-25
申请号:US18560676
申请日:2021-12-17
发明人: SHENGDONG ZHANG , XIAOLIANG ZHOU , CONGWEI LIAO , QINGPING LIN , HUAN YANG , ZHONGFEI ZOU , TE-CHEN CHUNG
IPC分类号: G02F1/136 , G02F1/1343 , G02F1/1362 , G02F1/1368 , H01L27/12
CPC分类号: G02F1/13606 , G02F1/13439 , G02F1/136295 , G02F1/1368 , H01L27/124 , H01L27/1288
摘要: An array substrate and a manufacturing method therefor, and a display panel are provided. The manufacturing method includes: forming a scan line and a gate on a substrate; forming a first insulating layer covering the scan line and the gate on the substrate; forming a metal oxide semiconductor layer above the first insulating layer, the metal oxide semiconductor layer including a source, a drain and an active layer; coating an upper surface of the metal oxide semiconductor layer with a photosensitive material layer; photoetching the photosensitive material layer from the back side of the substrate by using a first metal layer as a mask to form a channel protection layer; performing conductorization treatment on the metal oxide semiconductor layer to enable the source and the drain to be conductive; forming a data line above the first insulating layer; and forming a pixel electrode above the first insulating layer.
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29.
公开(公告)号:US20240142394A1
公开(公告)日:2024-05-02
申请号:US18278622
申请日:2021-07-30
发明人: Feng PAN , Shunning LI , Cheng DONG , Wentao ZHANG , Chenxin HOU , Litao CHEN , Junjie PAN , Shisheng ZHENG , Yuan LIN , Hai LIN
IPC分类号: G01N23/2055
CPC分类号: G01N23/2055
摘要: Disclosed are a material analysis method based on the crystal structure database, a system, a computer-readable storage medium and an application. The material analysis method includes comparing experimental pattern information obtained from examination of a to-be-tested sample with theoretical pattern information calculated from material structure data in the crystal structure database, and obtaining crystallographic information and phase composition of the to-be-tested sample through intelligent analysis. The crystallographic information include space group, unit cell parameter, and specific coordinates of atoms in unit cell. The crystal structure database has material structure data obtained by experimental measurement and/or theoretical prediction, including chemical formula, space group, unit cell parameter and specific coordinates of atoms in unit cell. Based on this method, large-scale high-throughput and high-precision material analysis can be achieved, laying the foundation for building a data mining and analysis platform for material patterns.
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公开(公告)号:US11937438B2
公开(公告)日:2024-03-19
申请号:US16960420
申请日:2020-04-17
发明人: Hong Meng , Yuhao Shi , Xinwei Wang , Lin Ai
CPC分类号: H10K10/471 , H10K71/12
摘要: An organic field-effect transistor and a fabrication method therefor, including: providing a gate; depositing polymer material onto the gate to form a dielectric layer; performing supercritical fluids treatment on the gate having the dielectric layer deposited; depositing organic semiconductor layer material on the dielectric layer having been processed, to form an organic semiconductor layer; depositing electrode layer material on the organic semiconductor layer and forming an electrode layer. The dielectric properties of the dielectric layer after adopting the supercritical fluids treatment have been significantly improved. While the hysteresis effect of the dielectric layers in the OFET devices has been basically eliminated, the sub-threshold slope of the OFET is also significantly reduced, the carrier mobility is effectively improved. Additionally, an OFET switching rate after being processed is improved, and, by connecting the LEDs in series, the switching rate of the LED is increased.
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