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21.发明申请公开(公告)号：US20190334505A1
公开(公告)日：2019-10-31
申请号：US16505369
申请日：2019-07-08
发明人： Dean Gans
摘要： Apparatuses and methods for calibrating adjustable impedances of a semiconductor device are disclosed in the present application. An example apparatus includes a register configured to store impedance calibration information and further includes programmable termination resistances having a programmable impedance. The example apparatus further includes an impedance calibration circuit configured to perform a calibration operation to determine calibration parameters for setting the programmable impedance of the programmable termination resistances. The impedance calibration circuit is further configured to program the impedance calibration information in the register related to the calibration operation.
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公开(公告)号：US10454317B2
公开(公告)日：2019-10-22
申请号：US15521478
申请日：2015-10-26
发明人： Sung-Han You , Jae-Sun Lee , Young-Sun Kim , Jae-Hun Jung , Un-Kyu Park
摘要： A wireless power transmission device for wirelessly transmitting power to at least one wireless power reception device through a magnetic field, the wireless power transmission device including: a power transmission unit for generating a magnetic field, an impedance matching unit, and a control unit for controlling the impedance matching unit, the impedance matching unit including: a plurality of first circuits which include a capacitor or an inductor and are connected in series to the power transmission unit; a plurality of second circuits which include a capacitor or an inductor and are connected in parallel to the power transmission unit; a matching inductor which is connected in series to the second circuits; and a plurality of switches which are arranged in the first circuits and second circuits and open and close same.
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公开(公告)号：US10418984B2
公开(公告)日：2019-09-17
申请号：US15631591
申请日：2017-06-23
发明人： Winfried Bakalski
摘要： A switch includes an input terminal, an output terminal, and a stack including transistors, such as, for example, field effect transistors, coupled in series, the stack being coupled between the input terminal and the output terminal. The switch also includes at least one switching element configured to be selectively operated in a conducting state or a non-conducting state, and at least one overvoltage protection element coupled to the stack by the at least one switching element. By way of example, the switch can implement a radio-frequency switch.
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公开(公告)号：US10378785B2
公开(公告)日：2019-08-13
申请号：US15547171
申请日：2015-04-01
摘要： A communication system comprises a communication device and communication devices. The communication device comprises a direct current power supply and a transmitter configured to transmit data by control of a current flowing through a current loop. The communication devices comprise a receiver configured to receive data by detection of the current flowing through the current loop. The communication device comprises an adjuster configured to adjust the impedance between a signal line and a common line according to the number of communication devices.
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公开(公告)号：US20190214986A1
公开(公告)日：2019-07-11
申请号：US16245926
申请日：2019-01-11
CPC分类号： H03K17/74 , H01L29/868 , H03H11/28 , H04W52/00
摘要： This disclosure relates to apparatus and methods for radio-frequency (RF) switching circuits, and more particularly for a PIN diode driver circuit for high speed, high repetition rate and/or high power applications. The PIN diode driver may include a dual voltage reverse bias provided to the PIN diode, which dual voltage reverse bias may be provided by a first, relatively lower voltage, power supply and a second, relatively higher voltage, power supply. The relatively lower voltage is to discharge an intrinsic layer of the PIN diode at a lower voltage than during reverse bias of the PIN diode at the second relatively higher bias voltage in order to reduce overall power consumption.
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公开(公告)号：US10236865B2
公开(公告)日：2019-03-19
申请号：US15952804
申请日：2018-04-13
发明人： Bruno Grelaud , Sebastien Pruvost
IPC分类号： H04B1/18 , H04B3/26 , H03H11/28 , H03H11/32 , H03H11/24 , H01Q1/50 , H04L25/12 , H04B1/04 , H04L25/02 , H03H7/25 , H03H7/40 , H03H11/30
摘要： An attenuator having an impedance that is controllable by a first setpoint signal is coupled to a transmission line. A matching circuit having an impedance that is controllable by a second setpoint signal is also coupled to the transmission line. A transformer circuit block also coupled to the transmission line has a complex impedance. A control circuit sets the first and second setpoint signals so as to control a conjugate impedance relationship between the variable impedances presented by the attenuator and matching circuit relative to the complex impedance of the transformer circuit.
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公开(公告)号：US10229816B2
公开(公告)日：2019-03-12
申请号：US15162960
申请日：2016-05-24
发明人： David J. Coumou , Dennis M Brown , Aaron T. Radomski , Mariusz Oldziej , Yogendra K. Chawla , Daniel J. Lincoln
IPC分类号： H01J37/32 , H03J7/08 , H03H11/28 , H05K7/20 , H03F1/02 , H03F1/32 , H03F1/56 , H03F3/189 , H03F3/217
摘要： An eVC including coarse and fine tuning networks. The coarse tuning network includes a circuit: receiving a RF input signal from a RF generator; outputting a RF output signal to a reference terminal or load; and receiving a DC bias voltage. The circuit is switched between first and second states. A capacitance of the circuit is based on the DC bias voltage while in the first state and is not based on the DC bias voltage while in the second state. The fine tuning network is connected in parallel with the coarse tuning network and includes a varactor. The varactor includes: a first diode receiving the RF input signal; and a second diode connected in a back-to-back configuration with the first diode and outputting a RF output signal to the reference terminal or load. A capacitance of the varactor is based on a second received DC bias voltage.
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公开(公告)号：US10211813B2
公开(公告)日：2019-02-19
申请号：US14976363
申请日：2015-12-21
发明人： Cheng-Chun Yeh
摘要： A control circuit disposed in a connection line including a first power pin and a second power pin and including a native N-type transistor, a first impedance unit, and a second impedance unit is provided. The native N-type transistor includes a first gate, a first drain and a first source. The first drain is coupled to the first power pin. The first impedance unit is coupled between the first source and the second power pin. The second impedance unit is coupled between the first drain and the first gate. When the voltage level of the first power pin is equal to a pre-determined level, the first gate of the native N-type transistor receives an adjusting signal to adjust an equivalent impedance of the native N-type transistor.
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公开(公告)号：US20190013185A1
公开(公告)日：2019-01-10
申请号：US16111776
申请日：2018-08-24
摘要： In one embodiment, a semiconductor processing tool includes a plasma chamber and an impedance matching circuit. The matching circuit includes a first electronically variable capacitor having a first variable capacitance, a second electronically variable capacitor having a second variable capacitance, and a control circuit. The control circuit is configured to determine a variable impedance of the plasma chamber, determine a first capacitance value for the first electronically variable capacitor and a second capacitance value for the second electronically variable capacitor, and generate a control signal to alter at least one of the first variable capacitance and the second variable capacitance to the first capacitance value and the second capacitance value, respectively. An elapsed time between determining the variable impedance of the plasma chamber to when RF power reflected back to the RF source decreases is less than about 150 μsec.
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公开(公告)号：US10147721B1
公开(公告)日：2018-12-04
申请号：US15847996
申请日：2017-12-20
申请人： Sridhar V. Gada , Sonu Arora
发明人： Sridhar V. Gada , Sonu Arora
IPC分类号： H01L27/02 , H01L27/06 , H03H11/28 , H01L23/34 , H01L49/02 , H01L21/8232 , G11C17/16 , H03K5/24 , H01L23/525
摘要： Various on-die-precision-resistor arrays, and methods of making and calibrating the same are disclosed. In one aspect, an apparatus is provided that includes a semiconductor chip and a precision resistor array on the semiconductor chip. A replica precision resistor array is on the semiconductor chip. The replica precision resistor array is configured to mimic the resistance behavior of the precision resistor array and has a characteristic resistance that is a function of temperature. The semiconductor chip is configured to calibrate the precision resistor array using the characterized resistance as a function of temperature, a resistance offset of the precision resistor array relative to the characterized resistance as a function of temperature, and a temperature of the precision resistor array.
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