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公开(公告)号：US20160365836A1
公开(公告)日：2016-12-15
申请号：US15055119
申请日：2016-02-26
Applicant: RF Micro Devices, Inc.
Inventor： Nadim Khlat , Michael R. Kay
IPC: H03F1/02 , H03F3/19 , H03F3/24 , H03K5/1536
CPC classification number: H03K5/1536 , H03F1/0222 , H03F1/0266 , H03F3/19 , H03F3/245 , H03F2200/102 , H03F2200/391 , H03F2200/432 , H03F2200/451 , H03F2200/462
Abstract: Circuitry, which includes a parallel amplifier and a switching supply, is disclosed. The parallel amplifier regulates a power supply output voltage based on a power supply control signal and provides a current sense signal, which is representative of a parallel amplifier output current from the parallel amplifier. The switching supply is coupled to the parallel amplifier. The switching supply provides a switching output voltage and makes an early determination of the switching output voltage using the current sense signal and the power supply control signal to at least partially compensate for delay in the switching supply. Additionally, the switching supply drives the parallel amplifier output current toward zero using the switching output voltage to increase efficiency.
Abstract translation: 公开了包括并联放大器和开关电源的电路。 并联放大器基于电源控制信号调节电源输出电压，并提供电流检测信号，其代表来自并行放大器的并行放大器输出电流。 开关电源耦合到并联放大器。 开关电源提供开关输出电压，并且使用电流检测信号和电源控制信号来早期确定开关输出电压，以至少部分地补偿开关电源中的延迟。 此外，开关电源使用开关输出电压将并行放大器输出电流驱动到零，以提高效率。
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公开(公告)号：US09515555B2
公开(公告)日：2016-12-06
申请号：US13660582
申请日：2012-10-25
Applicant: RF Micro Devices, Inc.
Inventor： Douglas R. Farrenkopf
CPC classification number: H02M3/1582 , H02J2001/008 , Y10T307/50
Abstract: A floating power converter includes direct current to direct current (DC-DC) converter circuitry having at least one converter control terminal for receiving at least one control signal, a high side (H-S) converter input terminal, a low side (L-S) converter input terminal, and a converter output terminal. The floating power converter also has an H-S source selector configured to selectively couple either a first H-S voltage source or a second H-S voltage source to the H-S converter input terminal in response to a selector control signal. Moreover, an L-S source selector is configured to selectively couple either a first L-S voltage source or a second L-S voltage source to the L-S converter input terminal in response to the selector control signal.
Abstract translation: 浮动功率转换器包括具有至少一个用于接收至少一个控制信号的转换器控制端的直流（DC-DC）转换器电路的直流电，高侧（HS）转换器输入端，低侧（LS）转换器输入 端子和转换器输出端子。 浮动功率转换器还具有H-S源选择器，其被配置为响应于选择器控制信号选择性地将第一H-S电压源或第二H-S电压源耦合到H-S转换器输入端。 此外，L-S源选择器被配置为响应于选择器控制信号选择性地将L-S电压源或第二L-S电压源耦合到L-S转换器输入端。
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公开(公告)号：US20160293700A1
公开(公告)日：2016-10-06
申请号：US15083566
申请日：2016-03-29
Applicant: RF Micro Devices, Inc.
Inventor： Peter J. Zampardi , Brian G. Moser , Jing Zhang , Thomas James Rogers
IPC: H01L29/08 , H01L29/737
CPC classification number: H01L29/7371 , H01L29/0821 , H01L29/205
Abstract: A transistor includes a sub-collector, a base, a collector between the sub-collector and the base, and an emitter on the base opposite the collector. The collector includes a first region adjacent to the base and a second region between the first region and the sub-collector. The first region has a graduated doping profile such that a doping concentration of the first region decreases in proportion to a distance from the base. The second region has a substantially constant doping profile. By providing the collector with a doping profile as described, the linearity of the transistor is significantly improved while maintaining the radio frequency (RF) gain thereof.
Abstract translation: 晶体管包括副集电极，基极，子集电极和基极之间的集电极，以及与集电极相对的基极上的发射极。 收集器包括与基底相邻的第一区域和位于第一区域和副收集器之间的第二区域。 第一区域具有渐变掺杂分布，使得第一区域的掺杂浓度与距离基极的距离成比例地减小。 第二区域具有基本恒定的掺杂分布。 通过向集电极提供如上所述的掺杂分布，在保持其射频（RF）增益的同时，晶体管的线性明显改善。
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公开(公告)号：US20160225760A1
公开(公告)日：2016-08-04
申请号：US15014348
申请日：2016-02-03
Applicant: RF Micro Devices, Inc.
Inventor： Kevin Wesley Kobayashi
CPC classification number: H01L27/0629 , H01L23/66 , H01L27/0207 , H01L27/088 , H01L29/0847
Abstract: A transition frequency multiplier semiconductor device having a first source region, a second source region, and a common drain region is disclosed. A first channel region is located between the first source region and the common drain region, and a second channel region is located between the second source region and the common drain region. A first gate region is located within the first channel region to control current flow between the first source region and the common drain region, while a second gate region is located within the second channel region to control current flow between the second source region and the common drain region. An inactive channel region is located between the first channel region and the second channel region such that the first channel region is electrically isolated from the second channel region. A conductive interconnect couples the first source region to the second gate region.
Abstract translation: 公开了具有第一源极区域，第二源极区域和公共漏极区域的过渡倍增器半导体器件。 第一沟道区位于第一源区和公共漏区之间，第二沟道区位于第二源区和公共漏区之间。 第一栅极区域位于第一沟道区域内以控制第一源极区域和公共漏极区域之间的电流，而第二栅极区域位于第二沟道区域内，以控制第二源极区域和公共漏极区域之间的电流 漏区。 无源沟道区位于第一沟道区和第二沟道区之间，使得第一沟道区与第二沟道区电隔离。 导电互连将第一源极区域耦合到第二栅极区域。
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325.发明申请RF LADDER FILTER WITH SIMPLIFIED ACOUSTIC RF RESONATOR PARALLEL CAPACITANCE COMPENSATION 有权射频梯形滤波器，具有简化的声学RF谐振器并联电容补偿公开(公告)号：US20160191012A1
公开(公告)日：2016-06-30
申请号：US15004084
申请日：2016-01-22
Applicant: RF Micro Devices, Inc.
Inventor： Nadim Khlat , Andrew F. Folkmann , Robert Aigner , Marcus Granger-Jones
CPC classification number: H03H9/542 , H03H9/605 , H03H9/6483 , H03H9/6489
Abstract: An RF ladder filter having a parallel capacitance compensation circuit is disclosed. The parallel capacitance compensation circuit is made up of a first inductive element with a first T-terminal and a first end coupled to a first ladder terminal and a second inductive element with a second T-terminal that is coupled to the first T-terminal of the first inductive element and a second end coupled to a second ladder terminal. Further included is a compensating acoustic RF resonator (ARFR) having a fixed node terminal and a third T-terminal that is coupled to the first T-terminal of the first inductive element and the second T-terminal of the second inductive element, and a finite number of series-coupled ladder ARFRs, wherein the parallel capacitance compensation circuit is coupled across one of the finite number of series-coupled ARFRs by way of the first ladder terminal and the second ladder terminal.
Abstract translation: 公开了一种具有并联电容补偿电路的RF梯形滤波器。 并联电容补偿电路由具有第一T端和第一端耦合到第一梯形终端的第一电感元件和与第二电感元件耦合的第二电感元件组成，第二电感元件连接到第一T端的第一T端 第一电感元件和耦合到第二梯形终端的第二端。 还包括具有固定节点终端的补偿声RF谐振器（ARFR）和耦合到第一电感元件的第一T端和第二电感元件的第二T端的第三T端，以及 有限数量的串联耦合梯形ARFR，其中并联电容补偿电路通过第一梯形终端和第二梯形终端耦合在有限数量的串联耦合ARFR之一上。
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Patent Agency Ranking
公开(公告)号：US09379670B2
公开(公告)日：2016-06-28
申请号：US14163256
申请日：2014-01-24
Applicant: RF Micro Devices, Inc.
Inventor： Nadim Khlat , Michael R. Kay , Manbir Singh Nag
Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.
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公开(公告)号：US20160182009A1
公开(公告)日：2016-06-23
申请号：US14973336
申请日：2015-12-17
Applicant: RF Micro Devices, Inc.
Inventor： Kushal Bhattacharjee
CPC classification number: H03H9/02244 , H01L41/047 , H01L41/312 , H01L41/33 , H03H3/02 , H03H9/02228 , H03H9/02275 , H03H9/02574 , H03H9/25 , H03H2003/027
Abstract: A micro-electrical-mechanical system (MEMS) guided wave device includes a single crystal piezoelectric layer and at least one guided wave confinement structure configured to confine a laterally excited wave in the single crystal piezoelectric layer. A bonded interface is provided between the single crystal piezoelectric layer and at least one underlying layer. A multi-frequency device includes first and second groups of electrodes arranged on or in different thickness regions of a single crystal piezoelectric layer, with at least one guided wave confinement structure. Segments of a segmented piezoelectric layer and a segmented layer of electrodes are substantially registered in a device including at least one guided wave confinement structure.
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328.发明申请PLATE WAVE DEVICES WITH WAVE CONFINEMENT STRUCTURES AND FABRICATION METHODS 审中-公开具有波形结构和制造方法的平板波浪装置公开(公告)号：US20160182007A1
公开(公告)日：2016-06-23
申请号：US14973295
申请日：2015-12-17
Applicant: RF Micro Devices, Inc.
Inventor： Kushal Bhattacharjee
IPC: H03H9/02 , H03H3/02 , H01L41/33 , H01L41/047 , H01L41/312
CPC classification number: H03H9/02244 , H01L41/047 , H01L41/312 , H01L41/33 , H03H3/02 , H03H9/02228 , H03H9/02275 , H03H9/02574 , H03H9/25 , H03H2003/027
Abstract: A micro-electrical-mechanical system (MEMS) guided wave device includes a single crystal piezoelectric layer and at least one guided wave confinement structure configured to confine a laterally excited wave in the single crystal piezoelectric layer. A bonded interface is provided between the single crystal piezoelectric layer and at least one underlying layer. A multi-frequency device includes first and second groups of electrodes arranged on or in different thickness regions of a single crystal piezoelectric layer, with at least one guided wave confinement structure. Segments of a segmented piezoelectric layer and a segmented layer of electrodes are substantially registered in a device including at least one guided wave confinement structure.
Abstract translation: 微机电系统（MEMS）导波装置包括单晶压电层和至少一个被配置为将横向激发的波限制在单晶压电层中的导波约束结构。 在单晶压电层和至少一个下层之间提供键合界面。 多频器件包括布置在单晶压电层的不同厚度区域上或其中的至少一个导波限制结构的第一组电极和第二组电极。 分段压电层和分段电极层的段基本上记录在包括至少一个导波限制结构的装置中。
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公开(公告)号：US09374005B2
公开(公告)日：2016-06-21
申请号：US14458341
申请日：2014-08-13
Applicant: RF Micro Devices, Inc.
Inventor： Ashraf Rozek , Michael R. Kay
IPC: H03G3/20 , H02M3/158 , H03F1/02 , H03F3/19 , H03F3/21 , H02M3/07 , H03F3/00 , H03F3/195 , H03F3/24 , H02M1/00
CPC classification number: H02M3/158 , H02M3/07 , H02M2001/007 , H03F1/0227 , H03F3/005 , H03F3/19 , H03F3/195 , H03F3/21 , H03F3/245 , H03F2200/102 , H03F2200/451
Abstract: A DC-DC converter, which provides a converter output voltage using a DC source voltage, is disclosed. The DC-DC converter includes converter control circuitry and a boosting charge pump. The converter control circuitry selects one of a first boost operating mode, a second boost operating mode, and a boost disabled mode based on the DC source voltage. During the boost disabled mode, the boosting charge pump presents a high impedance at a charge pump output of the boosting charge pump. Otherwise, the boosting charge pump provides a charge pump output voltage. During the first boost operating mode, a nominal value of the charge pump output voltage is equal to about one and one-half times the DC source voltage. During the second boost operating mode, a nominal value of the charge pump output voltage is equal to about two times the DC source voltage.
Abstract translation: 公开了一种使用DC源电压提供转换器输出电压的DC-DC转换器。 DC-DC转换器包括转换器控制电路和升压电荷泵。 转换器控制电路基于直流电源电压选择第一升压操作模式，第二升压操作模式和升压禁止模式中的一个。 在升压禁用模式期间，升压电荷泵在增压电荷泵的电荷泵输出处呈现高阻抗。 否则，升压电荷泵提供电荷泵输出电压。 在第一升压操作模式期间，电荷泵输出电压的标称值等于直流电源电压的大约一倍。 在第二升压操作模式期间，电荷泵输出电压的标称值等于直流电源电压的大约两倍。
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公开(公告)号：US20160164551A1
公开(公告)日：2016-06-09
申请号：US14959954
申请日：2015-12-04
Applicant: RF Micro Devices, Inc.
Inventor： Nadim Khlat , Michael R. Kay
CPC classification number: H03F3/19 , H03F1/0227 , H03F3/245 , H03F2200/102 , H03F2200/451
Abstract: The present disclosure relates to envelope tracking with reduced circuit area and power consumption. In one embodiment, an envelope power converter includes a switching power converter configured to receive a supply voltage and provide an output based on a switching control signal. A holding inductor is coupled between the switching power converter and envelope power supply output node. An offset capacitor is coupled between the envelope power supply output node and control node. In response to a target envelope power supply output voltage, a control circuit is configured to generate the switching control signal and a control voltage to maintain envelope power supply signal at target voltage level. The control circuit is configured to generate switching control signal and control voltage such that supply voltage is provided by switching power converter to holding inductor and offset capacitor is charged to target level without changing voltage of envelope power supply signal.
Abstract translation: 本公开涉及具有减小的电路面积和功耗的包络跟踪。 在一个实施例中，包络功率转换器包括被配置为接收电源电压并且基于开关控制信号提供输出的开关功率转换器。 保持电感耦合在开关电源转换器和外壳电源输出节点之间。 偏置电容器耦合在封装电源输出节点和控制节点之间。 响应于目标包络电源输出电压，控制电路被配置为产生开关控制信号和控制电压，以将包络电源信号保持在目标电压电平。 控制电路被配置为产生开关控制信号和控制电压，使得电源电压由开关功率转换器提供给保持电感器，并且偏移电容器被充电到目标电平而不改变包络电源信号的电压。
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