CONCURRENT LISTENING
    32.
    发明公开

    公开(公告)号:US20230371067A1

    公开(公告)日:2023-11-16

    申请号:US17743042

    申请日:2022-05-12

    摘要: A wireless communication device has a receiver to listen to a sequence of channels. A controller responds to a preamble being detected on a first channel while the receiver is tuned to the first channel by causing the receiver to stay on the first channel and decode packet(s) associated with the preamble. The controller responds to detection of a first symbol of a first transmission protocol and the preamble not being detected to cause the receiver to stay on the first channel for a predetermined time waiting for a retry. The controller responds to detection of a second symbol of a second transmission protocol and the preamble not being detected to cause the receiver to switch to an advertising channel of the second transmission protocol. If no preambles, noise, or symbols are detected, the receiver switches to listening to a next channel in the sequence after a fixed time.

    Compression of firmware updates
    34.
    发明授权

    公开(公告)号:US11789708B2

    公开(公告)日:2023-10-17

    申请号:US17237538

    申请日:2021-04-22

    发明人: Hannu Mallat

    IPC分类号: G06F8/40 H03M7/30 G06F8/65

    摘要: A system and method for creating firmware patch files is disclosed. The method utilizes the Executable Linkable Format file that is created when the firmware image is created. By analyzing the ELF file, the patch creation software is able to identify functions and other data in the new firmware image. The patch creation software then compares these functions to corresponding functions in the old firmware image. The method then creates an edit sequence that may be used to transform the old firmware image into the new firmware image. The edit sequence is then converted into a series of opcodes, where each opcode is followed by at least one parameter. A patch program, disposed on a network device, is able to apply the patch file to update its firmware. This method creates a smaller patch file than other popular tools.

    FAST FREQUENCY SYNTHESIZER SWITCHING
    35.
    发明公开

    公开(公告)号:US20230318609A1

    公开(公告)日:2023-10-05

    申请号:US17709642

    申请日:2022-03-31

    IPC分类号: H03L7/107 H03L7/099

    CPC分类号: H03L7/1075 H04B1/40 H03L7/099

    摘要: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.