公开(公告)号：US20140174659A1

公开(公告)日：2014-06-26

申请号：US14190024

申请日：2014-02-25

Applicant: Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

Inventor： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

IPC: H01L21/67

CPC classification number: H01L21/67207 ,  B23K26/0624 ,  B23K26/064 ,  B23K26/364 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/67069 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327

Abstract: Methods of dicing substrates having a plurality of ICs are disclosed. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer is washed off.

Abstract translation: 公开了具有多个IC的切割衬底的方法。 一种方法包括在半导体衬底上形成包含水溶性材料层的掩模。 用飞秒激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使IC之间的衬底的区域暴露。 然后将衬底通过图案化掩模中的间隙进行蚀刻，以对IC进行分离，并将水溶性材料层冲洗掉。

公开(公告)号：US08709706B2

公开(公告)日：2014-04-29

申请号：US13455784

申请日：2012-04-25

Applicant: Banqiu Wu ,  Ajay Kumar ,  Kartik Ramaswamy ,  Omkaram Nalamasu

Inventor： Banqiu Wu ,  Ajay Kumar ,  Kartik Ramaswamy ,  Omkaram Nalamasu

IPC: G03F7/26

CPC classification number: G03F7/36 ,  G03F7/40

Abstract: The present invention provides methods and an apparatus controlling and minimizing process defects in a development process, and modifying line width roughness (LWR) of a photoresist layer after the development process, and maintaining good profile control during subsequent etching processes. In one embodiment, a method for forming features on a substrate includes developing and removing exposed areas in the photosensitive layer disposed on the substrate in the electron processing chamber by predominantly using electrons, removing contaminants from the substrate by predominantly using electrons, and etching the non-photosensitive polymer layer exposed by the developed photosensitive layer in the electron processing chamber by predominantly using electrons.

Abstract translation: 本发明提供了控制和最小化显影过程中的工艺缺陷的方法和装置，并且在显影过程之后修改光致抗蚀剂层的线宽粗糙度（LWR），并且在随后的蚀刻工艺期间保持良好的轮廓控制。 在一个实施例中，用于在衬底上形成特征的方法包括通过主要使用电子来显影和去除设置在电子处理室中的衬底上的感光层中的暴露区域，通过主要使用电子从衬底去除污染物， 通过主要使用电子在电子处理室中由显影的感光层曝光的光敏聚合物层。

公开(公告)号：US08676514B2

公开(公告)日：2014-03-18

申请号：US12825895

申请日：2010-06-29

Applicant: Venkatesh Rajagopalan ,  Vivek Venugopal Badami ,  Rahul Srinivas Prabhu ,  Ajay Kumar Behera ,  Aninda Bhattacharya

Inventor： Venkatesh Rajagopalan ,  Vivek Venugopal Badami ,  Rahul Srinivas Prabhu ,  Ajay Kumar Behera ,  Aninda Bhattacharya

IPC: G07C3/00

CPC classification number: F01D21/003 ,  F05D2260/80 ,  G01H1/006 ,  G01M15/14

Abstract: A method for monitoring the health of a plurality of blades is presented. The method includes determining delta TOAs corresponding to the plurality of blades, determining a standard deviation utilizing the delta TOAs corresponding to the plurality of blades, determining a delta sigma—1 utilizing the standard deviation and an initial standard deviation, determining a normalized delta TOA corresponding to one or more of the plurality of blades utilizing the delta sigma—1, determining a standard deviation of the normalized delta TOA, determining a delta sigma—2 utilizing the standard deviation of the normalized delta TOA and a previous standard deviation of normalized delta TOA, and determining a corrected delta TOA corresponding to the one or more of the plurality of blades based upon the delta sigma—2.

Abstract translation: 提出了一种用于监测多个叶片的健康状况的方法。 该方法包括确定与多个叶片相对应的增量TOA，使用与多个叶片对应的增量TOA来确定标准偏差，利用标准偏差和初始标准偏差确定Δ-Σ-1，确定对应于 使用delta-Σ1来确定标准差ΔAA的标准偏差，利用归一化的三角洲TOA的标准偏差和归一化的三角洲TOA的先前标准偏差来确定Δ-Σ-2 并且基于所述Δ-Σ-2确定与所述多个叶片中的所述一个或多个叶片对应的校正后的增量TOA。

公开(公告)号：US20140046250A1

公开(公告)日：2014-02-13

申请号：US14001647

申请日：2012-03-14

Applicant: Ajay Kumar Jain ,  Andrew Douglas McCulloch

Inventor： Ajay Kumar Jain ,  Andrew Douglas McCulloch

IPC: A61M25/01

CPC classification number: A61M25/0155 ,  A61M25/0138

Abstract: A steerable element for use in surgery, comprising: an inflatable member; and an elongate frame azimuthally surrounding said inflatable member, wherein: said inflatable member is configured to press against said elongate frame on inflation so as to cause a change in the curvature of said elongate frame. A catheter, an insertion system, a medical implant comprising the steerable element, a delivery system comprising the steerable element, and a method of configuring the steerable element for use.

Abstract translation: 一种用于手术的可操纵元件，包括：可充气构件; 以及围绕所述可膨胀构件的细长框架，其中：所述可膨胀构件构造成在膨胀时压靠所述细长框架，从而引起所述细长框架的曲率的变化。 导管，插入系统，包括可转向元件的医疗植入物，包括可转向元件的输送系统以及配置可转向元件以供使用的方法。

公开(公告)号：US20140017882A1

公开(公告)日：2014-01-16

申请号：US13917508

申请日：2013-06-13

Applicant: Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Todd Egan ,  Madhava Rao Yalamanchili ,  Ajay Kumar

Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Todd Egan ,  Madhava Rao Yalamanchili ,  Ajay Kumar

IPC: H01L21/78

CPC classification number: H01L21/82 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/31127 ,  H01L21/78

Abstract: Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.

公开(公告)号：US20140017881A1

公开(公告)日：2014-01-16

申请号：US13938570

申请日：2013-07-10

Applicant: Brad EATON ,  Saravjeet SINGH ,  Wei-Sheng LEI ,  Madhava Rao YALAMANCHILI ,  Tong LIU ,  Ajay KUMAR

Inventor： Brad EATON ,  Saravjeet SINGH ,  Wei-Sheng LEI ,  Madhava Rao YALAMANCHILI ,  Tong LIU ,  Ajay KUMAR

IPC: H01L21/78

CPC classification number: H01L21/67161 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/50 ,  H01J37/32651 ,  H01J37/32788 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/67069 ,  H01L21/67115 ,  H01L21/67742 ,  H01L21/78 ,  Y10T29/5124

Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.

Abstract translation: 在实施例中，实施涉及初始激光划片和随后的等离子体蚀刻的混合晶片或衬底切割工艺用于裸片切割。 激光划片工艺可用于清洁地去除掩模层，有机和无机介电层以及器件层。 然后可以在曝光或部分蚀刻晶片或衬底时终止激光蚀刻工艺。 在实施例中，采用多等离子体蚀刻方法来骰子晶片，其中采用各向同性蚀刻来改善各向异性蚀刻后的管芯侧壁。 各向同性蚀刻在单片切割之后从各向异性蚀刻的模具侧壁去除各向异性蚀刻副产物，粗糙度和/或扇贝。

公开(公告)号：US20140017879A1

公开(公告)日：2014-01-16

申请号：US13917366

申请日：2013-06-13

Applicant: Mohammad Kamruzzaman Chowdhury ,  Wei-Sheng Lei ,  Todd Egan ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Ajay Kumar

Inventor： Mohammad Kamruzzaman Chowdhury ,  Wei-Sheng Lei ,  Todd Egan ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Ajay Kumar

IPC: H01L21/78

CPC classification number: H01L21/78

Abstract: Uniform masking for wafer dicing using laser and plasma etch is described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits having bumps or pillars includes uniformly spinning on a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

Abstract translation: 描述了使用激光和等离子体蚀刻的用于晶片切割的均匀掩模。 在一个例子中，对具有多个具有凸起或柱状的集成电路的半导体晶片进行切割的方法包括在半导体晶片上方的掩模上均匀地旋转，该掩模由覆盖并保护集成电路的层组成。 然后用激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以对集成电路进行分离。

公开(公告)号：US20130324719A1

公开(公告)日：2013-12-05

申请号：US13820568

申请日：2012-02-21

Applicant: Raghu Mitra Alla ,  Ajay Kumar Dubey ,  Aruna Kumari Sirigiri ,  Naga Kama Kumar Mareedu

Inventor： Raghu Mitra Alla ,  Ajay Kumar Dubey ,  Aruna Kumari Sirigiri ,  Naga Kama Kumar Mareedu

IPC: C07D263/06

CPC classification number: C07D263/06 ,  A61K31/5377 ,  C07D263/14 ,  C07D263/20 ,  C07D265/30 ,  C07D269/00 ,  C07D413/10

Abstract: A novel process for preparing oxazolidinone antibacterial agent Linezolid including key intermediates of oxazolidinones comprising: reacting 3-fluoro-4-morpholinyl aniline with R-epichlorohydrin; carbonylation to form oxazolidinone derivative; acetylation of (5R)-5-(chloromethyl)-3-(3-fluoro-4-morpholinophenyl-oxazolidin-2-one with sodium acetate to get novel intermediate; hydrolysis of (R)-3-(3-fluoro-4-morpholinophenyl)-2-oxo-5-oxazolidinyl methyl acetate; mesylation of (R)-3-(3-fluoro-4-morpholinophenyl)-2-oxo-5-oxazolidinyl methanol; reaction of (R)-3-(3-fluoro-4-morpholinophenyl)-2-oxo-5-oxazolidinyl methyl methane sulphonate with potassium phthalimide; hydrolysis of (S)-3-(3-fluoro-4-morpholinophenyl)-2-oxo-5-oxazolidinyl methyl phthalimide with hydrazine hydrate; acetylation of (S)-3-(3-fluoro-4-morpholinophenyl)-2-oxo-5-oxazolidinyl methyl amine with acetic anhydride yields Linezolid in high yield.

Abstract translation: 一种制备恶唑烷酮抗菌剂利奈唑胺的新方法，包括恶唑烷酮的关键中间体，包括：使3-氟-4-吗啉基苯胺与R-表氯醇反应; 羰基化形成恶唑烷酮衍生物; （5R）-5-（氯甲基）-3-（3-氟-4-吗啉代苯基 - 恶唑烷-2-酮与乙酸钠的乙酰化得到新的中间体;（R）-3-（3-氟-4- （R）-3-（3-氟-4-吗啉代苯基）-2-氧代-5-恶唑烷基甲醇的甲磺酰化;（R）-3-（ 3-（3-氟-4-吗啉代苯基）-2-氧代-5-恶唑烷基甲基甲磺酸盐与邻苯二甲酰亚胺钾的水解;（S）-3-（3-氟-4-吗啉代苯基）-2-氧代-5-恶唑烷基甲基邻苯二甲酰亚胺 与水合肼反应;（S）-3-（3-氟-4-吗啉代苯基）-2-氧代-5-恶唑烷基甲基胺与乙酸酐的乙酰化，以高产率得到利奈唑胺。

公开(公告)号：US08532939B2

公开(公告)日：2013-09-10

申请号：US12872830

申请日：2010-08-31

Applicant: Aninda Bhattacharya ,  Vinay Bhaskar Jammu ,  Vivek Venugopal Badami ,  Venkatesh Rajagopalan ,  Rahul Srinivas Prabhu ,  Ajay Kumar Behera ,  Nidhi Naithani ,  Mahalakshmi Shunumugam Balasubramaniam

Inventor： Aninda Bhattacharya ,  Vinay Bhaskar Jammu ,  Vivek Venugopal Badami ,  Venkatesh Rajagopalan ,  Rahul Srinivas Prabhu ,  Ajay Kumar Behera ,  Nidhi Naithani ,  Mahalakshmi Shunumugam Balasubramaniam

IPC: G01B3/44 ,  G01B3/52 ,  G06F19/00

CPC classification number: F01D21/003 ,  F05D2260/80 ,  F05D2270/11

Abstract: A system is presented. The system includes a data acquisition system that generates time of arrival (TOA) data corresponding to a plurality of blades in a device, a central processing subsystem that determines features of each of the plurality of blades utilizing the TOA data, and evaluates the health of each of the plurality of blades based upon the determined features.

Abstract translation: 提出了一个系统。 该系统包括数据采集系统，其生成对应于设备中的多个叶片的到达时间（TOA）数据，中央处理子系统，其使用TOA数据确定多个叶片中的每一个的特征，并评估 基于所确定的特征，多个叶片中的每一个。

公开(公告)号：US08507363B2

公开(公告)日：2013-08-13

申请号：US13161045

申请日：2011-06-15

Applicant: Wei-Sheng Lei ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Saravjeet Singh ,  Ajay Kumar

Inventor： Wei-Sheng Lei ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Saravjeet Singh ,  Ajay Kumar

IPC: H01L21/00

CPC classification number: H01L21/67069 ,  B23K26/0624 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/67207 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.