LOW NOISE AMPLIFIER FOR ULTRA WIDE BAND
    32.
    发明申请
    LOW NOISE AMPLIFIER FOR ULTRA WIDE BAND 失效
    低噪声放大器用于超宽带

    公开(公告)号:US20090140815A1

    公开(公告)日:2009-06-04

    申请号:US12352380

    申请日:2009-01-12

    Abstract: A low noise amplifier (LNA) for ultra wide band receives and amplifies identical RF signals in different frequency bands, and includes more than one pair of narrow band LNAs coupled in parallel, and a load circuit which increases load impedance of the entire circuit of the narrow band LNAs. The LNA can not only amplify the RF signal in the UWB but also obtain the low noise and the high gain that are features of the conventional narrow band LNA.

    Abstract translation: 用于超宽带的低噪声放大器(LNA)在不同频带中接收和放大相同的RF信号,并且包括并联耦合的多于一对窄带LNA,以及增加整个电路的负载阻抗的负载电路 窄带LNA。 LNA不仅可以放大UWB中的RF信号,还可以获得作为传统窄带LNA特征的低噪声和高增益。

    APPARATUS AND METHOD FOR LOW-NOISE AMPLIFICATION IN A WIRELESS COMMUNICATION SYSTEM
    33.
    发明申请
    APPARATUS AND METHOD FOR LOW-NOISE AMPLIFICATION IN A WIRELESS COMMUNICATION SYSTEM 有权
    无线通信系统中低噪声放大的装置和方法

    公开(公告)号:US20090075623A1

    公开(公告)日:2009-03-19

    申请号:US12212725

    申请日:2008-09-18

    CPC classification number: H04B1/123 H04B1/109 H04B1/18

    Abstract: A low-noise amplification apparatus and method in a receiver in a wireless communication system are provided, in which a main amplifier amplifies a received signal, a sub-amplifier amplifies a third-order harmonic component more strongly than a signal component in the received signal and cancels the third-order harmonic component by combining the amplified signal with the signal received from the main amplifier. A noise eliminator amplifies noise included in the received signal and eliminates the noise by combining the amplified noise with the signal received from the main amplifier or the signal received from the sub-amplifier.

    Abstract translation: 提供了一种在无线通信系统中的接收机中的低噪声放大装置和方法,其中主放大器放大接收信号,子放大器比接收信号中的信号分量更强地放大三次谐波分量 并且通过将放大的信号与从主放大器接收的信号组合来取消三次谐波分量。 噪声消除器放大接收信号中包含的噪声,并通过将放大的噪声与从主放大器接收的信号或从子放大器接收的信号组合来消除噪声。

    Phase-locked loop for stably adjusting frequency-band of voltage-controlled oscillator and phase locking method
    34.
    发明授权
    Phase-locked loop for stably adjusting frequency-band of voltage-controlled oscillator and phase locking method 有权
    用于稳压调压振荡器频带的锁相环和锁相方法

    公开(公告)号:US07471159B2

    公开(公告)日:2008-12-30

    申请号:US11595887

    申请日:2006-11-13

    CPC classification number: H03L7/10 Y10S331/02

    Abstract: A phase-locked loop (PLL) for stably adjusting a frequency band of a voltage-controlled oscillator and a phase locking method. In the PLL, a frequency band controller alters the frequency band selection digital value in response to an input clock signal and an oscillation control signal generated from an LPF of a basic PLL circuit, and thus a voltage-controlled oscillator of the basic PLL circuit alters the frequency of an output clock signal in response to the oscillation control signal and the frequency band selection digital value. The output clock signal is rapidly and stably phase-locked at a target frequency depending on the frequency band selection digital value.

    Abstract translation: 用于稳定地调节压控振荡器的频带的锁相环(PLL)和相位锁定方法。 在PLL中,频带控制器响应于从基本PLL电路的LPF产生的输入时钟信号和振荡控制信号来改变频带选择数字值,因此基本PLL电路的压控振荡器改变 响应于振荡控制信号和频带选择数字值的输出时钟信号的频率。 根据频带选择数字值,输出时钟信号以目标频率快速稳定地锁相。

    Apparatus and method for reducing flicker noise of CMOS amplifier
    35.
    发明授权
    Apparatus and method for reducing flicker noise of CMOS amplifier 有权
    降低CMOS放大器闪烁噪声的装置和方法

    公开(公告)号:US07453317B2

    公开(公告)日:2008-11-18

    申请号:US11645742

    申请日:2006-12-27

    CPC classification number: H03F3/45183 H03F1/26

    Abstract: An apparatus and method of reducing a flicker noise of a CMOS amplifier is provided. In the CMOS amplifier, a load circuit is connected to a signal input circuit which includes two pairs of MOSFETs which simultaneously receive differential signals. In this instance, a first MOSFET included in a switch-bias circuit is connected to one pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø1. A second MOSFET included in the switch-bias circuit is connected to another pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø2.

    Abstract translation: 提供了降低CMOS放大器的闪烁噪声的装置和方法。 在CMOS放大器中,负载电路连接到信号输入电路,该信号输入电路包括同时接收差分信号的两对MOSFET。 在这种情况下,包括在开关偏置电路中的第一MOSFET连接到一对MOSFET,它们在激活时钟信号φ1的情况下接收差分信号并用作电流源。 包括在开关偏置电路中的第二个MOSFET连接到另一对MOSFET,它们在启动时钟信号Ø2的情况下接收差分信号并用作电流源。

    Source coupled differential complementary colpitts oscillator
    36.
    发明授权
    Source coupled differential complementary colpitts oscillator 失效
    源耦合差分互补colpitts振荡器

    公开(公告)号:US07420429B2

    公开(公告)日:2008-09-02

    申请号:US11600732

    申请日:2006-11-17

    CPC classification number: H03B5/1212 H03B5/1228

    Abstract: A source coupled differential complementary Colpitts oscillator is described, which enables a differential oscillation and also can improve phase noise performance by source-coupling a complementary Colpitts oscillator using an inductor. A differential complementary Colpitts oscillator includes: a plurality of complementary Colpitts oscillators and a source coupler which couples a source node of the plurality of complementary Colpitts oscillators, enables the Colpitts oscillators to differentially oscillate.

    Abstract translation: 描述了源耦合差分互补Colpitts振荡器,其实现差分振荡,并且还可以通过使用电感器源耦合互补Colpitts振荡器来改善相位噪声性能。 差分互补Colpitts振荡器包括:多个互补的Colpitts振荡器和耦合多个互补Colpitts振荡器的源节点的源耦合器使得Colpitts振荡器能够差分振荡。

    Dual gate cascade amplifier
    38.
    发明授权
    Dual gate cascade amplifier 失效
    双门级联放大器

    公开(公告)号:US07199669B2

    公开(公告)日:2007-04-03

    申请号:US10956082

    申请日:2004-10-04

    CPC classification number: H03F1/223 H01L27/0207 H01L27/0705

    Abstract: A dual gate cascade amplifier includes a first transistor and a second transistor electrically connected in series, the second transistor including a first parallel transistor and a second parallel transistor, the first parallel transistor and the second parallel transistor being electrically connected in parallel, a first channel electrically connecting a first end channel region of the first transistor and a second end channel region, wherein one of the first or second end channel regions is a source and the other of the first or second end channel regions is a drain, the second end channel region being a common end channel region shared by the first and second parallel transistors, and a second channel electrically connected to the second end channel region and extending away from the first transistor.

    Abstract translation: 双栅级联放大器包括串联电连接的第一晶体管和第二晶体管,第二晶体管包括第一并联晶体管和第二并联晶体管,第一并联晶体管和第二并联晶体管并联电连接,第一沟道 电连接第一晶体管的第一端部沟道区域和第二端部沟道区域,其中第一或第二端部沟道区域之一是源极,并且第一或第二端部沟道区域中的另一个是漏极,第二端部通道 区域是由第一和第二并联晶体管共享的公共末端通道区域,以及电连接到第二端部通道区域并远离第一晶体管延伸的第二通道。

    Variable gain differential amplifier, and variable degeneration impedance control device and method for use in the same
    39.
    发明申请
    Variable gain differential amplifier, and variable degeneration impedance control device and method for use in the same 失效
    可变增益差分放大器和可变退化阻抗控制装置及其使用方法

    公开(公告)号:US20060186961A1

    公开(公告)日:2006-08-24

    申请号:US11349171

    申请日:2006-02-08

    CPC classification number: H03G1/0029

    Abstract: Disclosed are a variable gain differential amplifier, and variable degeneration impedance control device and method for use in the variable gain differential amplifier, which can adjust an amplification gain and ensure linearity. A DC level of a differential signal to be amplified by the amplifier is adjusted according to a control signal to adjust a gain of the amplifier, and the impedance of a variable degeneration impedance part is adjusted according to the differential signal of which the DC level is adjusted. That is, the gain of the differential amplifier is adjusted and the linearity is ensured by varying the impedance of the variable degeneration impedance part using the differential input signal of which the DC level is adjusted.

    Abstract translation: 本发明公开了一种可变增益差分放大器和可变衰减阻抗控制装置及其在可变增益差分放大器中的应用,可以调节放大增益并确保线性度。 根据控制信号调整由放大器放大的差分信号的直流电平,以调整放大器的增益,并且根据直流电平的差分信号来调节可变衰减阻抗部分的阻抗 调整。 也就是说,通过使用调整DC电平的差分输入信号改变可变衰减阻抗部分的阻抗来调节差分放大器的增益,并确保线性度。

    Frequency synthesizer for mixing reference frequencies
    40.
    发明申请
    Frequency synthesizer for mixing reference frequencies 失效
    用于混合参考频率的频率合成器

    公开(公告)号:US20060183455A1

    公开(公告)日:2006-08-17

    申请号:US11353972

    申请日:2006-02-15

    CPC classification number: H03B21/04 H03L7/18

    Abstract: A frequency synthesizer for mixing reference frequencies using at least one control signal has a local oscillator, frequency dividers for dividing a frequency generated from the local oscillator and generating at least one control signal, and a single side band (SSB) mixer for mixing the reference frequencies, using the frequency generated from the local oscillator and the control signal. The frequency synthesizer has a simplified structure, and can easily mix reference frequency signals without a need for additional power.

    Abstract translation: 用于使用至少一个控制信号混合参考频率的频率合成器具有本地振荡器,用于分频从本地振荡器产生的频率并产生至少一个控制信号的分频器,以及用于混合参考的单边带(SSB)混频器 频率,使用从本地振荡器产生的频率和控制信号。 频率合成器具有简化的结构,并且可以容易地混合参考频率信号,而不需要额外的功率。

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