公开(公告)号：US06643725B1

公开(公告)日：2003-11-04

申请号：US09495955

申请日：2000-02-02

申请人： Kenji Kozakai ,  Yuusuke Jono ,  Motoki Kanamori ,  Kazunori Furusawa ,  Atsushi Shikata ,  Yosuke Yukawa

发明人： Kenji Kozakai ,  Yuusuke Jono ,  Motoki Kanamori ,  Kazunori Furusawa ,  Atsushi Shikata ,  Yosuke Yukawa

IPC分类号： G06F1300

CPC分类号： G11C16/16 ,  G06F3/0614 ,  G06F3/0626 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0679 ,  G11C16/0416

摘要： A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.

摘要翻译： 存储卡（1）包括电可重写非易失性存储器（4），具有执行指令并管理非易失性存储器中的文件数据分配的功能的数据处理器（3），接口控制电路 ）具有建立外部接口的功能，用于响应于外部命令控制数据处理器执行指令并且用于控制对非易失性存储器的访问以及用于临时存储文件数据的缓冲存储器（7）。 接口控制电路包括用于对外部提供的第一命令进行解码并指示数据处理器从缓冲存储器获取指令并进行操作的命令控制装置。

公开(公告)号：US5598368A

公开(公告)日：1997-01-28

申请号：US445105

申请日：1995-05-19

申请人： Masahito Takahashi ,  Michiko Odagiri ,  Takeshi Furuno ,  Kazunori Furusawa ,  Masashi Wada

发明人： Masahito Takahashi ,  Michiko Odagiri ,  Takeshi Furuno ,  Kazunori Furusawa ,  Masashi Wada

IPC分类号： G11C17/00 ,  G11C16/02 ,  G11C16/16 ,  G11C16/34 ,  G11C13/00

CPC分类号： G11C16/3477 ,  G11C16/16 ,  G11C16/3409 ,  G11C16/3445 ,  G11C16/3468

摘要： A batch erasable nonvolatile memory device and an apparatus using the same provided with memory cells which are adapted to execute an erase operation by a ejecting an electric charge accumulated at floating gates by program operation (including a pre-write operation), carries out, in sequence, a first operation for reading memory cells of an erase unit and carrying out a pre-write operation on those nonvolatile memory cells at the floating gates of which electric charge is not stored, a second operation for carrying out a batch erase operation at a high speed for the nonvolatile memory cells of said erase unit with a relatively large energy under a relatively large erase reference voltage, a third operation for carrying out a read operation of said all erased nonvolatile memory cells and a write operation on those nonvolatile memory cells which are adapted to have a relatively low threshold voltage, and a fourth operation for carrying out a batch erase operation at a low speed for the nonvolatile memory cells of said erase unit with a relatively small energy under a relatively small erase reference voltage, or is provided with an automatic erasing circuit for executing these operations.

摘要翻译： 批量可擦除非易失性存储装置和使用该存储器单元的装置，该存储单元适于通过通过编程操作（包括预写操作）弹出在浮动栅极上累积的电荷来执行擦除操作， 序列，用于读取擦除单元的存储单元并且在不存储电荷的浮动栅极上对那些非易失性存储单元执行预写操作的第一操作，用于在存储单元中执行批量擦除操作的第二操作 在相对较大的擦除参考电压下具有相对大的能量的所述擦除单元的非易失性存储单元的高速度，用于执行所有擦除的非易失性存储单元的读操作的第三操作和对那些非易失性存储单元的写操作 适于具有相对低的阈值电压，以及第四操作，用于以低速执行批量擦除操作 所述擦除单元的非易失性存储单元在相对小的擦除参考电压下具有相对小的能量，或者设置有用于执行这些操作的自动擦除电路。