公开(公告)号：US11916582B2

公开(公告)日：2024-02-27

申请号：US17198860

申请日：2021-03-11

Applicant: Microchip Technology Incorporated

Inventor： Axel Heim

IPC: H04B1/10 ,  G06F3/041

CPC classification number: H04B1/1027 ,  G06F3/04162 ,  G06F3/04182

Abstract: Systems and methods of determining a noise-robust acquisition configuration for a sensor or communication system are disclosed. An exemplary method comprises a noise scan with: obtaining a sensor receive signal from the sensor system; determining a digital receive signal from the sensor receive signal by A/D conversion of the sensor receive signal at a predefined noise scan frequency; determining a plurality of decimated digital receive signals by integer decimation of the digital receive signal using two or more decimation rates that differ from each other, wherein each of the two or more decimation rates is associated with a respective candidate acquisition configuration; determining one or more noise measures for multiple of the candidate acquisition configurations using one or more of the plurality of decimated digital receive signals; and using the one or more noise measures, determining the acquisition configuration for operation of the sensor system from the candidate acquisition configurations.

公开(公告)号：US20240056332A1

公开(公告)日：2024-02-15

申请号：US18146865

申请日：2022-12-27

Applicant: Microchip Technology Incorporated

Inventor： William T. Baggett ,  Dixon Chen ,  Venkatraman Iyer

IPC: H04L12/40

CPC classification number: H04L12/40032

Abstract: Disclosed examples include a method. The method includes: conveying symbols from a PHY toward a MAC via a PHY-side of PHY-MAC interface; and filtering one or more symbols at an input of a PHY-side of an interface wrapper of the PHY-side of the PHY-MAC interface. Disclosed examples include an apparatus. The apparatus includes: a PHY-side of PHY-MAC interface; and a logic circuit provided at the PHY-side of PHY-MAC interface, the logic circuit comprising a symbol filter to filter one or more symbols conveyed via the PHY-side of PHY-MAC interface.

公开(公告)号：US20240056087A1

公开(公告)日：2024-02-15

申请号：US18448783

申请日：2023-08-11

Applicant: Microchip Technology Incorporated

Inventor： Youcef Fouzar ,  Waleed El-halwagy ,  William Roberts ,  Kristopher Kshonze ,  Faizal Warsalee

IPC: H03L7/099 ,  H03L7/10

CPC classification number: H03L7/0991 ,  H03L7/104

Abstract: A method includes: observing that a digitally controlled oscillator (DCO) frequency is at a boundary of a DCO frequency overlap region; and bypassing at least a portion of the DCO frequency overlap region.

公开(公告)号：US11887864B2

公开(公告)日：2024-01-30

申请号：US17326488

申请日：2021-05-21

Applicant: Microchip Technology Incorporated

Inventor： Wichai Kovitsophon ,  Rangsun Kitnarong ,  Ekgachai Kenganantanon ,  Pattarapon Poolsup ,  Watcharapong Nokde ,  Chanyuth Junjuewong

IPC: H01L21/56 ,  H01L21/78 ,  H01L23/544 ,  H01L21/48 ,  H01L21/60

CPC classification number: H01L21/56 ,  H01L21/4839 ,  H01L21/78 ,  H01L23/544 ,  H01L2021/60007

Abstract: Flat no-leads integrated circuit (IC) packages are formed with solder wettable leadframe terminals. Dies are mounted on die attach pads, bonded to adjacent leadframe terminal structures, and encapsulated in a mold compound. A laser grooving process removes mold compound from a leadframe terminal groove extending along a row of leadframe terminal structures. A saw step cut along the leadframe terminal groove extends partially through the leadframe thickness to define a saw step cut groove. Exposed leadframe surfaces, including surfaces exposed by the saw step cut, are plated with a solder-enhancing material. A singulation cut is performed along the saw step cut groove to define leadframe terminals with end surfaces plated with the solder-enhancing material. The laser grooving process may improve the results of the saw step cut, and the saw step cut may remove mold compound not removed by the laser grooving process.

公开(公告)号：US20240031181A1

公开(公告)日：2024-01-25

申请号：US18479631

申请日：2023-10-02

Applicant: Microchip Technology Incorporated

Inventor： William T. Baggett ,  Venkatraman Iyer

IPC: H04L12/12 ,  G06F1/3209

CPC classification number: H04L12/12 ,  G06F1/3209

Abstract: An apparatus may include a physical layer device, a detection circuitry and a power control circuitry. the physical layer device provides one or more functions of a physical layer to interface with a shared physical transmission medium. The detection circuitry detects an indication of power control signaling on the shared physical transmission medium, and detects an indication of Ethernet signaling on the shared physical transmission medium. The indication of power control signaling is different than the indication of Ethernet signaling. The power control circuitry manages a power state of the apparatus at least partially responsive to an output of the detection circuitry.

公开(公告)号：US20240027599A1

公开(公告)日：2024-01-25

申请号：US18474015

申请日：2023-09-25

Applicant: Microchip Technology Incorporated

Inventor： Peter Sauer

IPC: G01S13/58 ,  G01S13/62 ,  G01S7/292

CPC classification number: G01S13/581 ,  G01S13/62 ,  G01S7/292

Abstract: Motion detection apparatuses are disclosed. The motion detection may be performed using one or more of a sub-window of a predetermined time window, a predetermined threshold value that is settable responsive to changes in one or more environmental factors, or a detection trigger. An apparatus includes a processor and an analog-to-digital converter (ADC) circuitry to sample a reflected predetermined pattern signal to generate reflected predetermined pattern samples. The processor captures collections of the reflected predetermined pattern samples corresponding to a predetermined time window and determines a sum of the collections or sub-collections. The processor determines an average of magnitudes of the determined sum and determines that a moving object is detected responsive to a predetermined threshold value.

公开(公告)号：US20240006472A1

公开(公告)日：2024-01-04

申请号：US17881064

申请日：2022-08-04

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L49/02

CPC classification number: H01L28/91

Abstract: A multi-capacitor module includes a stacked metal-insulator-metal (MIM) structure including a cup-shaped first electrode, a cup-shaped first insulator formed over the cup-shaped first electrode, a cup-shaped second electrode formed over the cup-shaped first insulator, a cup-shaped second insulator formed over the cup-shaped second electrode, a third electrode formed over the cup-shaped second insulator. The stacked MIM structure also includes a first sidewall spacer located between the cup-shaped first electrode and the cup-shaped second electrode, and a second sidewall spacer located between the cup-shaped second electrode and the third electrode. The cup-shaped first electrode, the cup-shaped second electrode, and the cup-shaped first insulator define a first capacitor, and the cup-shaped second electrode, the third electrode, and the cup-shaped second insulator define a second capacitor.

公开(公告)号：US11860022B2

公开(公告)日：2024-01-02

申请号：US17336068

申请日：2021-06-01

Applicant: Microchip Technology Incorporated

Inventor： Lorenzo Bellina ,  Maurizio Fiammeni

IPC: G01F23/26 ,  G01F23/263 ,  G01D5/24

CPC classification number: G01F23/263 ,  G01D5/2405

Abstract: One or more examples relate to a detector. A signal that the detector is configured to sense is a differential value. Such a differential value may be indicative of a difference in self-capacitance indications that are exhibited at first and second internal capacitors. Such a differential value may be proportional to a relationship between a first material and a second material present at a device-under-test coupled to electrodes of the detector. Such a differential value may be proportional to a vertical elevation of a surface of a material present at a device-under-test coupled to electrodes of the detector. A difference in coupling capacitances may be obtained by performing complimentary acquisition processes utilizing symmetric capacitive sensors. When the acquisition processes are performed substantially simultaneously, coupling error indications that may be present in the self-capacitance indications are not present in the differential value.

公开(公告)号：US11853096B2

公开(公告)日：2023-12-26

申请号：US17681021

申请日：2022-02-25

Applicant: Microchip Technology Incorporated

Inventor： Michael Harris ,  Daniel Meacham

IPC: G05F3/22 ,  G05F1/46 ,  G05F3/30

CPC classification number: G05F3/225 ,  G05F1/461 ,  G05F3/30

Abstract: A curvature compensated bandgap circuit that is capable of matching best-in-class two (2) parts-per-million performance without over-temperature trimming. This improves performance metrics for precision voltage reference products without requiring individual device tuning during production thereof. A core bandgap circuit comprises a main operational amplifier having a second order bowed voltage response over temperature. A ptat circuit is coupled to the core bandgap circuit to provide a sigmoidal third order shape for the bandgap voltage.

公开(公告)号：US11847076B2

公开(公告)日：2023-12-19

申请号：US17805642

申请日：2022-06-06

Applicant: Microchip Technology Incorporated

Inventor： Jacob Lunn Lassen

IPC: G06F13/28 ,  G06F13/16

CPC classification number: G06F13/28 ,  G06F13/1668

Abstract: Waveform circuitry and related apparatuses and methods are disclosed. An apparatus includes a memory device to store waveform data corresponding to a waveform, a processor, and a waveform circuitry to autonomously pre-process the waveform data independently from the processor and provide the pre-processed waveform data to one or more peripheral devices. A pre-processed waveform corresponding to the pre-processed waveform is data different from the waveform.