Method for sensing biometric object

    公开(公告)号:US11112639B2

    公开(公告)日:2021-09-07

    申请号:US16807827

    申请日:2020-03-03

    Inventor: Yi-Sheng Lin

    Abstract: A method for sensing a biometric object using an electronic device includes the steps of: (a) emitting a sensing light from a backlight unit upon the biometric object contacting a sensing region on a display surface, and allowing the sensing light to pass through a color filter unit and then reach and be reflected by the biometric object to return as a reflected light; and (b) controlling arrangement of liquid crystal molecules located in a first region of a liquid crystal layer to define a first light path, and allowing the reflected light having predetermined wavelengths to pass through the color filter unit and the first light path to reach and be detected by the optical sensing unit.

    LED failure detecting device
    32.
    发明授权

    公开(公告)号:US10085333B1

    公开(公告)日:2018-09-25

    申请号:US15925881

    申请日:2018-03-20

    Abstract: A light emitting diode (LED) failure detecting device is operatively associated with an LED array, and includes a driving circuit and a determining circuit. The driving circuit drives LED units of the LED array through scan lines and data lines of the LED array in such a way that a current flows through one of the LED units. The determining circuit selects a voltage at the data line that is coupled to said one of the LED units, and generates, based on a difference between a first sample voltage that is related to at least the selected voltage at a first time point and a second sample voltage that is related to at least the selected voltage at a second time point, a determination output indicating whether said one of the LED units is determined to have failed.

    Power factor-corrected resonant converter and parallel power factor-corrected resonant converter
    35.
    发明授权
    Power factor-corrected resonant converter and parallel power factor-corrected resonant converter 有权
    功率因数校正谐振变换器和并联功率因数校正谐振变换器

    公开(公告)号:US09263941B2

    公开(公告)日:2016-02-16

    申请号:US13633682

    申请日:2012-10-02

    Abstract: A resonant converter with power factor correction includes a power-obtaining circuit, an energy-storage element and an energy-transferred circuit. The power-obtaining circuit is used for receiving an input line voltage. The energy-storage element is coupled between the power-obtaining circuit and the energy-transferred circuit. The energy-transferred circuit is used for generating an output power. In a first time period, based on a first control signal, the energy-storage element and the power-obtaining circuit operate a soft switching so that the energy-storage element is charged to obtain the input line power and generate an energy-storage voltage. In a second time period, based on a second control signal, the energy-storage element and the energy-transferred circuit operate a soft switching so that the energy-storage element is discharged to make the energy-storage voltage converted into the output power.

    Abstract translation: 具有功率因数校正的谐振转换器包括功率获取电路,能量存储元件和能量传递电路。 功率获取电路用于接收输入线电压。 能量存储元件耦合在功率获取电路和能量转移电路之间。 能量转移电路用于产生输出功率。 在第一时间段中,基于第一控制信号,能量存储元件和功率获取电路操作软开关,从而使能量存储元件被充电以获得输入线功率并产生储能电压 。 在第二时间段中,基于第二控制信号,能量存储元件和能量转移电路操作软开关,使得储能元件被放电,以将储能电压转换为输出功率。

    METHOD AND APPARATUS FOR CONTROLLING THE EQUIVALENT RESISTANCE OF A CONVERTER
    36.
    发明申请
    METHOD AND APPARATUS FOR CONTROLLING THE EQUIVALENT RESISTANCE OF A CONVERTER 有权
    控制转换器等效电阻的方法和装置

    公开(公告)号:US20130170259A1

    公开(公告)日:2013-07-04

    申请号:US13720300

    申请日:2012-12-19

    CPC classification number: H02M7/04 H05B33/08 H05B33/0815 H05B39/08 Y02B20/341

    Abstract: The disclosure provides a method for controlling an equivalent resistance of a converter. The method includes receiving a power source input signal, generating a first control signal according to a voltage level and a state of the power source input signal to adjust an equivalent resistance of the voltage conversion module and cause the voltage conversion module to operate in the damper mode or the converter mode, when the voltage conversion module operates in the converter mode converting the power source input signal to an output signal, and when the voltage conversion module operates in the damper mode detecting the voltage level or the current level of the power source input signal, and adjusting the equivalent resistance so that the voltage conversion module could operate in the bleeder mode or the converter mode to convert the power source input signal to the output signal.

    Abstract translation: 本公开提供了一种用于控制转换器的等效电阻的方法。 该方法包括接收电源输入信号,根据电压电平和电源输入信号的状态产生第一控制信号,以调整电压转换模块的等效电阻,并使电压转换模块在阻尼器中工作 模式或转换器模式,当电压转换模块以转换器模式工作时,将电源输入信号转换为输出信号,并且当电压转换模块以阻尼模式工作时,检测电源电压或电流的当前电平 输入信号,并调整等效电阻,使得电压转换模块可以在泄放模式或转换器模式下工作,将电源输入信号转换为输出信号。

    Light emitting diode display device

    公开(公告)号:US12062321B2

    公开(公告)日:2024-08-13

    申请号:US18338817

    申请日:2023-06-21

    CPC classification number: G09G3/2096 G09G3/32 G09G2300/0426 G09G2330/021

    Abstract: An LED display device includes a system board, and multiple daughterboards that are assembled on the system board. The system board includes a drive power circuit, a first gate circuit and a second gate circuit. Each daughterboard includes a substrate, multiple LEDs that are disposed on the substrate, multiple first transistor switches that are respectively connected to the LEDs, and at least one second transistor switch that is connected to the LEDs. With respect to each daughterboard, the first transistor switches and the at least one second transistor switch cooperatively control current flows through the LEDs; the first transistor switches are further connected to the drive power circuit to respectively receive multiple drive currents, and are further connected to the first gate circuit to receive a timing signal; and the at least one second transistor switch is further connected to the second gate circuit to receive a timing signal.

    Scan-type display apparatus capable of short circuit detection, and data driver thereof

    公开(公告)号:US11996037B2

    公开(公告)日:2024-05-28

    申请号:US18074852

    申请日:2022-12-05

    Abstract: A scan-type display apparatus includes an LED array and a data driver. The LED array has a common anode configuration, and includes multiple scan lines, multiple data lines and multiple LEDs. The data driver includes multiple data driving circuits, each of which includes a current driver and a detector. The current driver has an output terminal connected to the data line corresponding to the data driving circuit, and outputs one of a drive current and a clamp voltage at the output terminal of the current driver based on a pulse width control signal. The detector is connected to the current driver, and generates a detection signal that indicates whether any one of the LEDs connected to the data line corresponding to the data driving circuit is short circuited based on a detection timing signal and a feed-in voltage related to a voltage at the output terminal of the current driver.

    Assembled Light Emitting Diode Display Device

    公开(公告)号:US20240071298A1

    公开(公告)日:2024-02-29

    申请号:US18446498

    申请日:2023-08-09

    Inventor: Ping-Kai HUANG

    CPC classification number: G09G3/32 H01L25/162 H01L25/167

    Abstract: An assembled LED display device includes a system motherboard, and multiple to-be-assembled daughterboards assembled on the system motherboard. The system motherboard includes a drive power circuit including multiple power lines, and a gate control circuit including multiple gate lines. Each to-be-assembled daughterboard includes a substrate, at least one transistor switch, and a plurality of LED units disposed on the substrate and each including multiple LEDs connected to a same one of the at least one transistor switch. The LEDs of the LED units of the to-be-assembled daughterboards are arranged in a matrix having multiple rows and multiple columns. With respect to each column, the LEDs in the column are connected to the power line corresponding to the column. With respect to each to-be-assembled daughterboard, gate terminal(s) of the at least one transistor switch is(are) connected to the gate line corresponding to the to-be-assembled daughterboard.

    Method for packaging integrated circuit chip

    公开(公告)号:US11715644B2

    公开(公告)日:2023-08-01

    申请号:US17248374

    申请日:2021-01-22

    CPC classification number: H01L21/4825 H01L21/565

    Abstract: A method for packaging an integrated circuit chip includes the steps of: a) providing a plurality of dies and a lead frame which includes a plurality of bonding parts each having a die pad, a plurality of leads each having an end region disposed on and connected to the die pad, and a plurality of bumps each disposed on the end region of a respective one of the leads; b) transferring each of the dies to the die pad of a respective one of the bonding parts to permit each of the dies to be flipped on the respective bonding part; and c) hot pressing each of the dies and the die pad of a respective one of the bonding parts to permit each of the dies to be bonded to the bumps of the respective bonding part.

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