公开(公告)号：US20070195909A1

公开(公告)日：2007-08-23

申请号：US11443072

申请日：2006-05-31

Applicant: Hiroyoshi Ishikawa ,  Hajime Hamada ,  Kazuo Nagatani ,  Nobukazu Fudaba ,  Tokuro Kubo

Inventor： Hiroyoshi Ishikawa ,  Hajime Hamada ,  Kazuo Nagatani ,  Nobukazu Fudaba ,  Tokuro Kubo

IPC: H04B15/00

CPC classification number: H04L27/2624 ,  H03G7/00 ,  H03G11/00

Abstract: As in a conventional technology, a hard clipping process and a filtering process are performed on a transmission signal. An original transmission signal is subtracted from a signal on which the processes have been performed, and an inverse sign signal to the suppressed signal is retrieved. By giving a gain to the signal, and adding up to the original transmission signal, a peak voltage is suppressed. The gain can be a ratio of a difference signal between a hard clipped signal and an original transmission signal to a signal of suppression of a filtered signal from the original transmission signal, or a value determined by a simulation depending on the cutoff frequency of a low pass filter used in the filtering process.

Abstract translation: 像传统技术一样，对发送信号执行硬削波处理和滤波处理。 从已经执行了处理的信号中减去原始发送信号，并且检索到抑制信号的逆信号。 通过给信号增益，并加上原始的传输信号，抑制峰值电压。 增益可以是硬削波信号和原始发送信号之间的差分信号与来自原始发送信号的滤波信号的抑制信号的比率，或者通过根据低频的截止频率的模拟确定的值 过滤器用于过滤过程。

公开(公告)号：US20050238114A1

公开(公告)日：2005-10-27

申请号：US10945316

申请日：2004-09-20

Applicant: Hiroyoshi Ishikawa ,  Kazuo Nagatani ,  Nobukazu Fudaba ,  Hajime Hamada ,  Tokuro Kubo

Inventor： Hiroyoshi Ishikawa ,  Kazuo Nagatani ,  Nobukazu Fudaba ,  Hajime Hamada ,  Tokuro Kubo

IPC: H04L27/20 ,  H04L27/00 ,  H04L27/36

CPC classification number: H04L27/0014 ,  H03C2200/0058 ,  H03C2200/0079 ,  H04L27/364 ,  H04L2027/0016 ,  H04L2027/0018

Abstract: A disclosed quadrature modulation system inputs an inphase signal component and an orthogonal signal component, and outputs an output signal that is quadrature modulated by a quadrature modulator. The quadrature modulation system calculates a first cumulative total based on the inphase signal component input into the quadrature modulator and an inphase signal component of a feedback signal obtained from the output signal. The quadrature modulation system calculates a second cumulative total based on the orthogonal signal component input into the quadrature modulator and an orthogonal signal component of the feedback signal. Based on the first and the second cumulative totals, a time difference between the inphase signal component and the orthogonal signal component is determined. The inphase signal component and the orthogonal signal component to be provided to the quadrature modulator are adjusted based on the time difference such that the time difference is compensated for.

Abstract translation: 所公开的正交调制系统输入同相信号分量和正交信号分量，并输出由正交调制器正交调制的输出信号。 正交调制系统基于输入到正交调制器的同相信号分量和从输出信号获得的反馈信号的同相信号分量来计算第一累积总数。 正交调制系统基于输入到正交调制器的正交信号分量和反馈信号的正交信号分量来计算第二累积总数。 基于第一和第二累积总数，确定同相信号分量和正交信号分量之间的时间差。 基于时间差来调整要提供给正交调制器的同相信号分量和正交信号分量，以便补偿时间差。

公开(公告)号：US20050219118A1

公开(公告)日：2005-10-06

申请号：US10920994

申请日：2004-08-18

Applicant: Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba

Inventor： Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba

IPC: H04J1/00 ,  G01S7/40 ,  H01Q3/26 ,  H04B1/707 ,  H04B7/08 ,  H04B7/10 ,  H04L27/26

CPC classification number: H04B17/0085 ,  H01Q3/267 ,  H04B17/12

Abstract: Disclosed is a phase calibration method for inserting a calibration signal (SC) into main signals (SM1 to SMn) of a plurality of branches in turn, estimating the phase characteristic of an analog circuit to which a respective one of the main signals is input and calibrating the phase of each main signal. The method includes steps of outputting a first combined signal obtained by combining output signals from the analog circuits (62a to 62n) in all branches, outputting a second combined signal obtained by combining the main signals in all branches, extracting the calibration signal by removing the second combined signal from the first combined signal in a calibration signal extracting unit (64), estimating the phase characteristics of the analog circuits, to which the main signals having the inserted calibration signal are input, based upon a change in phase of the calibration signal, and subjecting the main signals to phase adjustment having characteristics that are opposite the phase characteristics.

Abstract translation: 公开了一种用于依次将多个分支的主信号（SM 1至SM n）插入校准信号（SC）的相位校准方法，估计相应一个主信号被输入的模拟电路的相位特性 并校准每个主信号的相位。 该方法包括以下步骤：输出通过在所有分支中组合来自模拟电路（62a至62n）的输出信号而获得的第一组合信号，输出通过组合所有分支中的主信号而获得的第二组合信号，通过 在校准信号提取单元（64）中从所述第一组合信号中去除所述第二组合信号，基于所述校准信号提取单元（64）的相位变化估计输入了具有插入的校准信号的所述主信号的所述模拟电路的相位特性 校准信号，并对主信号进行相位调整，具有与相位特性相反的特性。

公开(公告)号：US20050101258A1

公开(公告)日：2005-05-12

申请号：US10998283

申请日：2004-11-23

Applicant: Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Yasuyuki Oishi ,  Toru Maniwa ,  Hiroyuki Hayashi

Inventor： Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Yasuyuki Oishi ,  Toru Maniwa ,  Hiroyuki Hayashi

IPC: H03F1/32 ,  H04K3/00 ,  H04L27/36

CPC classification number: H04L27/368 ,  H03F1/3247 ,  H03F1/3294 ,  H03F2200/447 ,  H03F2201/3233

Abstract: A distortion compensation apparatus of the present invention is used in a transmitter that produces and outputs a second signal from a first signal. This apparatus comprises a delay unit for delaying a feedback signal obtained from by the second signal; and a delay control unit for determining a delay quantity of said delay means so that a timing difference between a reference signal obtained from the first signal and the feedback signal delayed by the delay unit is made small. The delay control unit limits the delay quantity within a predetermined limit value.

Abstract translation: 本发明的失真补偿装置用于从第一信号产生并输出第二信号的发送器中。 该装置包括用于延迟由第二信号获得的反馈信号的延迟单元; 以及延迟控制单元，用于确定所述延迟装置的延迟量，使得从第一信号获得的参考信号和由延迟单元延迟的反馈信号之间的定时差变小。 延迟控制单元将延迟量限制在预定极限值内。

公开(公告)号：US06717464B2

公开(公告)日：2004-04-06

申请号：US10256833

申请日：2002-09-27

Applicant: Nobukazu Fudaba ,  Yasuyuki Oishi ,  Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa

Inventor： Nobukazu Fudaba ,  Yasuyuki Oishi ,  Tokuro Kubo ,  Kazuo Nagatani ,  Hajime Hamada ,  Hiroyoshi Ishikawa

IPC: H03F126

CPC classification number: H03F1/3241 ,  H03F1/3247 ,  H03F1/3294 ,  H03F2201/3233

Abstract: In a distortion compensating apparatus for adaptively compensating a non-linear distortion of a circuit having the non-linear distortion, an adaptive equalizing processor adaptively selects, from among a filter coefficient group preliminarily held in a memory, a filter coefficient which makes an out-of-band power of an output signal reduced to be set in a digital filter.

Abstract translation: 在用于自适应地补偿具有非线性失真的电路的非线性失真的失真补偿装置中，自适应均衡处理器从预先保持在存储器中的滤波器系数组中自适应地选择滤波器系数， 输出信号的带内功率减少以设置在数字滤波器中。

公开(公告)号：US08605815B2

公开(公告)日：2013-12-10

申请号：US12499270

申请日：2009-07-08

Applicant: Yuichi Utsunomiya ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Hajime Hamada ,  Kazuo Nagatani

Inventor： Yuichi Utsunomiya ,  Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Hajime Hamada ,  Kazuo Nagatani

IPC: H04L25/03

CPC classification number: H04B1/0475 ,  H03F1/3247 ,  H03F3/24

Abstract: A delay amount estimating apparatus includes a delay value search section that searches for a first delay value smaller than a delay setting value at which a given correlation value between an input signal and a feedback signal is provided, and also for a second delay value greater than the delay setting value, the feedback signal coming from a signal processing apparatus that applies signal processing on the input signal, wherein respective correlation values of the first delay value and the second delay value satisfy a given condition; and a delay estimating section that estimates a delay amount of the feedback signal relative to the input signal based on the first delay value and the second delay value.

Abstract translation: 延迟量估计装置包括延迟值搜索部分，其搜索小于提供输入信号和反馈信号之间的给定相关值的延迟设定值的第一延迟值，以及大于 延迟设定值，来自对输入信号进行信号处理的信号处理装置的反馈信号，其中第一延迟值和第二延迟值的各自的相关值满足给定条件; 以及延迟估计部，其基于所述第一延迟值和所述第二延迟值，估计所述反馈信号相对于所述输入信号的延迟量。

公开(公告)号：US08588711B2

公开(公告)日：2013-11-19

申请号：US13234665

申请日：2011-09-16

Applicant: Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Kazuo Nagatani ,  Yasuyuki Oishi

Inventor： Hiroyoshi Ishikawa ,  Nobukazu Fudaba ,  Kazuo Nagatani ,  Yasuyuki Oishi

IPC: H04B1/04 ,  H03F1/32

CPC classification number: H03F1/3247 ,  H03F1/3258 ,  H03F3/189 ,  H03F3/24 ,  H03F2200/336 ,  H03F2200/451 ,  H03F2201/3233 ,  H03M1/0614 ,  H03M1/66 ,  H04B1/0475

Abstract: A transmission apparatus includes an analog digital converter that performs sampling on a demodulated signal obtained by demodulating a part of an output signal, which is produced by amplifying a modulated signal of a baseband signal including a plurality of signals having frequencies separated from each other, at a sampling frequency lower than a frequency of a given intermodulation distortion component and converting the demodulated signal into a digital signal, a detection section that detects an aliasing component of the given intermodulation distortion component produced by the conversion of the analog digital converter, and a distortion compensation section that compensates an input signal to be modulated for the given intermodulation distortion component in accordance with the detected aliasing component.

Abstract translation: 一种发送装置，包括：模拟数字转换器，对通过解调部分输出信号而获得的解调信号进行采样，所述解调信号是通过放大包括具有彼此分离的频率的多个信号的基带信号的调制信号而产生的， 采样频率低于给定互调失真分量的频率并将解调信号转换为数字信号;检测部分，其检测通过模拟数字转换器的转换产生的给定互调失真分量的混叠分量;以及失真 补偿部分，根据检测到的混叠分量来补偿对于给定的互调失真分量要调制的输入信号。

公开(公告)号：US08493144B2

公开(公告)日：2013-07-23

申请号：US13088580

申请日：2011-04-18

Applicant: Hiroyoshi Ishikawa ,  Hajime Hamada ,  Nobukazu Fudaba ,  Yuichi Utsunomiya ,  Kazuo Nagatani ,  Yasuyuki Oishi

Inventor： Hiroyoshi Ishikawa ,  Hajime Hamada ,  Nobukazu Fudaba ,  Yuichi Utsunomiya ,  Kazuo Nagatani ,  Yasuyuki Oishi

IPC: H03F1/26

CPC classification number: H03F1/3258 ,  H03F1/3247 ,  H03F3/189 ,  H03F3/24 ,  H03F2200/204 ,  H03F2200/451 ,  H03F2201/3233

Abstract: A distortion compensation device includes a distortion compensation unit which compensates for a distortion generated in a power amplifier by using a polynomial in which a signal to be input into a power amplifier is raised to a power of a degree N (N is an integer larger than 0) and the raised signal is delayed by a delay number K (K is an integer larger than 0), and a polynomial adjusting unit which adjusts the degree N or the delay number K of the polynomial based on a comparison between a prescribed value, which indicates a degree of variation of the distortion generated in the power amplifier and a threshold value.

Abstract translation: 失真补偿装置包括失真补偿单元，其通过使用将要输入到功率放大器的信号提高到N的幂的多项式来补偿在功率放大器中产生的失真（N是大于 0），并且升高的信号被延迟了延迟数K（K是大于0的整数），以及多项式调整单元，其基于规定值， 其指示在功率放大器中产生的失真的变化程度和阈值。

公开(公告)号：US08442157B2

公开(公告)日：2013-05-14

申请号：US12794124

申请日：2010-06-04

Applicant: Hiroyoshi Ishikawa ,  Kazuo Nagatani ,  Hajime Hamada ,  Nobukazu Fudaba ,  Yuichi Utsunomiya ,  Takeshi Ohba ,  Hideharu Shako ,  Yasuhito Funyu

Inventor： Hiroyoshi Ishikawa ,  Kazuo Nagatani ,  Hajime Hamada ,  Nobukazu Fudaba ,  Yuichi Utsunomiya ,  Takeshi Ohba ,  Hideharu Shako ,  Yasuhito Funyu

IPC: H04B1/38

CPC classification number: H04L27/2337

Abstract: A wireless apparatus includes: an A/D converter which samples an in-phase signal component and a quadrature signal component from a quadrature-modulated signal of analog form alternately; a digital quadrature demodulation unit which applies digital quadrature demodulation to an output signal of the A/D converter and outputs an in-phase signal and a quadrature signal; and an error detection unit which, based on the in-phase and quadrature signals output from the digital quadrature demodulation unit, detects a time difference error between the sample timing of the in-phase signal component and the sample timing of the quadrature signal component.

Abstract translation: 无线装置包括：A / D转换器，其交替地从模拟形式的正交调制信号中采样同相信号分量和正交信号分量; 数字正交解调单元，对A / D转换器的输出信号进行数字正交解调，并输出同相信号和正交信号; 以及误差检测单元，其基于从数字正交解调单元输出的同相和正交信号，检测同相信号分量的采样定时与正交信号分量的采样定时之间的时差误差。

公开(公告)号：US20120229209A1

公开(公告)日：2012-09-13

申请号：US13405441

申请日：2012-02-27

Applicant: NOBUKAZU FUDABA ,  HIROYOSHI ISHIKAWA ,  YUICHI UTSUNOMIYA ,  KAZUO NAGATANI

Inventor： NOBUKAZU FUDABA ,  HIROYOSHI ISHIKAWA ,  YUICHI UTSUNOMIYA ,  KAZUO NAGATANI

IPC: H03F1/26

CPC classification number: H03F3/24 ,  H03F1/3247 ,  H03F1/3258 ,  H03F3/189 ,  H03F2200/336 ,  H03F2201/3233

Abstract: A power amplifier amplifies a signal. An error signal calculating unit calculates an error signal in accordance with an input signal and an output from the power amplifier. A distortion compensation unit performs predistortion on the input signal by using distortion compensation coefficients that are generated in accordance with a plurality of delay signals obtained by giving different amounts of delay to the input signal and by using an error signal and outputs the input signal subjected to the predistortion to the signal amplifying unit. A tap interval control unit controls the delay intervals of the delay signals that are used for the predistortion performed by the distortion compensation unit in accordance with signal correlation information calculated from the input signal.

Abstract translation: 功率放大器放大信号。 误差信号计算单元根据输入信号和来自功率放大器的输出来计算误差信号。 失真补偿单元通过使用根据通过对输入信号赋予不同量的延迟而获得的多个延迟信号而产生的失真补偿系数，并且通过使用误差信号，并且输出经受 对信号放大单元的预失真。 抽头间隔控制单元根据从输入信号计算的信号相关信息来控制用于由失真补偿单元执行的预失真的延迟信号的延迟间隔。