Abstract:
A delay locked loop includes a buffer for outputting an internal clock by buffering an external clock, a delay block for delaying the internal clock in response to one of control signals or a selection signal, thereby outputting a delayed clock, a control signal generation block for generating at least one control signal according to a phase difference between the internal clock and a feedback clock generated by delaying the delayed clock by a delay time taken for the internal clock to be output, a selection block for outputting at least one selection signal in response to a signal instructing an off mode of the delay locked loop, thereby controlling a delay time in the delay block, and an output driver for driving the delayed clock.
Abstract:
A duty cycle correction circuit of a semiconductor memory apparatus includes a duty ratio correcting unit configured to correct a duty ratio of a clock signal according to levels of a first reference voltage and a second reference voltage, and to output the clock signal as a correction clock signal, a duty ratio detecting unit configured to count first and second counting signals in response to a duty ratio of the correction clock signal when a pump enable signal is enabled, a pump enable signal generating unit configured to generate the pump enable signal in response to the duty ratio of the correction clock signal, and a reference voltage generating unit configured to generate the first and second reference voltages in response to the first and second counting signals.
Abstract:
Disclosed is a method of recovering 1,3-butadiene from a C4 stream containing butane, isobutane, 2-butene, 1-butene, isobutene, butadiene and acetylene. The process of recovering highly pure 1,3-butadiene includes acetylene conversion for selectively converting acetylene through liquid-phase hydrogenation, so that the acetylene content is decreased to 70 wt ppm or less, and 1,3-butadiene extraction using an extractive distillation column, a pre-separator, a solvent stripping column, a solvent recovery column, and a purification column. Through the acetylene conversion, the concentration of vinylacetylene is decreased to 70 wt ppm or less, after which 1,3-butadiene is recovered using only one extractive distillation column, thereby considerably decreasing the degree of utility and the loss of streams in the course of extraction. The number of units necessary for the process is decreased, thus remarkably reducing the time during which impurities can accumulate in a processing unit.
Abstract:
The present invention relates to a method and an apparatus for the separation of C4 olefins (butene-1, trans-2-butene, cis-2-butene, etc.) and C4 paraffins (normal butane, isobutane, etc.) from a C4 hydrocarbon mixed gas including butene-1, trans-2-butene, cis-2-butene, normal butane, isobutane, etc. The method of the present invention produces C4 olefins with high purity by introducing a gaseous C4 mixture into the adsorption tower loaded with adsorbent selectively adsorbing olefins to adsorb C4 olefins and to discharge C4 paraffins to the outlet of the tower, desorbing C4 olefins adsorbed on the adsorption tower with a desorbent (C5 hydrocarbon, C6 hydrocarbon, etc.), and then separating the C4 olefin and the desorbent by a distillation process. The apparatus of the present invention is composed of several adsorption towers loaded with an adsorbent which selectively adsorb olefins and two distillation towers for the separation of the mixture gases of olefins/desorbents and paraffins/desorbents respectively, The basic operating process of the adsorption tower comprises a adsorption step of selectively adsorbing C4 olefin from the feeding mixture, a C4 olefin rinse step of removing a small amount of C4 paraffins adsorbed together with C4 olefins, and a desorption step of desorbing C4 olefins by using a desorbent, and further comprises a pressure equalization step, a cocurrent depressurization step, and a accumulation pressure step in order to increase the yield and concentration of olefins depending on the operation pressure of the adsorption tower. The desorbent discharged from the process together with olefins or paraffins is separated in the distillation tower and then recycled.
Abstract:
A duty cycle correction circuit of a semiconductor memory apparatus includes a duty ratio correcting unit configured to correct a duty ratio of a clock signal according to levels of a first reference voltage and a second reference voltage, and to output the clock signal as a correction clock signal, a duty ratio detecting unit configured to count first and second counting signals in response to a duty ratio of the correction clock signal when a pump enable signal is enabled, a pump enable signal generating unit configured to generate the pump enable signal in response to the duty ratio of the correction clock signal, and a reference voltage generating unit configured to generate the first and second reference voltages in response to the first and second counting signals.
Abstract:
Disclosed herein is a method of producing an optically active thiophene-based compound using a simulated moving bed adsorption separation process, and more specifically, a method of continuously separating a racemic thiophene-based compound into its optically active thiophene-based compounds having high purity, through optical resolution using the simulated moving bed process. According to the method of the current invention, a racemic mixture of a thiophene-based compound can be continuously separated into its optically active thiophene-based compounds having high purity, which is an intermediate of optically active dorzolamide acting as a topical therapeutic agent for glaucoma, using a simulated moving bed adsorption separation technique, thereby increasing industrial usability.
Abstract:
A clock synchronization circuit and a clock synchronization method which generate an internal clock synchronized to an external clock is presented. The circuit and method include a clock enable control circuit generating a clock enable control signal controlled by a power supply voltage and a power-down signal. The circuit and method also include a clock generating circuit receiving an input clock which selectively generates an internal clock synchronized to an external clock using the input clock using the clock enable control signal. Whereupon, a locking failure can be prevented by performing a phase update operation selectively in accordance with whether the power supply voltage is varied or not in the power-down mode. Furthermore, current consumption can be reduced by controlling phase update time in accordance with a variable magnitude of the power supply voltage.
Abstract:
This invention relates to a bismuth molybdate catalyst, a preparation method thereof, and a method of preparing 1,3-butadiene using the same, and to a bismuth molybdate catalyst, a preparation method thereof, and a method of preparing 1,3-butadiene using the same, in which 1,3-butadiene can be prepared through oxidative dehydrogenation directly using a C4 mixture including n-butene and n-butane as a reactant in the presence of a mixed-phase bismuth molybdate catalyst including α-bismuth molybdate (Bi2Mo3On) and γ-bismuth molybdate (Bi2MoO6). According to this invention, the C4 raffinate, containing many impurities, is used as a reactant, without an additional n-butane separation process, thus obtaining 1,3-butadiene at high yield. Unlike complicated multicomponent-based metal oxides, the catalyst of the invention has simple constituents and synthesis routes, and can be easily formed through physical mixing, and thus is very advantageous in assuring reproducibility and can be directly applied to commercial processes.
Abstract:
Provided are an apparatus and method for correcting a frequency offset in a satellite digital video broadcasting system. The apparatus includes: a frequency response transformer for receiving a satellite digital video broadcasting signal and acquiring a plurality of frequency responses divided into a positive frequency part and a negative frequency part; a rotation/difference value calculation unit for selecting one of the plurality of frequency responses inputted from the frequency response transformer and calculating a first area difference value indicating a difference in area between the positive frequency part and the negative frequency part without rotation for the selected frequency response, and calculating a second area difference value indicating a difference in area between the positive frequency component and the negative frequency component with rotation for the remaining frequency responses; a zero intersection point calculator for dividing an average slope of a straight line formed by the first area difference value and the second area difference value by the first area difference value, and calculating a zero intersection point of an area difference value on the straight line; and a frequency offset estimator for correcting the zero intersection point provided from the zero intersection point calculator to thereby estimate the frequency offset.
Abstract:
A display device having an improved viewing angle by using a linear polarization structure, and a method of manufacturing the same. The display device includes a first substrate arrangement including a domain forming layer and a pixel electrode arranged on the domain forming layer, the pixel electrode having a cross type opening pattern, a second substrate arrangement including a common electrode arranged on an entire surface that faces the first substrate arrangement and a liquid crystal layer arranged between the first substrate arrangement and the second substrate arrangement, the liquid crystal layer including a plurality of liquid crystal molecules and a reactive mesogen to fix liquid crystal molecules and to produce a liquid crystal domain based on the cross type opening pattern.