公开(公告)号：US20120250334A1

公开(公告)日：2012-10-04

申请号：US13169039

申请日：2011-06-27

Applicant: WEI-JEN HUANG ,  JUI-WEN HUNG ,  CHING-BAI HWANG

Inventor： WEI-JEN HUANG ,  JUI-WEN HUNG ,  CHING-BAI HWANG

IPC: F21V29/00

CPC classification number: F21V29/51 ,  F21K9/232 ,  F21V3/00 ,  F21V29/006 ,  F21V29/773 ,  F21Y2115/10

Abstract: An LED lamp includes a heat sink, a heat pipe and an LED. The heat sink includes a connecting core and fins mounted around the connecting core. Each of the fins includes a plate-shaped main body and a flange extending perpendicularly from a periphery side of the main body. The flanges of the fins cooperatively form an annular planar top surface of the heat sink. The heat pipe includes a condensing section, an evaporating section parallel to and higher than the condensing section and an adiabatic section connected between the condensing section and the evaporating section. The condensing section is fixed to and thermally connects with the top surface of the heat sink. The LED is directly mounted on the evaporating section with a light emitting surface thereof facing outwardly.

Abstract translation: LED灯包括散热器，热管和LED。 散热器包括连接芯和围绕连接芯安装的散热片。 每个翅片包括板状主体和从主体的周边垂直延伸的凸缘。 翅片的凸缘协同地形成散热器的环形平面顶表面。 热管包括冷凝部，与冷凝部平行且高于冷凝部的蒸发部，以及连接在冷凝部和蒸发部之间的绝热部。 冷凝部分与散热片的顶面固定并热连接。 LED直接安装在蒸发部分上，其发光表面面向外。

公开(公告)号：US20120054437A1

公开(公告)日：2012-03-01

申请号：US12870596

申请日：2010-08-27

Applicant: WEI-JEN HUANG ,  Chih-Tsung Huang ,  Sachin Agarwal ,  Sha Ma

Inventor： WEI-JEN HUANG ,  Chih-Tsung Huang ,  Sachin Agarwal ,  Sha Ma

IPC: G06F12/02 ,  G06F12/08

CPC classification number: G06F3/0613 ,  G06F3/064 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0674 ,  G06F3/0679 ,  G06F11/108 ,  G06F12/06 ,  G06F12/0864 ,  G06F13/1642 ,  G06F13/1673 ,  H04L45/60 ,  H04L45/745

Abstract: Techniques are described for increasing data access performance for a memory device. In various embodiments, a scheduler/controller is configured to manage data as it read to or written from a memory. Read access is increased by partitioning a memory into a group of sub-blocks, associating a parity block with the sub-blocks, and accessing the sub-blocks to read data as needed. Write speeds may be improved by adding a pending write buffer to a group of memory sub-blocks. Such a buffer may be sized to be equal to the group of memory sub-blocks. The pending write buffer is used to handle collisions for write accesses to the same block, allowing two simultaneous writes to any regular memory block to occur. Additionally, a set-associative memory block may be used to improve write speed.

Abstract translation: 描述了用于增加存储器设备的数据访问性能的技术。 在各种实施例中，调度器/控制器被配置为在从存储器读取或从存储器写入时管理数据。 通过将存储器分割成一组子块，将奇偶校验块与子块相关联，以及根据需要访问子块以读取数据来增加读取访问。 通过将一个待处理的写入缓冲区添加到一组存储器子块可以改善写入速度。 这样的缓冲器的大小可以等于存储器子块组。 待处理写缓冲区用于处理对同一块的写入访问的冲突，允许发生任何常规内存块的两次同时写入。 另外，可以使用集合关联存储器块来提高写入速度。

公开(公告)号：US08107499B2

公开(公告)日：2012-01-31

申请号：US11821251

申请日：2007-06-21

Applicant: Wei-Jen Huang ,  Chih-Tsung Huang ,  Claudio DeSanti

Inventor： Wei-Jen Huang ,  Chih-Tsung Huang ,  Claudio DeSanti

IPC: H04L3/06

CPC classification number: H04L5/1438

Abstract: A method includes defining a pattern of time intervals, each time interval having a respective assigned communication speed, which alternates among multiple communication speeds supported by a first communication device. Synchronization requests are transmitted over a communication medium from the first communication device to a second communication device at the respective communication speed that is assigned in each interval in accordance with the pattern. While transmitting the synchronization requests, synchronization replies sent over the communication medium in response to the synchronization requests are received only at the respective communication speed that is assigned in each interval. Responsively to receiving the synchronization replies from the second communication device, one or more common communication speeds that are supported by both the first and the second communication devices are identified. Communication is established between the first and second communication devices over the communication medium using one of the common communication speeds.

Abstract translation: 一种方法包括定义时间间隔的模式，每个时间间隔具有各自分配的通信速度，其在由第一通信设备支持的多个通信速度之间交替。 同步请求通过通信介质从第一通信设备以按照该模式在每个间隔中分配的相应通信速度被发送到第二通信设备。 在发送同步请求的同时，响应于同步请求通过通信介质发送的同步回复仅在每个间隔中分配的相应通信速度下被接收。 响应于从第二通信设备接收同步响应，识别由第一和第二通信设备支持的一个或多个通用通信速度。 使用公共通信速度之一，通过通信介质在第一和第二通信设备之间建立通信。

公开(公告)号：US06989689B2

公开(公告)日：2006-01-24

申请号：US10852858

申请日：2004-05-24

Applicant: Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Michael Hutton ,  Victor Maruri ,  Rakesh Patel ,  Peter J. Kazarian ,  Andrew Leaver ,  David W. Mendel ,  Jim Park

Inventor： Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Michael Hutton ,  Victor Maruri ,  Rakesh Patel ,  Peter J. Kazarian ,  Andrew Leaver ,  David W. Mendel ,  Jim Park

IPC: H03K19/177

CPC classification number: G06F7/506 ,  H03K19/1737 ,  H03K19/177 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/1774 ,  H03K19/17744 ,  H03K19/17792

Abstract: A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions. Interconnection resources (e.g., interconnection conductors, signal buffers/drivers, programmable connectors, etc.) are provided on the device for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar (e.g., with similar and substantially parallel routing) but that have significantly different signal propagation speed characteristics. For example, a major or larger portion of such dual-form interconnection resources may have what may be termed normal signal speed, while a smaller minor portion may have significantly faster signal speed. Secondary (e.g., clock and clear) signal distribution may also be enhanced, and so may be input/output circuitry and cascade connections between adjacent or nearby logic modules on the device.

公开(公告)号：US06894533B2

公开(公告)日：2005-05-17

申请号：US10458431

申请日：2003-06-09

Applicant: Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Michael Hutton ,  Victor Maruri ,  Rakesh Patel ,  Peter J. Kazarian ,  Andrew Leaver ,  David W. Mendel ,  Jim Park

Inventor： Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Michael Hutton ,  Victor Maruri ,  Rakesh Patel ,  Peter J. Kazarian ,  Andrew Leaver ,  David W. Mendel ,  Jim Park

IPC: G06F7/50 ,  G06F7/506 ,  H03K19/173 ,  H03K19/177

CPC classification number: G06F7/506 ,  H03K19/1737 ,  H03K19/177 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/1774 ,  H03K19/17744 ,  H03K19/17792

Abstract: A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions. Interconnection resources (e.g., interconnection conductors, signal buffers/drivers, programmable connectors, etc.) are provided on the device for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar (e.g., with similar and substantially parallel routing) but that have significantly different signal propagation speed characteristics. For example, a major or larger portion of such dual-form interconnection resources may have what may be termed normal signal speed, while a smaller minor portion may have significantly faster signal speed. Secondary (e.g., clock and clear) signal distribution may also be enhanced, and so may be input/output circuitry and cascade connections between adjacent or nearby logic modules on the device.

Abstract translation: 可编程逻辑集成电路器件具有多个可编程逻辑区域，该多个可编程逻辑区域设置在该区域的多个相交行和列中的该器件上。 在设备上提供互连资源（例如，互连导体，信号缓冲器/驱动器，可编程连接器等），用于对区域之间，从区域和/或区域之间进行可编程互连。 这些互连资源中的至少一些以架构上相似的两种形式提供（例如，具有相似和基本上并行的路由），但具有显着不同的信号传播速度特性。 例如，这种双形互连资源的主要或更大部分可以具有所谓的正常信号速度，而较小次要部分可具有明显更快的信号速度。 辅助（例如时钟和清除）信号分布也可以被增强，并且因此也可以是设备上的相邻或附近逻辑模块之间的输入/输出电路和级联连接。

公开(公告)号：US06366120B1

公开(公告)日：2002-04-02

申请号：US09517146

申请日：2000-03-02

Applicant: James Schleicher ,  James Park ,  Sergey Shumarayev ,  Bruce Pedersen ,  Tony Ngai ,  Wei-Jen Huang ,  Victor Maruri ,  Rakesh Patel

Inventor： James Schleicher ,  James Park ,  Sergey Shumarayev ,  Bruce Pedersen ,  Tony Ngai ,  Wei-Jen Huang ,  Victor Maruri ,  Rakesh Patel

IPC: H03K190177

CPC classification number: G06F7/506 ,  H03K19/1737 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17744 ,  H03K19/17792

Abstract: A programmable logic device has many regions of programmable logic, together with relatively general-purpose, programmable, interconnection resources that can be used to make interconnections between virtually any of the logic regions. In addition, various types of more local interconnection resources are associated with each logic region for facilitating the making of interconnections between adjacent or nearby logic regions without the need to use the general-purpose interconnection resources for those interconnections. The local interconnection resources support flexible clustering of logic regions via relatively direct and therefore high-speed interconnections, preferably in both horizontal and vertical directions in the typically two-dimensional array of logic regions. The logic region clustering options provided by the local interconnection resources are preferably boundary-less or substantially boundary-less within the array of logic regions.

Abstract translation: 可编程逻辑器件具有许多可编程逻辑区域，以及可用于在几乎任何逻辑区域之间进行互连的相对通用的，可编程的互连资源。 此外，各种类型的更多本地互连资源与每个逻辑区域相关联，以便于在相邻或附近的逻辑区域之间建立互连，而不需要使用这些互连的通用互连资源。 本地互连资源通过相对直接的和因此的高速互连来支持逻辑区域的灵活聚集，优选地在逻辑区域的典型二维阵列中的水平和垂直方向。 由本地互连资源提供的逻辑区域聚类选项优选地在逻辑区域阵列内是无边界的或基本无边界的。

公开(公告)号：US20180128390A1

公开(公告)日：2018-05-10

申请号：US15384295

申请日：2016-12-19

Applicant: YU-WEN LIN ,  WEI-JEN HUANG ,  Tire Service Equipment Mfg., Inc.

Inventor： YU-WEN LIN ,  WEI-JEN HUANG

IPC: F16K15/20

CPC classification number: F16K15/207 ,  F16K15/021 ,  F16K15/026 ,  F16K15/18

Abstract: A differential pressure type inflating device, adapted for fast inflating the devices that need inflating, comprises a gas container, a relief valve, a gas nozzle, a pipe joint, a switchvalve, and a relief pipe. When external high pressure gas enters the gas container and renders the gas pressures in the gas container and the relief pipe reaching a balance condition, the switchvalve can be pressed to generate pressure drop in the relief pipe, which launches the relief valve and discharges the high pressure gas in the gas container from the gas nozzle. In this design, the gas container, relief valve, gas nozzle, relief pipe, and pipe joint are connected with screwing structures, so as to achieve the function of easy assembling.

公开(公告)号：US09929829B1

公开(公告)日：2018-03-27

申请号：US13397062

申请日：2012-02-15

Applicant: Wei-Jen Huang ,  Chih-Tsung Huang

Inventor： Wei-Jen Huang ,  Chih-Tsung Huang

IPC: H04L1/00

CPC classification number: H04L1/00 ,  H04L47/10

Abstract: A method is provided in one example embodiment that includes measuring a delay between a transmitter and a receiver in a network environment, where the receiver is associated with a buffer. A minimum absorption buffer size for lossless transmission to a queue may be determined based on the delay and a transmission bandwidth, and buffer units for the queue can be allocated based on the minimum absorption buffer size. The transmitter may also be rate-limited if the minimum absorption buffer size exceeds available storage of the buffer. In other embodiments, buffer units can be reclaimed if the available buffer storage exceeds the minimum absorption buffer size.

公开(公告)号：US08854817B2

公开(公告)日：2014-10-07

申请号：US13570279

申请日：2012-08-09

Applicant: Shih-Yao Li ,  Jui-Wen Hung ,  Wei-Jen Huang

Inventor： Shih-Yao Li ,  Jui-Wen Hung ,  Wei-Jen Huang

IPC: H05K7/20 ,  F28D15/00

CPC classification number: H01L23/467 ,  H01L23/3672 ,  H01L23/4006 ,  H01L23/427 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An exemplary electronic device includes an electronic component, a heat dissipation device, a fixing member and a casing contained the electronic component, the heat dissipation device and the fixing member therein. The heat dissipation device thermally contacts the electronic component. The fixing member includes a main body and an engaging portion extending from the main body. The engaging portion fixes the heat dissipation device to the fixing member. Fasteners extend through the casing and engage the main body of the fixing member to secure the fixing member on the casing.

Abstract translation: 示例性的电子设备包括电子部件，散热装置，固定部件和容纳电子部件，散热装置和固定部件的壳体。 散热装置与电子部件热接触。 固定构件包括主体和从主体延伸的接合部。 接合部将散热装置固定在固定部件上。 紧固件延伸穿过壳体并接合固定构件的主体以将固定构件固定在壳体上。

公开(公告)号：US08657471B2

公开(公告)日：2014-02-25

申请号：US13169039

申请日：2011-06-27

Applicant: Wei-Jen Huang ,  Jui-Wen Hung ,  Ching-Bai Hwang

Inventor： Wei-Jen Huang ,  Jui-Wen Hung ,  Ching-Bai Hwang

IPC: F21V29/00

CPC classification number: F21V29/51 ,  F21K9/232 ,  F21V3/00 ,  F21V29/006 ,  F21V29/773 ,  F21Y2115/10

Abstract: An LED lamp includes a heat sink, a heat pipe and an LED. The heat sink includes a connecting core and fins mounted around the connecting core. Each of the fins includes a plate-shaped main body and a flange extending perpendicularly from a periphery side of the main body. The flanges of the fins cooperatively form an annular planar top surface of the heat sink. The heat pipe includes a condensing section, an evaporating section parallel to and higher than the condensing section and an adiabatic section connected between the condensing section and the evaporating section. The condensing section is fixed to and thermally connects with the top surface of the heat sink. The LED is directly mounted on the evaporating section with a light emitting surface thereof facing outwardly.

Abstract translation: LED灯包括散热器，热管和LED。 散热器包括连接芯和围绕连接芯安装的散热片。 每个翅片包括板状主体和从主体的周边垂直延伸的凸缘。 翅片的凸缘协同地形成散热器的环形平面顶表面。 热管包括冷凝部，与冷凝部平行且高于冷凝部的蒸发部，以及连接在冷凝部和蒸发部之间的绝热部。 冷凝部分与散热片的顶面固定并热连接。 LED直接安装在蒸发部分上，其发光表面面向外。