Silicon-alloy based barrier layers for integrated circuit metal interconnects
    31.
    发明授权
    Silicon-alloy based barrier layers for integrated circuit metal interconnects 失效
    用于集成电路金属互连的硅基合金阻挡层

    公开(公告)号:US07687911B2

    公开(公告)日:2010-03-30

    申请号:US11517736

    申请日:2006-09-07

    IPC分类号: H01L21/48

    摘要: A method for forming a silicon alloy based barrier layer comprises providing a substrate having a dielectric layer including a trench, placing the substrate in a reactor, and carrying out a process cycle, wherein the process cycle comprises introducing a silicon containing precursor into the reactor, introducing a metal containing precursor into the reactor, and introducing a co-reactant into the reactor, wherein the silicon, metal, and co-reactant react to form a silicon alloy layer that is conformally deposited on a bottom and a sidewall of the trench.

    摘要翻译: 一种用于形成基于硅合金的阻挡层的方法包括提供具有包括沟槽的介电层的衬底,将衬底放置在反应器中并执行工艺循环,其中工艺循环包括将含硅前体引入反应器中, 将含金属的前体引入反应器中,并将共反应物引入反应器中,其中硅,金属和共反应物反应以形成共形沉积在沟槽的底部和侧壁上的硅合金层。

    Noble metal barrier layers
    32.
    发明申请
    Noble metal barrier layers 有权
    贵金属阻隔层

    公开(公告)号:US20070205510A1

    公开(公告)日:2007-09-06

    申请号:US11540386

    申请日:2006-09-28

    IPC分类号: C23C28/00

    摘要: Noble metal barrier layers are disclosed. In one aspect, an apparatus may include a substrate, a dielectric layer over the substrate, and an interconnect structure within the dielectric layer. The interconnect structure may have a bulk metal and a barrier layer. The barrier layer may be disposed between the bulk metal and the dielectric layer. The barrier layer may include one or more metals selected from iridium, platinum, palladium, rhodium, osmium, gold, silver, rhenium, ruthenium, tungsten, and nickel.

    摘要翻译: 公开了贵金属阻挡层。 在一个方面,一种装置可以包括衬底,在衬底上的电介质层,以及电介质层内的互连结构。 互连结构可以具有体金属和阻挡层。 阻挡层可以设置在本体金属和电介质层之间。 阻挡层可以包括选自铱,铂,钯,铑,锇,金,银,铼,钌,钨和镍中的一种或多种金属。

    ORGANOMETALLIC COMPOUNDS, PROCESSES FOR THE PREPARATION THEREOF AND METHODS OF USE THEREOF
    33.
    发明申请
    ORGANOMETALLIC COMPOUNDS, PROCESSES FOR THE PREPARATION THEREOF AND METHODS OF USE THEREOF 审中-公开
    有机化合物,其制备方法及其使用方法

    公开(公告)号:US20090209777A1

    公开(公告)日:2009-08-20

    申请号:US12352256

    申请日:2009-01-12

    IPC分类号: C07F17/02

    摘要: This invention relates to organometallic compounds having the formula (L1)M(L2)y wherein M is a metal or metalloid, L1 is a substituted or unsubstituted anionic 6 electron donor ligand, L2 is the same or different and is (i) a substituted or unsubstituted anionic 2 electron donor ligand, (ii) a substituted or unsubstituted anionic 4 electron donor ligand, (iii) a substituted or unsubstituted neutral 2 electron donor ligand, or (iv) a substituted or unsubstituted anionic 4 electron donor ligand with a pendant neutral 2 electron donor moiety; and y is an integer of from 1 to 3; and wherein the sum of the oxidation number of M and the electric charges of L1 and L2 is equal to 0; a process for producing the organometallic compounds, and a method for producing a film or coating from the organometallic compounds. The organometallic compounds are useful in semiconductor applications as chemical vapor or atomic layer deposition precursors for film depositions.

    摘要翻译: 本发明涉及具有式(L1)M(L2)y的有机金属化合物,其中M是金属或准金属,L1是取代或未取代的阴离子6电子供体配体,L2相同或不同,为(i)取代的 或未取代的阴离子2电子供体配体,(ii)取代或未取代的阴离子4电子供体配体,(iii)取代或未取代的中性2电子供体配体,或(iv)取代或未取代的具有侧基的阴离子4电子给体配体 中性2电子供体部分; y为1〜3的整数, 并且其中M的氧化数和L1和L2的电荷之和等于0; 一种生产有机金属化合物的方法,以及由有机金属化合物制备薄膜或涂层的方法。 有机金属化合物可用作半导体应用,作为用于膜沉积的化学蒸气或原子层沉积前体。

    Noble metal barrier layers
    35.
    发明授权
    Noble metal barrier layers 有权
    贵金属阻隔层

    公开(公告)号:US08222746B2

    公开(公告)日:2012-07-17

    申请号:US11540386

    申请日:2006-09-28

    IPC分类号: H01L23/48

    摘要: Noble metal barrier layers are disclosed. In one aspect, an apparatus may include a substrate, a dielectric layer over the substrate, and an interconnect structure within the dielectric layer. The interconnect structure may have a bulk metal and a barrier layer. The barrier layer may be disposed between the bulk metal and the dielectric layer. The barrier layer may include one or more metals selected from iridium, platinum, palladium, rhodium, osmium, gold, silver, rhenium, ruthenium, tungsten, and nickel.

    摘要翻译: 公开了贵金属阻挡层。 在一个方面,一种装置可以包括衬底,在衬底上的电介质层,以及电介质层内的互连结构。 互连结构可以具有体金属和阻挡层。 阻挡层可以设置在本体金属和电介质层之间。 阻挡层可以包括选自铱,铂,钯,铑,锇,金,银,铼,钌,钨和镍中的一种或多种金属。

    MAGNETIC INSULATOR NANOLAMINATE DEVICE FOR INTEGRATED SILICON VOLTAGE REGULATORS
    36.
    发明申请
    MAGNETIC INSULATOR NANOLAMINATE DEVICE FOR INTEGRATED SILICON VOLTAGE REGULATORS 审中-公开
    用于集成硅电压调节器的磁选绝缘体纳米酸盐器件

    公开(公告)号:US20100098960A1

    公开(公告)日:2010-04-22

    申请号:US11764539

    申请日:2007-06-18

    IPC分类号: B32B15/04 B05D5/12

    摘要: A magnetic insulator nanolaminate device comprises a metal magnetic layer formed on a substrate, an insulating layer formed on the metal magnetic layer, wherein the insulating layer is formed by nitriding a portion of the metal magnetic layer, a chelating group layer formed on the insulating layer, and a metal seed layer bonded to the chelating group layer. The magnetic insulator nanolaminate device may be formed by depositing a metal layer on a substrate, converting a portion of the metal layer into an insulating layer using a nitridation process, and depositing a metal seed layer onto the insulating layer using a metal immobilization process, wherein the metal seed layer enables the deposition of a metal layer onto the insulating layer.

    摘要翻译: 一种磁性绝缘体纳米材料装置,其特征在于,在基板上形成有金属磁性层,形成在所述金属磁性层上的绝缘层,所述绝缘层通过对所述金属磁性层的一部分进行氮化而形成,所述绝缘层形成在所述绝缘层上 和与螯合基团层结合的金属种子层。 可以通过在基板上沉积金属层,使用氮化工艺将金属层的一部分转换为绝缘层,并使用金属固定工艺将金属种子层沉积到绝缘层上来形成磁性绝缘体纳米材料器件,其中 金属种子层能够将金属层沉积到绝缘层上。

    Plasma enhanced ALD process for copper alloy seed layers
    37.
    发明申请
    Plasma enhanced ALD process for copper alloy seed layers 审中-公开
    铜合金种子层的等离子体增强ALD工艺

    公开(公告)号:US20080223287A1

    公开(公告)日:2008-09-18

    申请号:US11724361

    申请日:2007-03-15

    IPC分类号: C30B23/00

    摘要: A method of forming a copper alloy seed layer comprises providing a substrate in a reactor, performing a first ALD process to fabricate an alloy metal layer on the substrate, wherein the first ALD process uses an alloy metal precursor selected from a group of specific alloy metal precursors, performing a second ALD process to fabricate a copper metal layer on the alloy metal layer, wherein the second ALD process uses a copper metal precursor selected from a group of specific copper metal precursors, and annealing the alloy metal layer and the copper metal layer to form a graded Cu-alloy layer.

    摘要翻译: 一种形成铜合金种子层的方法包括在反应器中提供基底,执行第一ALD工艺以在基底上制造合金金属层,其中第一ALD工艺使用选自特定合金金属的合金金属前体 前体,执行第二ALD工艺以在合金金属层上制造铜金属层,其中第二ALD工艺使用选自特定铜金属前体的铜金属前体,并退火合金金属层和铜金属层 以形成渐变的Cu合金层。

    Silicon-alloy based barrier layers for integrated circuit metal interconnects
    38.
    发明申请
    Silicon-alloy based barrier layers for integrated circuit metal interconnects 失效
    用于集成电路金属互连的硅基合金阻挡层

    公开(公告)号:US20080064205A1

    公开(公告)日:2008-03-13

    申请号:US11517736

    申请日:2006-09-07

    IPC分类号: H01L21/44

    摘要: A method for forming a silicon alloy based barrier layer comprises providing a substrate having a dielectric layer including a trench, placing the substrate in a reactor, and carrying out a process cycle, wherein the process cycle comprises introducing a silicon containing precursor into the reactor, introducing a metal containing precursor into the reactor, and introducing a co-reactant into the reactor, wherein the silicon, metal, and co-reactant react to form a silicon alloy layer that is conformally deposited on a bottom and a sidewall of the trench.

    摘要翻译: 一种用于形成基于硅合金的阻挡层的方法包括提供具有包括沟槽的介电层的衬底,将衬底放置在反应器中并执行工艺循环,其中工艺循环包括将含硅前体引入反应器中, 将含金属的前体引入反应器中,并将共反应物引入反应器中,其中硅,金属和共反应物反应以形成共形沉积在沟槽的底部和侧壁上的硅合金层。

    NANO-ENCAPSULATED MAGNETIC PARTICLE COMPOSITE LAYERS FOR INTEGRATED SILICON VOLTAGE REGULATORS
    39.
    发明申请
    NANO-ENCAPSULATED MAGNETIC PARTICLE COMPOSITE LAYERS FOR INTEGRATED SILICON VOLTAGE REGULATORS 审中-公开
    用于集成硅电压稳压器的纳米封装磁性复合层

    公开(公告)号:US20100283570A1

    公开(公告)日:2010-11-11

    申请号:US11940142

    申请日:2007-11-14

    IPC分类号: H01F5/00 H05K3/00

    摘要: A method of forming an integrated silicon voltage regulator (ISVR) comprises providing a nano-encapsulated magnetic particle (NEMP) suspension, depositing a first layer of the NEMP suspension on an integrated circuit (IC) device, curing the first layer of the NEMP suspension to form a first NEMP composite layer, forming at least one inductor wire on the NEMP composite layer, depositing an interlayer dielectric material over the inductor wire, depositing a second layer of the NEMP suspension on the interlayer dielectric material, and curing the second layer of the NEMP suspension to form a second NEMP composite layer.

    摘要翻译: 形成集成硅电压调节器(ISVR)的方法包括提供纳米封装磁性颗粒(NEMP)悬浮液,在集成电路(IC)装置上沉积NEMP悬浮液的第一层,固化NEMP悬浮液的第一层 以形成第一NEMP复合层,在NEMP复合层上形成至少一个电感器线,在电感线上沉积层间电介质材料,在层间绝缘材料上沉积第二层NEMP悬浮液,并固化第二层 NEMP悬浮液形成第二个NEMP复合层。

    Liquid phase molecular self-assembly for barrier deposition and structures formed thereby
    40.
    发明申请
    Liquid phase molecular self-assembly for barrier deposition and structures formed thereby 有权
    用于阻挡层沉积的液相分子自组装和由此形成的结构

    公开(公告)号:US20090315181A1

    公开(公告)日:2009-12-24

    申请号:US12215073

    申请日:2008-06-24

    申请人: Adrien R. Lavoie

    发明人: Adrien R. Lavoie

    IPC分类号: H01L23/52 B05D3/00

    摘要: Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise dissolving a metal precursor in a non-aqueous solvent in a bath; placing a substrate comprising an interconnect opening in the bath, wherein the metal precursor forms a monolayer within the interconnect opening; and placing the substrate in a coreactant mixture, wherein the coreactant reacts with the metal precursor to form a thin barrier monolayer.

    摘要翻译: 描述了形成微电子结构的方法和相关结构。 这些方法可以包括将金属前体溶解在非水溶剂中的浴中; 将包括互连开口的基底放置在所述浴中,其中所述金属前体在所述互连开口内形成单层; 并将所述底物置于共反应混合物中,其中所述共反应物与所述金属前体反应以形成薄的屏障单层。