公开(公告)号：US20190108861A1

公开(公告)日：2019-04-11

申请号：US15725912

申请日：2017-10-05

Applicant: Advanced Micro Devices, Inc.

Inventor： Benjamin Tsien ,  Alexander J. Branover ,  Alan Dodson Smith ,  Chintan S. Patel

IPC: G11C5/06 ,  G11C5/02 ,  G11C5/14

Abstract: Systems, apparatuses, and methods for implementing dynamic control of a multi-region fabric are disclosed. A system includes at least one or more processing units, one or more memory devices, and a communication fabric coupled to the processing unit(s) and memory device(s). The system partitions the fabric into multiple regions based on different traffic types and/or periodicities of the clients connected to the regions. For example, the system partitions the fabric into a stutter region for predictable, periodic clients and a non-stutter region for unpredictable, non-periodic clients. The system power-gates the entirety of the fabric in response to detecting a low activity condition. After power-gating the entirety of the fabric, the system periodically wakes up one or more stutter regions while keeping the other non-stutter regions in power-gated mode. Each stutter region monitors stutter client(s) for activity and processes any requests before going back into power-gated mode.

公开(公告)号：US20180115495A1

公开(公告)日：2018-04-26

申请号：US15298552

申请日：2016-10-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander J. Branover ,  Benjamin Tsien

IPC: H04L12/911 ,  H04L29/06

CPC classification number: G06F1/3234 ,  G06F1/325 ,  G06F1/3275 ,  H04L47/50

Abstract: The described embodiments include a computing device with a plurality of clients and a shared resource for processing job items. During operation, a given client of the plurality of clients stores first job items in a queue for the given client. When the queue for the given client meets one or more conditions, the given client notifies one or more other clients that the given client is to process job items using the shared resource. The given client then processes the first job items from the queue using the shared resource. Based on being notified, at least one other client that has second job items to be processed using the shared resource, processes the second job items using the shared resource. The given client can transition the shared resource between power states to enable the processing of job items.

公开(公告)号：US20250037750A1

公开(公告)日：2025-01-30

申请号：US18783900

申请日：2024-07-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Indrani Paul ,  Benjamin Tsien ,  James R. Magro

IPC: G11C11/4074 ,  G11C5/14 ,  G11C11/406

Abstract: The disclosed systems and methods include a control circuit for entering a low power state of a memory by preserving a context of the memory's controller and power gating the memory's physical layer. The context can be saved to a non-volatile memory device or by keeping a retention supply voltage to a register of the memory controller. Various other methods, systems, and computer-readable media are also disclosed.

公开(公告)号：US12093181B2

公开(公告)日：2024-09-17

申请号：US17852296

申请日：2022-06-28

Applicant: Advanced Micro Devices, Inc.

Inventor： Chintan S. Patel ,  Alexander J. Branover ,  Benjamin Tsien ,  Edgar Munoz ,  Vydhyanathan Kalyanasundharam

IPC: G06F12/08 ,  G06F12/0811 ,  G06F12/0864 ,  G06F12/0871

CPC classification number: G06F12/0871 ,  G06F12/0811 ,  G06F12/0864

Abstract: A technique for operating a cache is disclosed. The technique includes based on a workload change, identifying a first allocation permissions policy; operating the cache according to the first allocation permissions policy; based on set sampling, identifying a second allocation permissions policy; and operating the cache according to the second allocation permissions policy.

公开(公告)号：US20240004721A1

公开(公告)日：2024-01-04

申请号：US17853294

申请日：2022-06-29

Applicant: Advanced Micro Devices, Inc.

Inventor： Indrani Paul ,  Alexander J. Branover ,  Benjamin Tsien ,  Elliot H. Mednick

IPC: G06F9/50

CPC classification number: G06F9/5083 ,  G06F9/5038 ,  G06F9/5033 ,  G06F9/5016

Abstract: An apparatus and method for efficiently performing power management for a multi-client computing system. In various implementations, a computing system includes multiple clients that process tasks corresponding to applications. The clients store generated requests of a particular type while processing tasks. A client receives an indication specifying that another client is having requests of the particular type being serviced. In response to receiving this indication, the client inserts a first urgency level in one or more stored requests of the particular type prior to sending the requests for servicing. When the client determines a particular time interval has elapsed, the client sends an indication to other clients specifying that requests of the particular type are being serviced. The client also inserts a second urgency level different from the first urgency level in one or more stored requests of the particular type prior to sending the requests for servicing.

公开(公告)号：US20230350484A1

公开(公告)日：2023-11-02

申请号：US18304849

申请日：2023-04-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Mihir Shaileshbhai Doctor ,  Alexander J. Branover ,  Benjamin Tsien ,  Indrani Paul ,  Christopher T. Weaver ,  Thomas J. Gibney ,  Stephen V. Kosonocky ,  John P. Petry

IPC: G06F1/3287 ,  G06F1/3296 ,  G06F1/3234

CPC classification number: G06F1/3287 ,  G06F1/3296 ,  G06F1/3278 ,  G06F1/3265

Abstract: A processing device and method for efficient transitioning to and from a reduced power state is provided. The processing device comprises a plurality of components having assigned registers used to store data to execute a program and a power management controller, in communication with the plurality of components. The power management controller receives an indication that the plurality of components are idle, executes a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request from the power management controller to remove power to the component, and executes a process to exit the component from the reduced power state in response to the component being active.

公开(公告)号：US20230280819A1

公开(公告)日：2023-09-07

申请号：US18316865

申请日：2023-05-12

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Alexander J. Branover ,  Christopher T. Weaver ,  Benjamin Tsien ,  Indrani Paul ,  Mihir Shaileshbhai Doctor ,  Thomas J. Gibney ,  John P. Petry ,  Dennis Au ,  Oswin Hall

IPC: G06F1/3234 ,  G06F1/3209

CPC classification number: G06F1/3265 ,  G06F1/3209 ,  G06F1/3275

Abstract: A method and system for operating in a single display mode operation and a dual pipe mode of operation is disclosed. The method and system includes operating in a dual pipe mode of operation in which each display pipe transmits data from a respective buffer to an associated display. The method and system further includes operating in a single display mode of operation in which one display pipe transmits data from a plurality of buffers to an associated display.

公开(公告)号：US20230205297A1

公开(公告)日：2023-06-29

申请号：US17562854

申请日：2021-12-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander J. Branover ,  Thomas J. Gibney ,  Stephen V. Kosonocky ,  Mihir Shaileshbhai Doctor ,  John P. Petry ,  Indrani Paul ,  Benjamin Tsien ,  Christopher T. Weaver

IPC: G06F1/3206

CPC classification number: G06F1/3206

Abstract: A method and apparatus for managing power states in a computer system includes, responsive to an event received by a processor, powering up a first circuitry. Responsive to the event not being serviceable by the first circuitry, powering up at least a second circuitry of the computer system to service the event.

公开(公告)号：US20230195644A1

公开(公告)日：2023-06-22

申请号：US17556617

申请日：2021-12-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Benjamin Tsien ,  Chintan S. Patel ,  Guhan Krishnan ,  Andrew William Lueck ,  Sreenath Thangarajan

IPC: G06F12/0897

CPC classification number: G06F12/0897 ,  G06F2212/60

Abstract: A data processor includes a data fabric, a memory controller, a last level cache, and a traffic monitor. The data fabric is for routing requests between a plurality of requestors and a plurality of responders. The memory controller is for accessing a volatile memory. The last level cache is coupled between the memory controller and the data fabric. The traffic monitor is coupled to the last level cache and operable to monitor traffic between the last level cache and the memory controller, and based on detecting an idle condition in the monitored traffic, to cause the memory controller to command the volatile memory to enter self-refresh mode while the last level cache maintains an operational power state and responds to cache hits over the data fabric.

公开(公告)号：US11662798B2

公开(公告)日：2023-05-30

申请号：US17390479

申请日：2021-07-30

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Alexander J. Branover ,  Christopher T. Weaver ,  Benjamin Tsien ,  Indrani Paul ,  Mihir Shaileshbhai Doctor ,  Thomas J. Gibney ,  John P. Petry ,  Dennis Au ,  Oswin Hall

IPC: G06F1/32 ,  G06F1/3234 ,  G06F1/3209

CPC classification number: G06F1/3265 ,  G06F1/3209 ,  G06F1/3275

Abstract: A disclosed technique includes transmitting data in a first buffer associated with a first display pipe to a first display associated with the first display pipe; transmitting data in a second buffer associated with a second display pipe to the first display; requesting wake-up of a memory; and refilling one or both of the first buffer and the second buffer from the memory.