公开(公告)号：US06664521B1

公开(公告)日：2003-12-16

申请号：US10111198

申请日：2002-08-07

申请人： Shinji Kondo ,  Youji Uetani ,  Yoshiki Hama ,  Jun Iguchi ,  Harumi Tasaki ,  Atsushi Fujisawa ,  Sadatsugu Higashide

发明人： Shinji Kondo ,  Youji Uetani ,  Yoshiki Hama ,  Jun Iguchi ,  Harumi Tasaki ,  Atsushi Fujisawa ,  Sadatsugu Higashide

IPC分类号： H05B610

CPC分类号： E01B7/24

摘要： A thawing device for railway track points is constituted by connecting a heating coil (1a) wound around a floor plate (2) for heating the floor plate (2) by induction to an inverter device (5) for supplying high-frequency current to the heating coil (1a), via a connection cable (4); and providing a protection against magnetism (9, 10a-10c, 11a-11c , 12a, 12b) about the periphery of the heating coil (1a) and the connection cable (4).

摘要翻译： 用于铁路轨道点的解冻装置通过将缠绕在用于将地板（2）加热的地板（2）的加热线圈（1a）通过感应连接到用于向高压电流供应高频电流的逆变器装置（5） 加热线圈（1a），经由连接电缆（4）; 并且提供围绕加热线圈（1a）的周边和连接电缆（4）的防磁（9,10a-10c，11a-11c，12a，12b）的保护。

公开(公告)号：US06551862B2

公开(公告)日：2003-04-22

申请号：US09978724

申请日：2001-10-18

申请人： Riyouichi Oota ,  Tsugihiko Hirano ,  Atsushi Fujisawa ,  Takafumi Konno

发明人： Riyouichi Oota ,  Tsugihiko Hirano ,  Atsushi Fujisawa ,  Takafumi Konno

IPC分类号： H01L2150

CPC分类号： H01L21/6836 ,  H01L21/565 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/564 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is disclosed, comprising a tape substrate which supports a semiconductor chip, an insulating adhesive layer disposed between the semiconductor chip and the tape substrate, an insulating sheet member laminated to the insulating adhesive layer and formed harder than the insulating adhesive layer, wires for connecting pads on the semiconductor chip with connecting terminals on the tape substrate, a sealing portion formed by sealing the semiconductor chip with resin, and plural solder balls provided on a back of the tape substrate. A die bonding layer for fixing the semiconductor chip thereto is composed of an insulating adhesive layer and the insulating sheet member laminated thereto. The die bonding layer is formed thick by such a multi-layer structure, whereby the resin balance of the surface and back of the semiconductor chip is improved to prevent warping of a package and improve the mounting temperature cyclicity and reflow characteristic.

公开(公告)号：US06265762B1

公开(公告)日：2001-07-24

申请号：US08820228

申请日：1997-03-18

申请人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

发明人： Shigeki Tanaka ,  Atsushi Fujisawa ,  Souichi Nagano ,  Tsugihiko Hirano ,  Ryouichi Oota ,  Takafumi Konno ,  Kenichi Tatebe ,  Toshiaki Okamoto

IPC分类号： H01L23495

CPC分类号： H01L24/06 ,  H01L23/4334 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06179 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/49179 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399

摘要： There is provided a semiconductor chip mounting area for mounting a semiconductor chip, and the points of the inner leads are made to come closer to the semiconductor chip mounting area by arranging the points of the inner leads at equal intervals over the whole periphery of the semiconductor chip mounting area. The points of the inner leads are arranged along the whole periphery of the semiconductor chip mounting area, and the lead pitch at the points of the inner leads corresponding to a corner portion of the semiconductor chip mounting area is made wider than the lead pitch of the other inner lead points.

摘要翻译： 提供了用于安装半导体芯片的半导体芯片安装区域，并且通过在半导体的整个周边上以等间隔排列内部引线的点，使内部引线的点靠近半导体芯片安装区域 芯片安装面积。 内引线的点沿着半导体芯片安装区域的整个周边布置，并且与半导体芯片安装区域的角部相对应的内引线的引线间距比引线间距 其他内部引导点。