公开(公告)号：US20210305285A1

公开(公告)日：2021-09-30

申请号：US16336633

申请日：2018-06-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Yongda MA

IPC: H01L27/12

Abstract: An array substrate, a display panel and a display device are disclosed. The array substrate includes a display region and a non-display region around the display region, and further includes: a first leading wire extending from the non-display region to the display region and a second leading wire extending from the non-display region to the display region. The first leading wire is between a first signal line and a first fan-out line and electrically connects the first signal line and the first fan-out line, and the second leading wire is between a second signal line and a second fan-out line and electrically connects the second signal line and the second fan-out line. The first leading wire and the second leading wire are in different layers.

公开(公告)号：US20210278731A1

公开(公告)日：2021-09-09

申请号：US16329396

申请日：2018-03-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Chunping LONG ,  Jian XU ,  Hui LI ,  Yongda MA

IPC: G02F1/1362 ,  G02F1/1368

Abstract: The disclosure discloses a display substrate, a display panel, and a display device. The display substrate includes a plurality of pixel units, each pixel unit includes a first sub-pixel region, a second sub-pixel region, slit electrodes and two thin film transistors, the slit electrodes include a first slit electrode and a second slit electrode corresponding respectively to the first sub-pixel region and the second sub-pixel region, where each of the first slit electrode and the second slit electrode includes at least one slit group, each slit group includes a plurality of slits arranged in a same direction, a slit extension direction and a direction of a formed electric field of one slit group of the first slit electrode are different from a slit extension direction and a direction of a formed electric field of at least one of the at least one slit group of the second slit electrode, respectively.

公开(公告)号：US20210175223A1

公开(公告)日：2021-06-10

申请号：US17255978

申请日：2020-06-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Hui LI

IPC: H01L27/02 ,  H01L27/12

Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes a plurality of conductive lines and an electrostatic protection circuit on a base substrate. At least some of the conductive lines are connected through the electrostatic protection circuit. Two conductive lines connected with the electrostatic protection circuit are respectively a first conductive line and a second conductive line. The electrostatic protection circuit includes a first transistor, a second transistor, and a first capacitor. A first electrode of the first transistor, a first electrode of the second transistor and a gate electrode of the second transistor are connected to the second conductive line, and a second electrode of the first transistor, a second electrode of the second transistor and a gate electrode of the first transistor are connected to the first conductive line.

公开(公告)号：US20210055831A1

公开(公告)日：2021-02-25

申请号：US16966824

申请日：2019-12-09

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG

IPC: G06F3/044 ,  G06F3/041 ,  H01L27/12

Abstract: An array substrate, an embedded touch screen, and a display device. The array substrate comprises a base substrate, a touch electrode line located above the base substrate, a touch electrode located above the touch electrode line, and a first insulating layer located between the touch electrode line and the touch electrode. The touch electrode line has a groove portion, the first insulating layer has a via hole, and a connecting portion of the touch electrode extends into the groove portion through the via hole, so as to be electrically connected to the touch electrode line.

公开(公告)号：US20210005726A1

公开(公告)日：2021-01-07

申请号：US16863253

申请日：2020-04-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Chunping LONG ,  Hui LI

IPC: H01L29/417 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  G09G3/3266

Abstract: The present disclosure provides a thin film transistor, a display panel and a method for manufacturing the thin film transistor. The thin film transistor includes an active layer and a source-drain electrode layer, the source-drain electrode layer includes a first electrode having at least one first electrode strip and a second electrode having at least one second electrode strip, the at least one first electrode strip and the at least one second electrode strip are alternately arranged at intervals, and at least an insulating part of a layer where the active layer is located is provided with an insulating material, and the insulating part is located at an orthographic projection of at least a part of a region between a free end of the first electrode strip, which is proximal to the second electrode, and the second electrode, on the layer where the active layer is located.

公开(公告)号：US20210003871A1

公开(公告)日：2021-01-07

申请号：US16803029

申请日：2020-02-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Hui LI

IPC: G02F1/1339 ,  G06F1/16

Abstract: The present disclosure relates to an array substrate comprising a substrate body provided, on a perimeter edge thereof, with a sealant coating region to be coated with a sealant, and the sealant coating region comprises a first region provided with a metal trace structure, and further comprises a region provided with a metal structure, a difference between an area of the metal structure and that of the metal trace structure being smaller than a threshold.

公开(公告)号：US20200335570A1

公开(公告)日：2020-10-22

申请号：US16612925

申请日：2019-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG

IPC: H01L27/32 ,  H01L51/52

Abstract: The present disclosure discloses a display substrate and a display device. The package structure of the display component includes: a base substrate, a display component arranged on a surface of the base substrate, and a package layer covering the display component, in which the display component includes a display area and a peripheral area surrounding the display area, and the peripheral area is provided with a signal line pattern having an inclined side along a direction perpendicular to an extending direction of the signal line pattern with a slope angle of less than 90 degrees.

公开(公告)号：US20180108757A1

公开(公告)日：2018-04-19

申请号：US15116980

申请日：2015-10-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaolong LI ,  Zheng LIU ,  Xiaoyong LU ,  Dong LI ,  Chunping LONG

IPC: H01L29/66 ,  H01L21/20 ,  H01L27/12 ,  H01L21/265 ,  H01L29/06 ,  H01L21/28

Abstract: A manufacturing method for a polysilicon thin film is provided. The manufacturing method for a polysilicon thin film includes forming a polysilicon layer, treating a surface of the polysilicon layer so that the surface of the polysilicon layer is electronegative, and supplying polar gas into a process chamber so that polar molecules of the polar gas are adsorbed on the surface of the polysilicon layer which is electronegative so as to form the polysilicon thin film, a surface of which has a hole density higher than an electron density.

公开(公告)号：US20170162703A1

公开(公告)日：2017-06-08

申请号：US15322490

申请日：2016-03-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaolong LI ,  Zheng LIU ,  Xiaoyong LU ,  Chunping LONG ,  Huijuan ZHANG

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L21/04 ,  H01L29/04 ,  H01L29/16

CPC classification number: H01L29/78609 ,  H01L21/02527 ,  H01L21/02598 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/043 ,  H01L29/045 ,  H01L29/1602 ,  H01L29/66045 ,  H01L29/66742 ,  H01L29/78621 ,  H01L29/78684 ,  H01L29/78696

Abstract: The embodiments of present disclosure provide a thin film transistor, a method for manufacturing the same, and an array substrate. The thin film transistor comprises an active layer provided on a substrate, the active layer including a middle channel region, a first high resistance region and a second high resistance region provided respectively on external sides of the middle channel region, a source region provided on an external side of the first high resistance region and a drain region provided on an external side of the second high resistance region, wherein a base material of the active layer is diamond single crystal. According to the thin film transistor, the method for manufacturing the same, and the array substrate provided in the embodiments of present disclosure, by providing high resistance regions on external sides of the middle channel region of the active layer, the carrier mobility is reduced and the leakage current of the thin film transistor made of single crystalline diamond is effectively suppressed.

公开(公告)号：US20160293090A1

公开(公告)日：2016-10-06

申请号：US14778039

申请日：2015-03-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Ying WANG

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/2092 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2300/0417 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

Abstract: GOA driving unit includes an input end, a starting module, a control module, an output module and a gate driving signal output end. The starting module is configured to, within a starting time period, input a triggering signal from the input end into the control module under the control of a first clock signal. The control module is configured to, within an output time period, output a second clock signal to the output module. The output module is configured to output a first level to the gate driving signal output end within the starting time period, output the second clock signal to the gate driving signal output end within the output time period, and output the first level to the gate driving signal output end within a maintenance time period. The first clock signal is of a phase reverse to the second clock signal.

Abstract translation: GOA驱动单元包括输入端，起动模块，控制模块，输出模块和门驱动信号输出端。 启动模块被配置为在起始时间段内，在第一时钟信号的控制下，将来自输入端的触发信号输入到控制模块中。 控制模块被配置为在输出时间段内向输出模块输出第二时钟信号。 输出模块被配置为在开始时间周期内向门驱动信号输出端输出第一电平，在输出时间周期内将第二时钟信号输出到门驱动信号输出端，并将第一电平输出到门驱动 信号输出端在维护期内。 第一时钟信号是与第二时钟信号相反的相位。