Abstract:
An array substrate includes a display region (12), a bonding region (13), and a planarization layer (14), and a thickness of at least a portion of the pattern of the planarization layer (14) provided in the display region (12) is larger than a thickness of the pattern of the planarization layer (14) provided in the bonding region (13). In the array substrate, the upper surface of the display region is higher than the upper surface of the bonding region of the array substrate, thus, it is possible to reduce or avoid the phenomenon of bad bonding in the bonding region. A display device is further provided.
Abstract:
Disclosed are an array substrate and a display device, which can achieve protection of a signal line against static electricity and meanwhile decrease a load on the signal line, so as to improve product yield. The array substrate includes a first signal line, a second signal line and an electrostatic protection device; wherein the electrostatic protection device includes a suspension Thin Film Transistor (TFT), a source electrode of the suspension TFT is connected with the first signal line, a gate electrode of the suspension TFT is connected with the second signal line, and a drain electrode of the suspension TFT is suspended; and wherein the drain electrode and the gate electrode have an overlapping region. The display device includes the above-mentioned array substrate.
Abstract:
A gas purge valve comprising a housing formed with a fluid inlet and a fluid outlet, said fluid outlet bounded by a kinetic valve seating, and a sealing assembly comprising a float member coaxially displaceable within the housing, and a sealing cap coupled to said float member; the sealing cap being axially displaceable with respect to the float member between a first position in which it conjoins the float, and a second position in which it departs from the float; said sealing cap formed at an outside face thereof with a kinetic seal fitted for sealing engagement of the kinetic valve seating, and an automatic valve aperture formed in the sealing cap and bounded by an automatic valve seating; and an automatic sealing member articulated at an upper end of the float member for sealing engagement of the automatic valve seating.
Abstract:
The present invention discloses an array substrate and a display panel. The array substrate comprises a plurality of data lines and a plurality of gate lines which are provided to intersect each other. The data lines are provided in parallel and the gate lines are provided in parallel, and the data lines and the gate lines vertically intersect to divide the array substrate into a plurality of pixel units each having a pixel electrode provided therein. The pixel electrode comprises a sub-pixel electrode comprising a root portion and a branch portion group connected to the root portion, the branch portion group consisting of a plurality of branch portions, adjacent ones of which are separated by slits. The branch portion group partially overlaps the data lines and/or the gate lines.
Abstract:
A display housing and a display device are disclosed. The display housing includes a front frame and a rear cover. A first hook and a first slot are disposed on the front frame, and a second slot and a second hook are disposed on the rear cover. The front frame and the rear cover are configured to be fixedly connected by snapping the first hook into the second slot and snapping the first slot into the second hook. The display housing may resolve the problem of assembling efficiency being low due to threaded connection.
Abstract:
An organic light emitting diode (OLED) display device and a preparation method thereof, and a display apparatus are disclosed. The OLED display device includes: a thin layer transistor (22), a first electrode (23′), a second electrode (26′) and an organic functional layer (25) located between the first electrode (23′) and the second electrode (26′). The thin film transistor (22) comprises a gate electrode (221), a source electrode (222) and a drain electrode (223); and the first electrode (23′) is electrically connected with the drain electrode (223). The display device further comprises a first auxiliary electrode (27) formed from a topological insulator. The first auxiliary electrode (27) is electrically connected with the second electrode (26′) to provide electrical signals for the second electrode (26′). The OLED display avoids the problems of high IR drop and non-uniform lightness caused by the large transmission resistance of the cathodes.
Abstract:
A display device and an array substrate are disclosed. The display device includes a display panel and signal boards which supply signals to the display panel. At least a pair of signal boards that are connected with each other is electrically connected using a plug-in connection mode. A first plug-in structure is provided on a first signal board of each pair of signal boards connected in the plug-in connection mode, and a second plug-in structure corresponding to the first plug-in structure is provided on a second signal board of the pair of signal boards connected in the plug-in connection mode. Because at least a pair of signal boards that are connected with each other is electrically connected using a plug-in connection mode, a quantity of signal lines arranged between signal boards is reduced, which enables assembly and disassembly be more convenient.
Abstract:
An array substrate and a display panel. The array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.
Abstract:
Embodiments of the present disclosure provide a display panel and a display device. The display panel includes: a base substrate including a non-display area; a gate drive circuit located in the non-display area, where the gate drive circuit includes a plurality of shift registers, and the plurality of shift registers are divided into a plurality of register sets; and a plurality of signal lead-in lines located in the non-display area, where the plurality of signal lead-in lines are divided into a plurality of line sets, a frame start signal end of one register set is correspondingly and electrically connected to one line set, and two signal lead-in lines of one line set are provided with the signal lead-in line of another line set therebetween.
Abstract:
The present disclosure provides a compensation control method and a display device. The method includes in a standstill phase, controlling the display panel to stand still; after the standstill phase ends, sensing, by the timing controller, characteristic values of each row of the pixel circuits in the display panel in a time division manner by controlling the gate driver and the source driver; setting a black insertion time period between time periods for sensing characteristic values of different rows of pixel circuits, during the black insertion time period, controlling, by the timing controller, the gate driver and the source driver, to display a black picture on the display panel.