公开(公告)号：US20210151435A1

公开(公告)日：2021-05-20

申请号：US16642723

申请日：2019-03-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhi WANG ,  Feng GUAN ,  Guangcai YUAN ,  Chen XU ,  Lei CHEN

IPC: H01L27/092 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8238

Abstract: The disclosure relates to a CMOS structure and a manufacturing method thereof. The CMOS structure includes a substrate and an N-type TFT and a P-type TFT on the substrate. The N-type TFT includes a first gate electrode, a first active layer, and a first gate dielectric layer therebetween. The first active layer includes a first semiconductor layer, a second semiconductor layer of the N-type, and a third semiconductor layer of the N-type which are located at opposite ends of the first semiconductor layer and sequentially stacked in a direction away from the first gate dielectric layer. An N-type doping concentration of the second semiconductor layer is smaller than that of the third semiconductor layer. The P-type TFT includes a fifth semiconductor layer and a sixth semiconductor layer. A P-type doping concentration of the fifth semiconductor layer is smaller than that of the sixth semiconductor layer.

公开(公告)号：US20200294461A1

公开(公告)日：2020-09-17

申请号：US16475473

申请日：2019-01-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chen XU ,  Xueguang HAO ,  Yong QIAO ,  Xinyin WU

IPC: G09G3/36 ,  G11C19/28

Abstract: A shift register unit, a gate drive circuit and a display device are disclosed. The shift register unit includes an input circuit, an output circuit, a reset circuit, a control circuit and a reset stabilizing circuit. The input circuit is configured to write an input signal into a first node in response to an input start signal. The output circuit is configured to output a preparatory output signal to an output terminal under control of an electric level of the first node. The reset circuit is configured to reset the output terminal under control of an electric level of a second node. The control circuit is configured to apply a first voltage signal to the second node in response to a control signal. The reset stabilizing circuit is configured to apply a second voltage signal to the first node in response to a reset stabilizing signal.

公开(公告)号：US20250093714A1

公开(公告)日：2025-03-20

申请号：US18290791

申请日：2022-11-30

Applicant: BOE Technology Group Co., Ltd. ,  Hefei BOE Optoelectronics Technology Co., Ltd.

Inventor： Jie YANG ,  Yuansheng ZANG ,  Chen XU ,  Lingxiao HU ,  Hui GUO

IPC: G02F1/1362

Abstract: The present disclosure relates to a display panel and a display apparatus. The display panel includes an array substrate, a color filter substrate, a driving chip, and a backlight structure; where the driving chip is electrically connected to the array substrate and is configured to control a voltage signal on the array substrate, the driving chip is disposed at an inner side of the array substrate, and the color filter substrate is located between the array substrate and the backlight structure. In the above structure, the array substrate may be covered on the outer side of the color filter substrate and the driving chip, thereby achieving the protection of the structure at an inner side of the array substrate.

公开(公告)号：US20250089303A1

公开(公告)日：2025-03-13

申请号：US18292558

申请日：2022-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Guangcai YUAN ,  Ce NING ,  Hehe HU ,  Nianqi YAO ,  Dongfang WANG ,  Zhengliang LI ,  Liping LEI ,  Chen XU

IPC: H01L29/786 ,  G09G3/20 ,  G11C19/28 ,  H01L29/08

Abstract: A thin film transistor, a shift register unit, a gate driving circuit and a display panel are provided. The M source branches and the N drain branches extend along a first direction and are arranged at intervals; in each of the P source-drain units, the M source branches and the N drain branches are alternately arranged, and M is greater than or equal to N; a semiconductor layer includes sub-channel regions between one drain branch and one source branch adjacent to each other; a sum of widths of the sub-channel regions of the P source-drain units in the first direction is W, and an average length of the sub-channel regions of the P source-drain units in a direction perpendicular to the first direction is L; 12≤W/L≤400, P, M and N are integers greater than or equal to 1, and P×N≥4.

公开(公告)号：US20240386864A1

公开(公告)日：2024-11-21

申请号：US18788302

申请日：2024-07-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Guangcai YUAN ,  Ce NING ,  Hehe HU ,  Nianqi YAO ,  Xin XIE ,  Yifang HUANG ,  Liping LEI ,  Chen XU

IPC: G09G3/36

Abstract: A display substrate and a display panel are provided, the display substrate includes a first gate driver circuit and a second gate driver circuit that are respectively arranged on a first side and a second side of a display region opposite to each other; the first gate driver circuit includes a plurality of first shift register units arranged in a first direction, each first shift register unit includes a first thin film transistor including a first active layer, the first active layer includes a metal oxide semiconductor material; the second gate driver circuit includes a plurality of second shift register units arranged in the first direction, each second shift register unit includes a second thin film transistor having the same function as the first thin film transistor, and the second thin film transistor includes a second active layer, the second active layer includes a metal oxide semiconductor material.

公开(公告)号：US20240206243A1

公开(公告)日：2024-06-20

申请号：US18594819

申请日：2024-03-04

Applicant: Beijing BOE Technology Development Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Jianbo XIAN ,  Chen XU ,  Pan LI ,  Yong QIAO ,  Xinyin WU

IPC: H10K59/122 ,  G06F3/044 ,  H10K59/121 ,  H10K59/131 ,  H10K59/35 ,  H10K59/40

CPC classification number: H10K59/122 ,  G06F3/0446 ,  H10K59/1213 ,  H10K59/1216 ,  H10K59/131 ,  H10K59/353 ,  H10K59/40

Abstract: The disclosure provides a display panel and a display device. The display panel includes: a base substrate, a transistor array layer, a pixel defining layer, touch electrodes. The area of opening region of first color sub-pixel is smaller than that of opening region of third color sub-pixel, the area of opening region of second color sub-pixel is smaller than that of opening region of third color sub-pixel. An orthogonal projection of second capacitor in first color sub-pixel and an orthogonal projection of touch electrodes have a first auxiliary overlap area, an orthogonal projection of second capacitor in second color sub-pixel and orthogonal projection of the touch electrodes have a second auxiliary overlap area, an orthogonal projection of second capacitor in third color sub-pixel and orthogonal projection of touch electrodes have a third auxiliary overlap area. The first and/or second auxiliary overlap area is larger than the third auxiliary overlap area.

公开(公告)号：US20240023397A1

公开(公告)日：2024-01-18

申请号：US18467008

申请日：2023-09-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lang LIU ,  Jingquan WANG ,  Chen XU

IPC: H10K59/131 ,  G06F3/041 ,  H10K50/844 ,  H10K59/40 ,  H10K59/65 ,  H10K59/121 ,  H10K59/122 ,  H10K77/10

CPC classification number: H10K59/131 ,  G06F3/0412 ,  H10K50/844 ,  H10K59/40 ,  H10K59/65 ,  H10K59/121 ,  H10K59/122 ,  H10K77/111 ,  G06F3/0445

Abstract: A display panel and a display device are provided. The display panel includes a base substrate, a plurality of pixel drive circuit units, n first signal lines, a touch layer, and a light emitting element. A distance between first extending portions of two adjacent first signal lines is greater than a distance between first bending portions of the two adjacent first signal lines. An orthogonal projection overlap area between the first connecting portion and first extending portions of the n first signal lines is S1, and an orthogonal projection overlap area between the first connecting portion and first bending portions of the n first signal lines is S2. S1≥S2. A length of a first extending portion of at least one first signal line is L1, a distance between the first extending portion of at least one first signal line and the second electrode is H1, and H1≥(S1/n)/L1.

公开(公告)号：US20230180584A1

公开(公告)日：2023-06-08

申请号：US17436078

申请日：2021-06-08

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunyan LI ,  Chen XU ,  Jingquan WANG

IPC: H10K59/80 ,  H10K59/40 ,  H10K59/131 ,  G06F3/041 ,  G06F3/044

CPC classification number: H10K59/873 ,  H10K59/40 ,  H10K59/131 ,  G06F3/0412 ,  G06F3/0446 ,  G06F3/0443 ,  G06F3/04164 ,  G06F2203/04111 ,  G06F2203/04107 ,  G06F2203/04102

Abstract: A display panel is provided. The display panel has a display region and a peripheral region, the peripheral region includes a first peripheral region, a bending region, and a second peripheral region. The display panel includes a base substrate, a driving circuit layer, an organic structure, and an encapsulation layer; the organic structure includes a first organic structure and a second organic structure, the first organic structure is in the first peripheral region, and the second organic structure includes a first portion in the first peripheral region and a second portion in the bending region; the encapsulation layer partially overlaps with the second organic structure, a portion of the encapsulation layer which overlaps with the second organic structure includes a first encapsulation portion and a second encapsulation portion; an average thickness of the first encapsulation portion is greater than an average thickness of the second encapsulation portion.

公开(公告)号：US20230180563A1

公开(公告)日：2023-06-08

申请号：US17437142

申请日：2021-05-18

Applicant: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chen XU ,  Yong QIAO ,  Xinyin WU ,  Yongda MA

IPC: H10K59/179

CPC classification number: H10K59/1795 ,  H10K2102/311

Abstract: A display panel and a display device are provided. The display panel includes a base substrate and a conductive member, wherein the conductive member is located on the base substrate and includes a first conductive sub-layer, a second conductive sub-layer and a third conductive sub-layer stacked in sequence; the first conductive sub-layer is closer to the base substrate than the third conductive sub-layer; a conductivity of the first conductive sub-layer is smaller than that of the second conductive sub-layer, and a melting point of the third conductive sub-layer is larger than that of the second conductive sub-layer; the second conductive sub-layer includes a first surface close to the first conductive sub-layer and a second surface close to the third conductive sub-layer, the first surface and the second surface are oppositely arranged; the third conductive sub-layer protrudes from the second surface along a width direction of the conductive member

公开(公告)号：US20230180547A1

公开(公告)日：2023-06-08

申请号：US17416481

申请日：2020-12-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan XU ,  Li SUN ,  Dacheng ZHANG ,  Lang LIU ,  Chen XU ,  Yongqian LI

IPC: H10K59/131 ,  G02F1/1362

CPC classification number: H10K59/131 ,  G02F1/136286

Abstract: A display panel and a display device are provided, since a plurality of source ICs (01) are arranged, a large-sized display panel is driven, and since the plurality of source ICs (01) are scattered around a display area (A) along the tangential directions of the edge of the display area (A), that is, the source ICs (01) are distributed according to the shape of the display panel, a distance between the source ICs (01) and the display area (A) is shortened, and thus a narrow bezel design of the display panel is facilitated.