公开(公告)号：US20250098212A1

公开(公告)日：2025-03-20

申请号：US18963664

申请日：2024-11-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jie HUANG ,  Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Fengjuan LIU ,  Nianqi YAO ,  Kun ZHAO ,  Tianmin ZHOU ,  Jiushi WANG ,  Zhongpeng TIAN

IPC: H01L29/786 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/66

Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include at least one of indium, gallium and zinc. Praseodymium is doped into the channel layer. And, in the channel layer, a number density of praseodymium atoms in the channel layer gradually decreases with a distance from the first protection layer.

公开(公告)号：US20240355978A1

公开(公告)日：2024-10-24

申请号：US18254210

申请日：2022-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Zhongpeng TIAN ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Jiayu HE ,  Feifei LI ,  Kun ZHAO ,  Yimin CHEN

IPC: H01L33/62 ,  G02F1/13357 ,  H05K3/46

CPC classification number: H01L33/62 ,  G02F1/133603 ,  H05K3/4688

Abstract: A circuit board includes a substrate and a stress neutral layer disposed on a side of the substrate. The stress neutral layer includes one or more first metal layers and one or more second metal layers. The one or more second metal layers and the one or more first metal layers are stacked. At least one of the one or more first metal layers is made of a material for generating a tensile stress, and at least one of the one or more second metal layers is made of a material for generating a compressive stress.

公开(公告)号：US20240244747A1

公开(公告)日：2024-07-18

申请号：US17927576

申请日：2021-12-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Feifei LI ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jiayu HE ,  Jie HUANG ,  Kun ZHAO ,  Zhanfeng CAO ,  Ke WANG

IPC: H05K1/11 ,  H01L23/498 ,  H01L33/62 ,  H05K1/09 ,  H05K1/18

CPC classification number: H05K1/111 ,  H01L23/49838 ,  H01L33/62 ,  H05K1/09 ,  H05K1/181 ,  H05K2201/0338 ,  H05K2201/10106 ,  H05K2201/10151

Abstract: A wiring board includes a base substrate and first connection pads disposed on the base substrate. The first connection pads each include electrical connection layer(s); each electrical connection layer includes a main material layer and protective layer(s) disposed on a side of the main material layer away from the base substrate; the protective layer(s) include a first reference protective layer, which is a protective layer farthest away from the base substrate in the protective layer(s); and a material of the main material layer includes copper. The electrical connection layer(s) includes a first electrical connection layer, which is an electrical connection layer farthest away from the base substrate in the electrical connection layer(s); and in protective layer(s) in the first electrical connection layer, at least a material of the first reference protective layer is capable of forming a first intermetallic compound with a first solder.

公开(公告)号：US20240194686A1

公开(公告)日：2024-06-13

申请号：US17908652

申请日：2021-10-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Nianqi YAO ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Shuilang DONG ,  Lizhong WANG ,  Dapeng XUE ,  Jiayu HE ,  Jie HUANG ,  Lubin SHI ,  Liping LEI

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869

Abstract: Provided is a thin film transistor and a method for manufacturing thereof, a display panel, and a display device, which relates to the field of display technologies. The thin film transistor includes an active layer, source and drain electrodes, and an oxygen supplementation layer. As an orthogonal projection of the oxygen supplementation layer on the base substrate is at least partially overlapped with an orthogonal projection of a target portion of the active layer on the base substrate, oxygen introduced in forming the oxygen supplementation layer in the thin film transistor is capable of diffusing to the target portion of the active layer, such that a defect in the target portion of the active layer is reduced, and a property of the thin film transistor is greater.

公开(公告)号：US20240186330A1

公开(公告)日：2024-06-06

申请号：US17786177

申请日：2021-08-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO ,  Kun ZHAO ,  Feifei LI ,  Liping LEI ,  Qi QI

IPC: H01L27/12

CPC classification number: H01L27/124

Abstract: Embodiments of the present disclosure provide an array substrate and a display apparatus. The array substrate includes: a base substrate; a conductive layer located on the base substrate, where a material of the conductive layer includes copper; and an oxidization protective layer, located on a side, facing away from the base substrate, of the conductive layer, where a material of the oxidization protective layer includes tungsten.

公开(公告)号：US20230122965A1

公开(公告)日：2023-04-20

申请号：US17784398

申请日：2021-06-03

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO

IPC: H10K59/126 ,  H10K59/131 ,  H10K71/60 ,  H10K59/13 ,  H10K59/121 ,  H01L27/12

Abstract: A display substrate includes: a base substrate; a metal light-shielding layer disposed on the base substrate; a plurality of pixel units disposed on the base substrate; a plurality of first thin film transistors disposed on the metal light-shielding layer and configured to drive the pixel units; a plurality of photodiodes disposed on the metal light-shielding layer and configured to convert light emitted from the pixel units into photocurrents, each of the photodiodes including a first electrode; a plurality of second thin film transistors disposed on the metal light-shielding layer and configured to receive the photocurrents, so that light emission of the pixel units are compensated according to the photocurrents. Output terminals of the first thin film transistors are electrically connected to the metal light-shielding layer, and a gate of the first thin film transistor is electrically connected to the first electrode. Further disclosed are a display panel and a display substrate manufacturing method.

公开(公告)号：US20220131009A1

公开(公告)日：2022-04-28

申请号：US17356167

申请日：2021-06-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Tianmin ZHOU ,  Hehe HU ,  Xiaochun XU ,  Nianqi YAO ,  Dapeng XUE ,  Shuilang DONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.

公开(公告)号：US20250113541A1

公开(公告)日：2025-04-03

申请号：US18291389

申请日：2022-08-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Guangcai YUAN ,  Ce NING ,  Hehe HU ,  Nianqi YAO ,  Dapeng XUE ,  Shuilang DONG ,  Liping LEI ,  Dongfang WANG ,  Zhengliang LI

IPC: H10D30/67 ,  H10D30/01

Abstract: An oxide thin film transistor, a preparation method thereof, and an electronic device are provided. The oxide thin film transistor includes a base substrate, a gate electrode and a metal oxide semiconductor layer, a gate insulation layer arranged between the metal oxide semiconductor layer and the gate electrode; the gate insulation layer includes a silicon oxide insulation layer and a silicon nitride layer, the silicon nitride layer adopts a single-layer structure or include a plurality of silicon nitride sublayers which are sequentially stacked, the silicon oxide insulation layer is between the silicon nitride layer and the metal oxide semiconductor layer; at least a part of a region in the silicon nitride layer satisfies that the percentage content of Si—H bonds in the sum of Si—N bonds, N—H bonds and Si—H bonds is not more than 7.

公开(公告)号：US20250098225A1

公开(公告)日：2025-03-20

申请号：US18960308

申请日：2024-11-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Tianmin ZHOU ,  Hehe HU ,  Xiaochun XU ,  Nianqi YAO ,  Dapeng XUE ,  Shuilang DONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.

公开(公告)号：US20250098064A1

公开(公告)日：2025-03-20

申请号：US18552754

申请日：2022-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Kun ZHAO ,  Ce NING ,  Zhengliang LI ,  Zhanfeng CAO ,  Ke WANG ,  Jiaxiang ZHANG ,  Qi QI ,  Hehe HU ,  Feifei LI ,  Jie HUANG ,  Jiayu HE

IPC: H05K1/02 ,  G02F1/1335 ,  G02F1/13357 ,  H05K1/11 ,  H05K3/28

Abstract: A circuit board includes a substrate, a first conductive layer, a first insulating layer and a second conductive layer. The first conductive layer includes a plurality of first conductive portions. The second conductive layer includes a plurality of second conductive portions. A second conductive portion passes through a first via hole in the first insulating layer to be in electrical contact with a first conductive portion. The first conductive layer and the second conductive layer each include at least one main conductive layer, which is capable of creating a first intermetallic compound with solder. At least one of the first conductive layer and the second conductive layer further includes a stop layer capable of creating a second intermetallic compound with the solder. A rate of a reaction between the stop layer and the solder is lower than a rate of a reaction between the main conductive layer and the solder.