-
公开(公告)号：US07881103B2
公开(公告)日：2011-02-01
申请号：US12574783
申请日：2009-10-07
申请人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
发明人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1675 , Y10S977/754
摘要： A phase-change memory device includes a semiconductor substrate, a bit line and a word line arranged on the semiconductor substrate to intersect each other, and a phase-change material strip interposed between the bit line and the word line and extending lengthwise in a direction that is substantially parallel to at least a portion of the word line.
摘要翻译： 相变存储器件包括半导体衬底，布置在半导体衬底上的位线和字线彼此相交的相变存储器件，以及插入位线和字线之间的相变材料带，并且沿相对方向 其基本上平行于字线的至少一部分。
-
公开(公告)号：US20070159878A1
公开(公告)日：2007-07-12
申请号：US11648558
申请日：2007-01-03
申请人： Byung-gil Choi , Du-eung Kim , Woo-yeong Cho
发明人： Byung-gil Choi , Du-eung Kim , Woo-yeong Cho
CPC分类号： G11C7/18 , G11C8/12 , G11C13/0004 , G11C2213/72 , G11C2213/79
摘要： A phase change memory device includes a semiconductor substrate which includes a plurality of phase change memory cells, a plurality of local bit lines extending over the semiconductor substrate, each of the plurality of local bit lines being coupled to the plurality of phase change memory cells, and a plurality of global bit lines extending over the plurality of local bit lines, each of the plurality of global bit lines being selectively coupled to the plurality of local bit lines. The plurality of global bit lines are located at two or more different wiring line levels over the semiconductor substrate.
摘要翻译： 相变存储器件包括：半导体衬底，其包括多个相变存储器单元;多个局部位线，其延伸在所述半导体衬底上;所述多个局部位线中的每一个耦合到所述多个相变存储器单元; 以及在所述多个局部位线上延伸的多个全局位线，所述多个全局位线中的每一条选择性地耦合到所述多个局部位线。 多个全局位线位于半导体衬底上的两个或更多个不同的布线层上。
-
公开(公告)号：US07570530B2
公开(公告)日：2009-08-04
申请号：US12052761
申请日：2008-03-21
申请人： Byung-gil Choi , Du-eung Kim
发明人： Byung-gil Choi , Du-eung Kim
IPC分类号： G11C7/02
CPC分类号： G11C13/00 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C2013/0054
摘要： Disclosed is a nonvolatile memory device using a variable resistive element, and a data read circuit for use in variable resistive memory devices. More specifically, embodiments of the invention provide a data read circuit with one or more decoupling units to remove noise from one or more corresponding control signals. For instance, embodiments of the invention remove noise from a clamping control signal, a read bias control signal, and/or precharge signal. The disclosed decoupling units may be used alone or in any combination. Embodiments of the invention are beneficial because they can increase sensing margin and improve the reliability of read operations in memory devices with variable resistive elements.
摘要翻译： 公开了一种使用可变电阻元件的非易失性存储器件和用于可变电阻存储器件的数据读取电路。 更具体地，本发明的实施例提供具有一个或多个去耦单元的数据读取电路，以从一个或多个相应的控制信号中去除噪声。 例如，本发明的实施例从钳位控制信号，读取偏置控制信号和/或预充电信号中去除噪声。 所公开的去耦单元可以单独使用或以任何组合使用。 本发明的实施例是有益的，因为它们可以增加感测裕度并提高具有可变电阻元件的存储器件中的读取操作的可靠性。
-
公开(公告)号：US20070086235A1
公开(公告)日：2007-04-19
申请号：US11529323
申请日：2006-09-29
申请人： Du-eung Kim , Chang--soo Lee , Woo-yeong Cho , Byung-gil Choi
发明人： Du-eung Kim , Chang--soo Lee , Woo-yeong Cho , Byung-gil Choi
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1675 , Y10S977/754
摘要： A phase-change memory device includes a semiconductor substrate, a bit line and a word line arranged on the semiconductor substrate to intersect each other, and a phase-change material strip interposed between the bit line and the word line and extending lengthwise in a direction that is substantially parallel to at least a portion of the word line.
摘要翻译： 相变存储器件包括半导体衬底，布置在半导体衬底上的位线和字线彼此相交的相变存储器件，以及插入位线和字线之间的相变材料带，并且沿相对方向 其基本上平行于字线的至少一部分。
-
公开(公告)号：US20100019217A1
公开(公告)日：2010-01-28
申请号：US12574783
申请日：2009-10-07
申请人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
发明人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1675 , Y10S977/754
摘要： A phase-change memory device includes a semiconductor substrate, a bit line and a word line arranged on the semiconductor substrate to intersect each other, and a phase-change material strip interposed between the bit line and the word line and extending lengthwise in a direction that is substantially parallel to at least a portion of the word line.
摘要翻译： 相变存储器件包括半导体衬底，布置在半导体衬底上的位线和字线彼此相交的相变存储器件，以及插入位线和字线之间的相变材料带，并且沿相对方向 其基本上平行于字线的至少一部分。
-
公开(公告)号：US07613037B2
公开(公告)日：2009-11-03
申请号：US11529323
申请日：2006-09-29
申请人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
发明人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1675 , Y10S977/754
摘要： A phase-change memory device includes a semiconductor substrate, a bit line and a word line arranged on the semiconductor substrate to intersect each other, and a phase-change material strip interposed between the bit line and the word line and extending lengthwise in a direction that is substantially parallel to at least a portion of the word line.
摘要翻译： 相变存储器件包括半导体衬底，布置在半导体衬底上的位线和字线彼此相交的相变存储器件，以及插入位线和字线之间的相变材料带，并且沿相对方向 其基本上平行于字线的至少一部分。
-
公开(公告)号：US07405965B2
公开(公告)日：2008-07-29
申请号：US11648558
申请日：2007-01-03
申请人： Byung-gil Choi , Du-eung Kim , Woo-yeong Cho
发明人： Byung-gil Choi , Du-eung Kim , Woo-yeong Cho
IPC分类号： G11C11/22
CPC分类号： G11C7/18 , G11C8/12 , G11C13/0004 , G11C2213/72 , G11C2213/79
摘要： A phase change memory device includes a semiconductor substrate which includes a plurality of phase change memory cells, a plurality of local bit lines extending over the semiconductor substrate, each of the plurality of local bit lines being coupled to the plurality of phase change memory cells, and a plurality of global bit lines extending over the plurality of local bit lines, each of the plurality of global bit lines being selectively coupled to the plurality of local bit lines. The plurality of global bit lines are located at two or more different wiring line levels over the semiconductor substrate.
摘要翻译： 相变存储器件包括：半导体衬底，其包括多个相变存储器单元;多个局部位线，其延伸在所述半导体衬底上;所述多个局部位线中的每一个耦合到所述多个相变存储器单元; 以及在所述多个局部位线上延伸的多个全局位线，所述多个全局位线中的每一条选择性地耦合到所述多个局部位线。 多个全局位线位于半导体衬底上的两个或更多个不同的布线层上。
-
公开(公告)号：US20080232177A1
公开(公告)日：2008-09-25
申请号：US12052761
申请日：2008-03-21
申请人： Byung-gil Choi , Du-eung Kim
发明人： Byung-gil Choi , Du-eung Kim
IPC分类号： G11C7/00
CPC分类号： G11C13/00 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C2013/0054
摘要： Disclosed is a nonvolatile memory device using a variable resistive element, and a data read circuit for use in variable resistive memory devices. More specifically, embodiments of the invention provide a data read circuit with one or more decoupling units to remove noise from one or more corresponding control signals. For instance, embodiments of the invention remove noise from a clamping control signal, a read bias control signal, and/or precharge signal. The disclosed decoupling units may be used alone or in any combination. Embodiments of the invention are beneficial because they can increase sensing margin and improve the reliability of read operations in memory devices with variable resistive elements.
摘要翻译： 公开了一种使用可变电阻元件的非易失性存储器件和用于可变电阻存储器件的数据读取电路。 更具体地，本发明的实施例提供具有一个或多个去耦单元的数据读取电路，以从一个或多个相应的控制信号中去除噪声。 例如，本发明的实施例从钳位控制信号，读取偏置控制信号和/或预充电信号中去除噪声。 所公开的去耦单元可以单独使用或以任何组合使用。 本发明的实施例是有益的，因为它们可以增加感测裕度并提高具有可变电阻元件的存储器件中的读取操作的可靠性。
-
39.发明授权公开(公告)号：US08320168B2
公开(公告)日：2012-11-27
申请号：US13108143
申请日：2011-05-16
申请人： Hye-jin Kim , Kwang-jin Lee , Du-eung Kim
发明人： Hye-jin Kim , Kwang-jin Lee , Du-eung Kim
IPC分类号： G11C11/00
CPC分类号： G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
摘要： A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
摘要翻译： 操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
-
40.发明申请Multi-port phase change random access memory cell and multi-port phase change random access memory device including the same 有权多端口相变随机存取存储单元和多端口相变随机存取存储器件包括相同公开(公告)号：US20080084736A1
公开(公告)日：2008-04-10
申请号：US11902704
申请日：2007-09-25
申请人： Kwang-jin Lee , Du-eung Kim , Chang-soo Lee , Qi Wang
发明人： Kwang-jin Lee , Du-eung Kim , Chang-soo Lee , Qi Wang
IPC分类号： G11C11/00
CPC分类号： G11C8/16 , G11C13/0004 , G11C2213/74 , G11C2213/79
摘要： A multi-port phase change random access memory (PRAM) cell, includes a PRAM element including a phase change material, a writing controller configured to operate in correspondence with a writing word line, the writing controller connecting a writing bit line to the PRAM element, and a reading controller configured to operate in correspondence with a reading word line, the reading controller connecting the PRAM element to a reading bit line.
摘要翻译： 多端口相变随机存取存储器（PRAM）单元包括：包括相变材料的PRAM元件，配置成与写入字线对应地进行操作的写入控制器，写入控制器将写入位线连接到PRAM元件 以及读取控制器，被配置为与读取字线对应地操作，读取控制器将PRAM元件连接到读取位线。
-
-
-
-
-
-
-
-
-
搜索结果
55 条记录 (耗时 0.028 秒)
