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    Phase-change memory device
    1.
    发明授权
    Phase-change memory device 有权
    相变存储器件

    公开(公告)号：US07450415B2

    公开(公告)日：2008-11-11

    申请号：US11640956

    申请日：2006-12-19

    申请人： Du-eung Kim ,  Chang-soo Lee ,  Woo-yeong Cho ,  Beak-hyung Cho ,  Byung-gil Choi

    发明人： Du-eung Kim ,  Chang-soo Lee ,  Woo-yeong Cho ,  Beak-hyung Cho ,  Byung-gil Choi

    IPC分类号： G11C11/00

    CPC分类号： G11C8/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C2213/72 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148

    摘要： A phase-change memory device is provided. The phase-change memory device includes a phase-change memory cell array including a first memory block having a plurality of phase-change memory cells each connected between each of a plurality of bit lines and a first word line, a second memory block having a plurality of phase-change memory cells each connected between each of the plurality of bit lines and a second word line, and first and second pull-down transistors pulling-down each voltage level of the first and the second word lines and sharing a node and a row driver including a first and a second pull-up transistor pulling-up each voltage level of the first and the second word lines.

    摘要翻译： 提供了相变存储器件。 相变存储器件包括相变存储器单元阵列，该相变存储单元阵列包括具有连接在多个位线和第一字线中的每一个之间的多个相变存储单元的第一存储器块，具有第 多个相变存储单元，分别连接在多个位线和第二字线之间，第一和第二下拉晶体管下拉第一和第二字线的每个电压电平并共享一个节点;以及 行驱动器，包括第一和第二上拉晶体管，其拉出第一和第二字线的每个电压电平。

    Phase-change memory device
    6.
    发明申请
    Phase-change memory device 有权
    相变存储器件

    公开(公告)号：US20070153616A1

    公开(公告)日：2007-07-05

    申请号：US11640956

    申请日：2006-12-19

    申请人： Du-eung Kim ,  Chang-soo Lee ,  Woo-yeong Cho ,  Beak-hyung Cho ,  Byung-gil Choi

    发明人： Du-eung Kim ,  Chang-soo Lee ,  Woo-yeong Cho ,  Beak-hyung Cho ,  Byung-gil Choi

    IPC分类号： G11C11/00 ,  G11C8/00

    CPC分类号： G11C8/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C2213/72 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148

    摘要： A phase-change memory device is provided. The phase-change memory device includes a phase-change memory cell array including a first memory block having a plurality of phase-change memory cells each connected between each of a plurality of bit lines and a first word line, a second memory block having a plurality of phase-change memory cells each connected between each of the plurality of bit lines and a second word line, and first and second pull-down transistors pulling-down each voltage level of the first and the second word lines and sharing a node and a row driver including a first and a second pull-up transistor pulling-up each voltage level of the first and the second word lines.

    摘要翻译： 提供了相变存储器件。 相变存储器件包括相变存储器单元阵列，该相变存储单元阵列包括具有连接在多个位线和第一字线中的每一个之间的多个相变存储单元的第一存储器块，具有第 多个相变存储单元，分别连接在多个位线和第二字线之间，第一和第二下拉晶体管下拉第一和第二字线的每个电压电平并共享一个节点;以及 行驱动器，包括第一和第二上拉晶体管，其拉出第一和第二字线的每个电压电平。

    Phase change memory device
    7.
    发明申请
    Phase change memory device 有权
    相变存储器件

    公开(公告)号：US20070159878A1

    公开(公告)日：2007-07-12

    申请号：US11648558

    申请日：2007-01-03

    申请人： Byung-gil Choi ,  Du-eung Kim ,  Woo-yeong Cho

    发明人： Byung-gil Choi ,  Du-eung Kim ,  Woo-yeong Cho

    IPC分类号： G11C5/06 ,  G11C11/00 ,  G11C8/00

    CPC分类号： G11C7/18 ,  G11C8/12 ,  G11C13/0004 ,  G11C2213/72 ,  G11C2213/79

    摘要： A phase change memory device includes a semiconductor substrate which includes a plurality of phase change memory cells, a plurality of local bit lines extending over the semiconductor substrate, each of the plurality of local bit lines being coupled to the plurality of phase change memory cells, and a plurality of global bit lines extending over the plurality of local bit lines, each of the plurality of global bit lines being selectively coupled to the plurality of local bit lines. The plurality of global bit lines are located at two or more different wiring line levels over the semiconductor substrate.

    摘要翻译： 相变存储器件包括：半导体衬底，其包括多个相变存储器单元;多个局部位线，其延伸在所述半导体衬底上;所述多个局部位线中的每一个耦合到所述多个相变存储器单元; 以及在所述多个局部位线上延伸的多个全局位线，所述多个全局位线中的每一条选择性地耦合到所述多个局部位线。 多个全局位线位于半导体衬底上的两个或更多个不同的布线层上。

    Phase change memory device
    8.
    发明授权
    Phase change memory device 有权
    相变存储器件

    公开(公告)号：US07405965B2

    公开(公告)日：2008-07-29

    申请号：US11648558

    申请日：2007-01-03

    申请人： Byung-gil Choi ,  Du-eung Kim ,  Woo-yeong Cho

    发明人： Byung-gil Choi ,  Du-eung Kim ,  Woo-yeong Cho

    IPC分类号： G11C11/22

    CPC分类号： G11C7/18 ,  G11C8/12 ,  G11C13/0004 ,  G11C2213/72 ,  G11C2213/79

    摘要： A phase change memory device includes a semiconductor substrate which includes a plurality of phase change memory cells, a plurality of local bit lines extending over the semiconductor substrate, each of the plurality of local bit lines being coupled to the plurality of phase change memory cells, and a plurality of global bit lines extending over the plurality of local bit lines, each of the plurality of global bit lines being selectively coupled to the plurality of local bit lines. The plurality of global bit lines are located at two or more different wiring line levels over the semiconductor substrate.

    摘要翻译： 相变存储器件包括：半导体衬底，其包括多个相变存储器单元;多个局部位线，其延伸在所述半导体衬底上;所述多个局部位线中的每一个耦合到所述多个相变存储器单元; 以及在所述多个局部位线上延伸的多个全局位线，所述多个全局位线中的每一条选择性地耦合到所述多个局部位线。 多个全局位线位于半导体衬底上的两个或更多个不同的布线层上。

    Variable resistance memory device and method of manufacturing the same
    9.
    发明授权
    Variable resistance memory device and method of manufacturing the same 有权
    可变电阻存储器件及其制造方法

    公开(公告)号：US08116129B2

    公开(公告)日：2012-02-14

    申请号：US12872876

    申请日：2010-08-31

    申请人： Yu-hwan Ro ,  Byung-gil Choi ,  Woo-yeong Cho ,  Hyung-rok Oh

    发明人： Yu-hwan Ro ,  Byung-gil Choi ,  Woo-yeong Cho ,  Hyung-rok Oh

    IPC分类号： G11C11/00

    CPC分类号： G11C5/063 ,  G11C13/00 ,  G11C13/0004 ,  G11C2213/72 ,  H01L27/24 ,  Y10S977/754

    摘要： A variable resistance memory device includes a substrate, a plurality of active lines formed on the substrate, are uniformly separated, and extend in a first direction, a plurality of switching devices formed on the active lines and are separated from one another, a plurality of variable resistance devices respectively formed on and connected to the switching devices, a plurality of local bit lines formed on the variable resistance devices, are uniformly separated, extend in a second direction, and are connected to the variable resistance devices, a plurality of local word lines formed on the local bit lines, are uniformly separated, and extend in the first direction, a plurality of global bit lines formed on the local word lines, are uniformly separated, and extend in the second direction, and a plurality of global word lines formed on the global bit lines, are uniformly separated, and extend in the first direction.

    摘要翻译： 一种可变电阻存储器件，包括衬底，形成在衬底上的多个有源线，被均匀地分离并沿着第一方向延伸，多个开关器件形成在有源线上并彼此分离，多个 分别形成在开关装置上并连接到开关装置的可变电阻装置，形成在可变电阻装置上的多个局部位线被均匀分离，在第二方向上延伸，并且连接到可变电阻装置，多个局部字 形成在局部位线上的线被均匀地分离，并且在第一方向上延伸，形成在局部字线上的多个全局位线被均匀分离，并且在第二方向上延伸，并且多个全局字线 形成在全局位线上，均匀分离，并沿第一方向延伸。

    Phase-change memory device and method that maintains the resistance of a phase-change material in a reset state within a constant resistance range
    10.
    发明授权
    Phase-change memory device and method that maintains the resistance of a phase-change material in a reset state within a constant resistance range 有权
    相变存储器件和方法，其将相变材料的电阻维持在恒定电阻范围内的复位状态

    公开(公告)号：US07242605B2

    公开(公告)日：2007-07-10

    申请号：US10937943

    申请日：2004-09-11

    申请人： Byung-gil Choi ,  Woo-yeong Cho ,  Hyung-rok Oh ,  Beak-hyung Cho

    发明人： Byung-gil Choi ,  Woo-yeong Cho ,  Hyung-rok Oh ,  Beak-hyung Cho

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0004 ,  G11C13/0064 ,  G11C13/0069

    摘要： Provided are a phase-change memory device and method that maintains a resistance of a phase-change material in a reset state within a constant resistance range. In the method, data is provided to a first phase-change memory cell and then it is first determined whether data stored in the first phase-change memory cell and the data provided to the first phase-change memory cell are identical. If the data stored in the first phase-change memory cell and the data provided to the first phase-change memory cell are not identical, a complementary write current is provided to the first phase-change memory cell and it is second determined whether the data stored in the first phase-change memory cell and the data provided to the first phase-change memory cell are identical. If the data stored in the first phase-change memory cell and the data provided to the first phase-change memory cell are identical, data is provided to a second phase-change memory cell.

    摘要翻译： 提供了一种相变存储器件和方法，其将相变材料的电阻保持在恒定电阻范围内的复位状态。 在该方法中，将数据提供给第一相变存储器单元，然后首先确定存储在第一相变存储单元中的数据和提供给第一相变存储单元的数据是否相同。 如果存储在第一相变存储单元中的数据和提供给第一相变存储单元的数据不相同，则向第一相变存储单元提供互补写入电流，并且第二相位变换存储单元是否将数据 存储在第一相变存储单元中，提供给第一相变存储单元的数据相同。 如果存储在第一相变存储单元中的数据和提供给第一相变存储单元的数据相同，则将数据提供给第二相变存储单元。