公开(公告)号：US20050094643A1

公开(公告)日：2005-05-05

申请号：US10702152

申请日：2003-11-05

申请人： Xiaolin Wang ,  Ajay Mahagaokar ,  Ray Rajib ,  Michael Wright

发明人： Xiaolin Wang ,  Ajay Mahagaokar ,  Ray Rajib ,  Michael Wright

IPC分类号： H04L12/56

CPC分类号： H04L47/6215 ,  H04L47/2408 ,  H04L47/50 ,  H04L47/522 ,  H04L47/525 ,  H04L47/56 ,  H04L47/6255 ,  H04L2012/5665 ,  H04L2012/5679 ,  H04L2012/5681

摘要： A configurable adaptive variable length data packet transmission output scheduler for enabling substantially simultaneous transmission on a common transmission link, as of fiber optics, of differentiated services for various different traffic types, executing different QOS algorithms while co-existing in a converged network environment, with simultaneous preserving of the different service characteristics for real-time or high-priority traffic and providing differentiated bandwidth allocation while achieving maximal link utilization—all through a fine and balanced control as to which type of traffic is transmitted on the link for a given duration, and how much of that traffic is transmitted on the link.

摘要翻译： 一种可配置的自适应可变长度数据分组传输输出调度器，用于在诸如光纤的公共传输链路上基本上同时传输用于各种不同业务类型的差异化服务，同时在融合网络环境中共存时执行不同的QOS算法， 同时保留实时或高优先级业务的不同业务特性，并提供差异化​​带宽分配，同时实现最大链路利用率，全部通过对链路上给定持续时间内传输哪种类型业务的精细平衡控制， 以及在链路上传输多少流量。

公开(公告)号：US10445099B2

公开(公告)日：2019-10-15

申请号：US16168088

申请日：2018-10-23

申请人： Xiaolin Wang ,  Qian Wu

发明人： Xiaolin Wang ,  Qian Wu

IPC分类号： G06F9/30 ,  G06F15/78 ,  G06F15/76 ,  G06F17/50 ,  H04B1/00 ,  G06F9/455

摘要： A reconfigurable, multi-core processor includes a plurality of memory blocks and programmable elements, including units for processing, memory interface, and on-chip cognitive data routing, all interconnected by a self-routing cognitive on-chip network. In embodiments, the processing units perform intrinsic operations in any order, and the self-routing network forms interconnections that allow the sequence of operations to be varied and both synchronous and asynchronous data to be transmitted as needed. A method for programming the processor includes partitioning an application into modules, determining whether the modules execute in series, program-driven parallel, or data-driven parallel, determining the data flow required between the modules, assigning hardware resources as needed, and automatically generating machine code for each module. In embodiments, Time Fields are added to the instruction format for all programming units that specify the number of clock cycles for which only one fetched and decoded instruction will be executed.

公开(公告)号：US09910673B2

公开(公告)日：2018-03-06

申请号：US15488672

申请日：2017-04-17

申请人： Xiaolin Wang ,  Qian Wu

发明人： Xiaolin Wang ,  Qian Wu

IPC分类号： G06F9/30 ,  G06F9/455 ,  G06F17/50 ,  G06F15/78 ,  H04B1/00 ,  G06F15/76

CPC分类号： G06F9/30181 ,  G06F9/455 ,  G06F15/76 ,  G06F15/7867 ,  G06F17/5054 ,  G06F2015/768 ,  H04B1/0003

摘要： A reconfigurable, multi-core processor includes a plurality of memory blocks and programmable elements, including units for processing, memory interface, and on-chip cognitive data routing, all interconnected by a self-routing cognitive on-chip network. In embodiments, the processing units perform intrinsic operations in any order, and the self-routing network forms interconnections that allow the sequence of operations to be varied and both synchronous and asynchronous data to be transmitted as needed. A method for programming the processor includes partitioning an application into modules, determining whether the modules execute in series, program-driven parallel, or data-driven parallel, determining the data flow required between the modules, assigning hardware resources as needed, and automatically generating machine code for each module. In embodiments, a Time Field is added to the instruction format for all programming units that specifies the number of clock cycles for which only one instruction fetch and decode will be performed.

公开(公告)号：US20170300333A1

公开(公告)日：2017-10-19

申请号：US15488672

申请日：2017-04-17

申请人： Xiaolin Wang ,  Qian Wu

发明人： Xiaolin Wang ,  Qian Wu

IPC分类号： G06F9/30 ,  G06F17/50 ,  G06F15/78 ,  G06F15/76 ,  H04B1/00 ,  G06F9/455

CPC分类号： G06F9/30181 ,  G06F9/455 ,  G06F15/76 ,  G06F15/7867 ,  G06F17/5054 ,  G06F2015/768 ,  H04B1/0003

摘要： A reconfigurable, multi-core processor includes a plurality of memory blocks and programmable elements, including units for processing, memory interface, and on-chip cognitive data routing, all interconnected by a self-routing cognitive on-chip network. In embodiments, the processing units perform intrinsic operations in any order, and the self-routing network forms interconnections that allow the sequence of operations to be varied and both synchronous and asynchronous data to be transmitted as needed. A method for programming the processor includes partitioning an application into modules, determining whether the modules execute in series, program-driven parallel, or data-driven parallel, determining the data flow required between the modules, assigning hardware resources as needed, and automatically generating machine code for each module. In embodiments, a Time Field is added to the instruction format for all programming units that specifies the number of clock cycles for which only one instruction fetch and decode will be performed.

公开(公告)号：US09127655B2

公开(公告)日：2015-09-08

申请号：US13879111

申请日：2011-09-28

申请人： Shulong Wang ,  Xianying Tan ,  Xiaolin Wang ,  Hongguang Zhang ,  Yongqing Shi ,  Fang Gu

发明人： Shulong Wang ,  Xianying Tan ,  Xiaolin Wang ,  Hongguang Zhang ,  Yongqing Shi ,  Fang Gu

IPC分类号： E03B5/00 ,  F04B7/02 ,  F04B15/08 ,  F04B51/00

CPC分类号： F04B7/02 ,  F04B15/08 ,  F04B51/00 ,  F04B2015/0824

摘要： The disclosure relates to liquid nitrogen pump equipment load testing and experimenting apparatus, and testing and experimenting method thereof, used for oil-gas fields or coalbed methane nitrogen foam fracturing equipment testing. A hydraulic damping apparatus unit and a pressure regulation unit are provided; the hydro-mechanical damping apparatus unit comprises a water tank, a pump unit apparatus, and a pipe manifold system connected in sequence.

摘要翻译： 本公开涉及用于油气田或煤层气氮气泡沫压裂设备试验的液氮泵设备负荷试验和试验装置及其试验和试验方法。 提供液压阻尼装置单元和压力调节单元; 水力机械阻尼装置单元包括依次连接的水箱，泵单元装置和管道歧管系统。

公开(公告)号：US20150205428A1

公开(公告)日：2015-07-23

申请号：US14355094

申请日：2013-06-18

申请人： Xiaolin Wang

发明人： Xiaolin Wang

IPC分类号： G06F3/041 ,  G06F3/044

CPC分类号： G06F3/0416 ,  G06F3/0412 ,  G06F3/044 ,  G06F2203/04112

摘要： A touch screen, a driving method thereof and a display device. Common electrodes (9) of at least part of pixel units (5) on an array substrate (1) form a plurality of touch driving electrodes (3) each comprising at least one common electrode (9); the plurality of touch driving electrodes (3) are grouped into a plurality of touch driving electrode groups (101, 102) each comprising at least one touch driving electrode (3), and a plurality of touch sensing electrodes (4) are formed on a color filter substrate (2), the touch driving electrodes (3) and the touch sensing electrodes (4) are disposed to be intersected horizontally and vertically. Further, a driving circuit (10) is further provided, during a display period in a display time for one frame of picture, a common electrode signal is transferred by the driving circuit (10) to all of the touch driving electrodes (3), while during a touch period in the display time for the one frame of picture, a touch scan signal is only transferred by the driving circuit (10) to the respective touch driving electrodes in one of the touch driving electrode groups (101, 102).

摘要翻译： 触摸屏，其驱动方法和显示装置。 阵列基板（1）上的像素单元（5）的至少一部分的公共电极（9）形成多个触摸驱动电极（3），每个触摸驱动电极包括至少一个公共电极（9）; 多个触摸驱动电极（3）分组成多个触摸驱动电极组（101,102），每个触摸驱动电极组包括至少一个触摸驱动电极（3），并且多个触摸驱动电极组 滤色器基板（2），触摸驱动电极（3）和触摸感测电极（4）被设置成水平和垂直相交。 此外，在一帧图像的显示时间的显示期间，进一步提供驱动电路（10），公共电极信号由驱动电路（10）传送给所有的触摸驱动电极（3）， 而在一帧图像的显示时间的触摸周期期间，触摸扫描信号仅由驱动电路（10）传送到触摸驱动电极组（101,102）之一中的各个触摸驱动电极。

公开(公告)号：US08723104B2

公开(公告)日：2014-05-13

申请号：US13613725

申请日：2012-09-13

申请人： Dong Sun ,  Xiaolin Wang

发明人： Dong Sun ,  Xiaolin Wang

IPC分类号： G21K5/04 ,  G21K1/00 ,  G01N21/17

CPC分类号： G21K1/00 ,  G01N15/1429 ,  G01N15/1459 ,  G01N21/17 ,  G01N2015/1006 ,  G01N2015/149 ,  G21K1/003 ,  G21K1/006

摘要： The present invention is concerned with a system for sorting target particles from a flow of particles. The system has a microscope, a light source, a CCD camera, microfluidic chip device with microfluidic channels, a detection apparatus for detecting the target particles with predefined specific features, a response generating apparatus for generating a signal in response to the detection of the target particles, and an optical tweezing system for controlling movement of optical traps, the optical tweezing system is operably linked to the response signal.

摘要翻译： 本发明涉及用于从颗粒流中分选目标颗粒的系统。 该系统具有显微镜，光源，CCD照相机，具有微流体通道的微流体芯片装置，用于利用预定义的特定特征检测目标颗粒的检测装置，响应于产生响应于目标的检测的信号的响应产生装置 颗粒和用于控制光阱的移动的光学镊子系统，光学镊子系统可操作地连接到响应信号。

公开(公告)号：USRE44119E1

公开(公告)日：2013-04-02

申请号：US13247990

申请日：2011-09-28

申请人： Xiaolin Wang ,  Ajay C. Mahagaokar ,  Ray Rajib ,  Michael T. Wright

发明人： Xiaolin Wang ,  Ajay C. Mahagaokar ,  Ray Rajib ,  Michael T. Wright

IPC分类号： H04L12/56 ,  H04J1/16

CPC分类号： H04L47/6215 ,  H04L47/2408 ,  H04L47/50 ,  H04L47/522 ,  H04L47/525 ,  H04L47/56 ,  H04L47/6255 ,  H04L2012/5665 ,  H04L2012/5679 ,  H04L2012/5681

摘要： A configurable adaptive variable length data packet transmission output scheduler for enabling substantially simultaneous transmission on a common transmission link, as of fiber optics, of differentiated services for various different traffic types, executing different QOS algorithms while co-existing in a converged network environment, with simultaneous preserving of the different service characteristics for real-time or high-priority traffic and providing differentiated bandwidth allocation while achieving maximal link utilization—all through a fine and balanced control as to which type of traffic is transmitted on the link for a given duration, and how much of that traffic is transmitted on the link.

摘要翻译： 一种可配置的自适应可变长度数据分组传输输出调度器，用于在诸如光纤的公共传输链路上基本上同时传输用于各种不同业务类型的差异化服务，同时在融合网络环境中共存时执行不同的QOS算法， 同时保留实时或高优先级业务的不同业务特性，并提供差异化​​带宽分配，同时实现最大链路利用率，全部通过对链路上给定持续时间内传输哪种类型业务的精细平衡控制， 以及在链路上传输多少流量。

公开(公告)号：US08311561B2

公开(公告)日：2012-11-13

申请号：US12555632

申请日：2009-09-08

申请人： Xiaolin Wang ,  Zhonghui Yao ,  Ning Zhang

发明人： Xiaolin Wang ,  Zhonghui Yao ,  Ning Zhang

IPC分类号： H04W24/00

CPC分类号： H04W12/12 ,  H04W8/04 ,  H04W12/06 ,  H04W64/003 ,  H04W84/045

摘要： A method of location positioning of a Radio Access Point (AP) is provided in an embodiment of the present invention. The method includes: querying the Connectivity Session Location and Repository Function (CLF) according to the IP address of the AP to obtain the Access Line Location Identifier (ALLI) of the AP to access a network. The ALLI is configured to identify the line location of the AP. The location of the AP is determined on the basis of the ALLI. A method of location verification of an AP is provided herein in an embodiment of the present invention. The method includes: the CLF is queried according to the IP address of the AP to obtain the ALLI of the AP; the location of the AP is not changed if the obtained ALLI of the AP is the same as the stored ALLI of the AP. A home register and a system are also provided herein to accurately locate and verify the location of the AP, thus checking the validity of the AP location.

摘要翻译： 在本发明的实施例中提供了无线电接入点（AP）的定位方法。 该方法包括：根据AP的IP地址查询连通性会话位置和存储库功能（CLF），以获取AP接入网络的接入线路位置标识符（ALLI）。 ALLI被配置为识别AP的线路位置。 AP的位置是基于ALLI来确定的。 本发明的实施例中提供了AP的位置验证方法。 该方法包括：根据AP的IP地址查询CLF，获取AP的ALLI; 如果获得的AP的ALLI与存储的AP的ALLI相同，则AP的位置不改变。 本文还提供了家庭寄存器和系统来准确地定位和验证AP的位置，从而检查AP位置的有效性。

公开(公告)号：US08099583B2

公开(公告)日：2012-01-17

申请号：US11973184

申请日：2007-10-06

申请人： Xiaolin Wang

发明人： Xiaolin Wang

IPC分类号： G06F15/80 ,  G06F9/30

CPC分类号： G06F9/30145 ,  G06F9/30181 ,  G06F9/3867 ,  G06F9/3885 ,  G06F9/3897 ,  G06F15/7867 ,  Y02D10/12 ,  Y02D10/13

摘要： A new signal processor technique and apparatus combining microprocessor technology with switch fabric telecommunication technology to achieve a programmable processor architecture wherein the processor and the connections among its functional blocks are configured by software for each specific application by communication through a switch fabric in a dynamic, parallel and flexible fashion to achieve a reconfigurable pipeline, wherein the length of the pipeline stages and the order of the stages varies from time to time and from application to application, admirably handling the explosion of varieties of diverse signal processing needs in single devices such as handsets, set-top boxes and the like with unprecedented performance, cost and power savings, and with full application flexibility.

摘要翻译： 一种将微处理器技术与交换结构电信技术结合以实现可编程处理器架构的新的信号处理器技术和装置，其中处理器及其功能块之间的连接由用于每个特定应用的软件由通过交换结构通过动态，并行 并且灵活的方式来实现可重新配置的流水线，其中流水线阶段的长度和阶段的顺序随时间而变化，从应用到应用，令人满意地处理单个设备（例如手机）中各种各样的信号处理需求的爆炸性 ，机顶盒等，具有前所未有的性能，成本和功耗，并具有完全的应用灵活性。