公开(公告)号：US20050196677A1

公开(公告)日：2005-09-08

申请号：US11097730

申请日：2005-04-01

申请人： Young Lee ,  Kwang Kim ,  Kwang Ryu ,  Soon Chang

发明人： Young Lee ,  Kwang Kim ,  Kwang Ryu ,  Soon Chang

IPC分类号： H01B1/06 ,  H01B13/00 ,  H01M2/14 ,  H01M2/16 ,  H01M10/05 ,  H01M10/052 ,  H01M10/056 ,  H01M10/0565 ,  H01M10/40

CPC分类号： H01M10/0565 ,  H01M2/145 ,  H01M2/166 ,  H01M2/1686 ,  H01M10/052 ,  H01M10/056 ,  H01M2300/0025 ,  H01M2300/0071 ,  H01M2300/0082 ,  H01M2300/0091 ,  H01M2300/0094

摘要： Provided are a composite polymer electrolyte for a lithium secondary battery in which a composite polymer matrix multi-layer structure composed of a plurality of polymer matrices with different pore sizes is impregnated with an electrolyte solution, and a method of manufacturing the same. Among the polymer matrices, a microporous polymer matrix with a smaller pore size contains a lithium cationic single-ion conducting inorganic filler, thereby enhancing ionic conductivity, the distribution uniformity of the impregnated electrolyte solution, and maintenance characteristics. The microporous polymer matrix containing the lithium cationic single-ion conducting inorganic filler is coated on a surface of a porous polymer matrix to form the composite polymer matrix multi-layer structure, which is then impregnated with the electrolyte solution, to manufacture the composite polymer electrolyte. The composite polymer electrolyte is used in a unit battery. The composite polymer matrix structure can increase mechanical properties. The introduction of the lithium cationic single-ion conducting inorganic filler can provide excellent ionic conductivity and high rate discharge characteristics.

摘要翻译： 本发明提供一种锂二次电池用复合高分子电解质及其制造方法，其中将由多个不同孔径的聚合物基体组成的复合聚合物基体多层结构浸渍在电解质溶液中。 在聚合物基质中，具有较小孔径的微孔聚合物基质包含阳离子单离子导电无机填料，从而提高离子电导率，浸渍电解质溶液的分布均匀性和维护特性。 将含有阳离子单离子导电无机填料的微孔聚合物基体涂覆在多孔聚合物基质的表面上以形成复合聚合物基质多层结构，然后用电解质溶液浸渍，制备复合聚合物电解质 。 复合聚合物电解质用于单位电池。 复合聚合物基体结构可增加机械性能。 引入锂阳离子单离子导电无机填料可以提供优异的离子导电性和高速率放电特性。

公开(公告)号：US20050195357A1

公开(公告)日：2005-09-08

申请号：US10864867

申请日：2004-06-10

申请人： Kwang Kim ,  Kyung Kim

发明人： Kwang Kim ,  Kyung Kim

IPC分类号： G02C9/00 ,  G02C9/02 ,  G02C9/04

CPC分类号： G02C9/04 ,  G02C9/02 ,  G02C2200/02

摘要： Disclosed herein is a pivotable sunshade clip for spectacles, which can be easily pivoted upward or downward while it is attached to the spectacles without risk of unintentional separation, and can eliminate any unpleasant pressure exerted upon a wearer by virtue of a weight reduction thereof. The pivotable sunshade clip comprises a spectacles bridge and a sunshade bridge which are attached to frames of spectacles and the sunshade clip, respectively. Both the bridges are made of the same material as that of the frames. The spectacles bridge is centrally provided with a stator having a pair of magnets inserted at front and upper sides thereof, respectively. The sunshade bridge is centrally provided with a mover. The mover is adapted to be pivoted upward or downward to be magnetically attached to one of the magnets inserted in the stator, thereby maintaining the sunshade clip in an opening or closing position relative to the spectacles. Such a mover includes a center stator recess for receiving the stator, and pivot bridge portions located at both sides of the stator recess, respectively. Each of the pivot bridge portions has a fitting groove for allowing the spectacles bridge to be fitted therein while forming a pivot center point. The mover also includes a magnet inserted in the stator recess and adapted to be magnetically attracted to one of the magnets of the stator.

摘要翻译： 这里公开了一种用于眼镜的可枢转的遮阳夹，其可以容易地向上或向下枢转，同时附接到眼镜，而不会有意外的分离，并且可以通过减轻其重量而消除对佩戴者施加的不愉快的压力。 可枢转的遮阳夹包括分别连接到眼镜框架和遮阳夹的眼镜桥和遮阳桥。 这两个桥梁由与框架相同的材料制成。 眼镜桥中央设置有分别具有插入其前侧和上侧的一对磁体的定子。 遮阳大桥中央设有一个动子。 移动器适于向上或向下枢转以磁性地附接到插入定子中的一个磁体，从而将遮阳夹相对于眼镜保持在打开或关闭位置。 这种动子包括分别用于接收定子的中心定子凹槽和位于定子凹槽两侧的枢转桥接部分。 每个枢轴桥接部分具有用于允许眼镜桥架安装在其中同时形成枢转中心点的配合槽。 动子还包括插入定子凹槽中并适于被磁性地吸引到定子的一个磁体的磁体。

公开(公告)号：US06940806B2

公开(公告)日：2005-09-06

申请号：US10133903

申请日：2002-04-29

申请人： Byoung-young Bae ,  Soon-kyo Hong ,  Kwang Kim ,  Hae-sub Kweon

发明人： Byoung-young Bae ,  Soon-kyo Hong ,  Kwang Kim ,  Hae-sub Kweon

IPC分类号： G11B23/03

CPC分类号： G11B23/0306 ,  G11B23/0307

摘要： A disc cartridge for receiving a disc includes a case which accommodates the disc and at least one centering spring which prevents deviation of the disc in the case. Thus, a gap in which the disc moves in the disc cartridge is restricted so as to reduce a length in which a disc clamp of the disc contacts a disc clamp guide inside a disc drive system. Accordingly, the height of the disc clamp is reduced so as to reduce the thickness of the disc cartridge and miniaturize the disc cartridge.

摘要翻译： 用于接收盘的盘盒包括容纳盘的壳体和至少一个定心弹簧，其防止在该壳体中的偏移。 因此，限制盘在盘盒中移动的间隙，以便减小盘的盘夹与盘驱动系统内的盘夹引导件的长度。 因此，减小了盘夹的高度，以便减小盘盒的厚度并使盘盒小型化。

公开(公告)号：US20050134398A1

公开(公告)日：2005-06-23

申请号：US10858925

申请日：2004-06-01

申请人： Seung Myong ,  Kwang Kim ,  Jyung Lee ,  Sang Lim

发明人： Seung Myong ,  Kwang Kim ,  Jyung Lee ,  Sang Lim

IPC分类号： H03H9/46 ,  H03H7/12

CPC分类号： H03H7/12

摘要： A tunable high-order Bessel low pass filter which is applied to a multi-rate duobinary generation system of an optical communication system. The tunable Bessel low pass filter comprises a variable inductor circuit including a plurality of variable inductors connected in series between an input signal terminal and an output signal terminal and controlled respectively by corresponding inductance control signals, a variable capacitor circuit including a plurality of variable capacitors connected respectively between corresponding connection nodes of the plurality of variable inductors of the variable inductor circuit and a ground terminal and controlled respectively by corresponding capacitance control signals, and a variable capacitor/inductor controller for outputting the corresponding capacitance control signals to the variable capacitors of the variable capacitor circuit and the corresponding inductance control signals to the variable inductors of the variable inductor circuit on the basis of preset values according to a given data rate, respectively. When the data rate of an application system is changed, the tunable Bessel low pass filter controls its filtering characteristics most appropriately to the changed data rate, so as to extend its application range and enhance performance and efficiency of the application system.

摘要翻译： 一种可调谐的高阶贝塞尔低通滤波器，适用于光通信系统的多速率二进制生成系统。 可调谐贝塞尔低通滤波器包括可变电感器电路，其包括串联连接在输入信号端子和输出信号端子之间的多个可变电感器，分别由相应的电感控制信号控制，可变电容器电路包括多个连接的可变电容器 分别在可变电感器电路的多个可变电感器的相应连接节点和接地端子之间分别由相应的电容控制信号控制;以及可变电容器/电感器控制器，用于将相应的电容控制信号输出到变量的可变电容器 电容器电路和相应的电感控制信号分别根据给定的数据速率在可变电感器的可变电感器的基础上进行预设值。 当应用系统的数据速率发生变化时，可调式贝塞尔低通滤波器最适合改变数据速率控制其滤波特性，从而扩展其应用范围，提高应用系统的性能和效率。

公开(公告)号：US20050128556A1

公开(公告)日：2005-06-16

申请号：US10826015

申请日：2004-04-16

申请人： Youn Jang ,  Kwang Kim ,  Jin Han

发明人： Youn Jang ,  Kwang Kim ,  Jin Han

IPC分类号： H04B10/18 ,  G02F1/01 ,  G02F1/225 ,  G02F1/03

CPC分类号： G02F1/0123 ,  G02F1/225

摘要： The present invention relates to an apparatus and method for stabilizing a bias voltage for a pulse generating modulator, which can automatically detect an optimal bias voltage for an external modulator, which is used in RZ or CSRZ modulation of an optical transmission signal using NRZ data to generate a reference pulse optical signal, and maintain the optimal bias voltage. In the bias voltage stabilizing method of the present invention, an output signal of the external modulator, to which the bias voltage to be stabilized is applied, is detected, a drive clock signal applied to the external modulator is detected, a mean output value of the products obtained by the multiplication of the output signal and the clock signal is periodically examined, and the bias voltage is adjusted so that the mean output value becomes “0”.

摘要翻译： 本发明涉及一种用于稳定脉冲发生调制器的偏置电压的装置和方法，该装置和方法可以自动检测用于外部调制器的最佳偏置电压，其用于使用NRZ数据的光传输信号的RZ或CSRZ调制 产生参考脉冲光信号，并保持最佳偏置电压。 在本发明的偏压稳定化方法中，检测到施加了要稳定的偏置电压的外部调制器的输出信号，检测到施加到外部调制器的驱动时钟信号，平均输出值 周期性地检查通过乘以输出信号和时钟信号而获得的乘积，并调整偏置电压，使得平均输出值变为“0”。

公开(公告)号：US20050040871A1

公开(公告)日：2005-02-24

申请号：US10959512

申请日：2004-10-07

申请人： Kwang Kim

发明人： Kwang Kim

IPC分类号： G06F1/10 ,  H03K5/135 ,  H03L7/00

CPC分类号： H03K5/135 ,  G06F1/10 ,  H03L7/00

摘要： A transition delay matching circuit in which the transition delay of the divided clock signal is substantially the same as the transition delay of the reference clock signal. The transition delay of the divided clock signal is adjusted by reducing the steady state amplitude of the divided clock signal. Apparatuses and methods for matching the transition delays of the divided clock signal and the reference clock signal are disclosed.

摘要翻译： 一种转换延迟匹配电路，其中分频时钟信号的转换延迟与参考时钟信号的转换延迟基本相同。 通过减小分频时钟信号的稳态幅度来调整分频时钟信号的转换延迟。 公开了用于匹配分频时钟信号和参考时钟信号的转移延迟的装置和方法。

公开(公告)号：US06781793B2

公开(公告)日：2004-08-24

申请号：US10056071

申请日：2002-01-28

申请人： Kwang Kim ,  Soon-kyo Hong ,  Hae-sub Kweon ,  Seo-young Oh ,  Hee-sung Park ,  Jung-ho Hwang

发明人： Kwang Kim ,  Soon-kyo Hong ,  Hae-sub Kweon ,  Seo-young Oh ,  Hee-sung Park ,  Jung-ho Hwang

IPC分类号： G11B2303

CPC分类号： G11B33/1486 ,  G11B23/0327

摘要： A disc cartridge having a case to accommodate a disc, a shutter to open or close an opening formed in the case to enable a recording and/or reproducing job with respect to the disc, a discharge path provided at one side of the case to allow the flow of air formed therein during rotation of the disc, and an opening/closing mechanism to open/close the discharge path. Thus, since the discharge path through which the flow of air produced inside the cartridge during rotation of a disc is smoothly discharged to the outside is provided, contamination of the disc by foreign material such as dust can be considerably reduced.

摘要翻译： 一种具有用于容纳盘的壳体的盘盒，用于打开或关闭形成在壳体中的开口以使得能够相对于盘进行记录和/或再现作业的挡板，设置在壳体的一侧以允许 在盘旋转期间形成的空气流，以及打开/关闭排出路径的打开/关闭机构。 因此，由于在盘的旋转期间在筒内产生的空气流顺利地排出到外部的排放路径被提供，因此可以显着地减少诸如灰尘的异物对盘的污染。

公开(公告)号：US06727991B2

公开(公告)日：2004-04-27

申请号：US10195701

申请日：2002-07-15

申请人： Julio Martinez ,  Kwang Kim ,  Olga Nedzhvetskaya ,  Doruk Engin ,  Jiten Sarathy ,  Roman Antosik ,  Bharat Dave ,  Michael Evans ,  David Lidsky ,  Ronald Simprini ,  Boris Stefanov ,  Tan Thai

发明人： Julio Martinez ,  Kwang Kim ,  Olga Nedzhvetskaya ,  Doruk Engin ,  Jiten Sarathy ,  Roman Antosik ,  Bharat Dave ,  Michael Evans ,  David Lidsky ,  Ronald Simprini ,  Boris Stefanov ,  Tan Thai

IPC分类号： G01B902

CPC分类号： H04B10/299 ,  H04L7/0075

摘要： A method and circuit are presented for an all-optical format independent preprocessor that processes an arbitrary optical input signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. The method involves subtracting a delayed copy of the signal from the original, thereby effectively doubling its frequency, and inserting a pulse at each transition of the original signal, whether rising or falling. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The asymmetry consists of a delay element in one arm. In a preferred embodiment the entire device is fabricated on a semiconductor substrate, allowing for compactness as well as minimization of interconnectivity losses and overall power consumption. The output of the preprocessor, having a significant frequency component at its original clock rate, can then be fed to a clock recovery stage for all-optical clock recovery.

摘要翻译： 提出了一种用于全光学格式独立预处理器的方法和电路，其通过仅将其放大来将NRZ信号转换为PRZ信号或者输入光信号是RZ来处理任意的光输入信号。 该方法包括从原始信号中减去信号的延迟副本，从而有效地使其频率加倍，并且在原始信号的每个转换处插入脉冲，无论是上升还是下降。 在优选实施例中，该阶段通过不对称干涉仪装置的每个臂中的集成SOA来实现。 不对称性由一个臂中的延迟元件组成。 在优选实施例中，整个器件制造在半导体衬底上，允许紧凑性以及最小化互连损耗和总功耗。 然后，具有其原始时钟速率的显着频率分量的预处理器的输出可以被馈送到用于全光时钟恢复的时钟恢复阶段。

公开(公告)号：US06678086B2

公开(公告)日：2004-01-13

申请号：US10195766

申请日：2002-07-15

申请人： Bharat Dave ,  Doruk Engin ,  Kwang Kim ,  Mohammad Laham ,  Julio Martinez ,  Olga Nedzhvetskaya ,  Jithamithra Sarathy ,  Ronald Simprini ,  Boris Stefanov ,  Tan Buu Thai

发明人： Bharat Dave ,  Doruk Engin ,  Kwang Kim ,  Mohammad Laham ,  Julio Martinez ,  Olga Nedzhvetskaya ,  Jithamithra Sarathy ,  Ronald Simprini ,  Boris Stefanov ,  Tan Buu Thai

IPC分类号： G02F135

CPC分类号： H04B10/299 ,  H04L7/0075

摘要： A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.

摘要翻译： 提出了一种用于从任意光数据信号对时钟信号进行全光学恢复的方法和电路。 该方法涉及两个阶段。 第一级通过将NRZ信号转换为PRZ信号，或者如果输入光信号是RZ，则仅通过放大来预处理光信号。 在优选实施例中，该阶段通过不对称干涉仪装置的每个臂中的集成SOA来实现。 预处理阶段的输出被馈送到时钟恢复阶段，时钟恢复阶段包括通过使用第二级输入信号来锁定固有时钟信号的对称干涉仪，以触发两个光源以时钟速率自振荡。 在优选实施例中，第二级通过集成在干涉仪的臂中的SOA实现，其中两个DFB激光器作为终端。 干涉仪的输出是以原始输入的时钟速率的光时钟信号。

公开(公告)号：US06594072B2

公开(公告)日：2003-07-15

申请号：US10195672

申请日：2002-07-15

申请人： Bharat Dave ,  Doruk Engin ,  Kwang Kim ,  Julio Martinez ,  Olga Nedzhvetskaya ,  Jithamithra Sarathy ,  Ronald Simprini ,  Boris Stefanov ,  Tan Buu Thai

发明人： Bharat Dave ,  Doruk Engin ,  Kwang Kim ,  Julio Martinez ,  Olga Nedzhvetskaya ,  Jithamithra Sarathy ,  Ronald Simprini ,  Boris Stefanov ,  Tan Buu Thai

IPC分类号： H01S300

CPC分类号： H04B10/299 ,  H04L7/0075

摘要： A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.