公开(公告)号：US08599190B2

公开(公告)日：2013-12-03

申请号：US13074768

申请日：2011-03-29

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： G09G5/00

CPC分类号： G09G3/3688 ,  G09G3/3291 ,  G09G3/3614 ,  G09G2310/027

摘要： A decoder includes a first sub-decoder that receives a first level voltage set and outputs voltages selected according to lower L-bits of N-bit data, a second sub-decoder that receives a second level voltage set and outputs voltages selected according to the lower L-bits, a third sub-decoder that selects, according to higher M-bits, one voltage from the voltages selected by the first and second sub-decoders, a fourth sub-decoder that outputs voltages selected according to lower P-bits from among a third level voltage set, a fifth sub-decoder that selects one voltage selected according to higher Q-bits from the voltages output from the fourth sub-decoder, and a sixth sub-decoder that controls conduction and non-conduction based on K-bits, between one output among outputs of the first sub-decoder, and one output among outputs of the fourth sub-decoder; output of the third sub-decoder and output of the fifth sub-decoder are connected to an output terminal; the first, second, and third sub-decoders are configured from transistor switches of said first polarity, and the fourth, fifth, and sixth sub-decoders are configured from transistor switches of said second polarity.

摘要翻译： 解码器包括接收第一电平电压组并输出根据N位数据的较低L位选择的电压的第一子解码器，接收第二电平电压组的第二子解码器，并输出根据 较低的L比特，第三子解码器，根据较高的M比特，根据由第一和第二子解码器选择的电压选择一个电压;第四子解码器，输出根据低P位选择的电压 从第三电平电压组中选择第五子解码器，其从根据第四子解码器输出的电压中选择根据较高Q位选择的一个电压;以及第六子解码器，其基于 在第一子解码器的输出之间的一个输出之间的K位和第四子解码器的输出中的一个输出; 第三子解码器的输出和第五子解码器的输出连接到输出端子; 第一，第二和第三子解码器由所述第一极性的晶体管开关构成，第四，第五和第六子解码器由所述第二极性的晶体管开关构成。

公开(公告)号：US08514157B2

公开(公告)日：2013-08-20

申请号：US10976289

申请日：2004-10-27

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/2011

摘要： A differential amplifier has first and second input terminals (T1, T2), an output terminal, a differential stage connected to the first and second input terminals, and an amplification stage having an input terminal thereof connected to an output terminal of the differential stage and an output terminal thereof connected to the output terminal. The differential stage includes a first differential pair with one of an input pair thereof connected to the first input terminal (T1) and the other connected to the output terminal, a second differential pair with one of an input pair thereof connected to the first input terminal (T1) and the other connected to the second input terminal (T2), a first current source for supplying current to the first differential pair, a second current source for supplying current to the second differential pair, and a load circuit connected to the output pairs of the first and second differential pairs. One of the output pair of the first differential pair is connected in common to one of the output pair of the second differential pair, and their common connection node constitutes the output terminal of the differential stage.

摘要翻译： 差分放大器具有第一和第二输入端子（T1，T2），输出端子，连接到第一和第二输入端子的差分级，以及具有连接到差分级的输出端子的输入端子的放大级，以及 其输出端连接到输出端。 差分级包括第一差分对，其中一个输入对连接到第一输入端（T1），另一端连接到输出端;第二差分对，其输入对之一连接到第一输入端 （T1），另一个连接到第二输入端（T2），用于向第一差分对提供电流的第一电流源，用于向第二差分对提供电流的第二电流源，以及连接到输出的负载电路 成对的第一和第二差分对。 第一差分对的输出对中的一个共同连接到第二差分对的输出对之一，并且它们的公共连接节点构成差分级的输出端。

公开(公告)号：US08243003B2

公开(公告)日：2012-08-14

申请号：US12314909

申请日：2008-12-18

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： G09G5/00 ,  G03K17/00

CPC分类号： H03K3/356139

摘要： Disclosed is a level shift circuit including a first level shift circuit that is connected between a first power supply terminal and first and second output terminals and receives first and second input signals from the first and second input terminals, respectively, and sets one of the first and second output terminals to a first voltage level, based on the first and second input signals; a second level shift circuit that is connected between a second power supply terminal and the first and second output terminals, and sets the other of the first and second terminals to a second voltage level; and a circuit that performs control to disconnect a current path in the second level shifter between the second power supply terminal and one of the first and second output terminals that is driven to the second voltage level at a time point when the first and second input signals are supplied to the first and second input terminals for a predetermined period including the time point when the first and second input signals are supplied to the first and second input terminals, and to cancel the disconnection of the current path in the second level shifter between the one output terminal and the second power supply terminal after the predetermined period. Output amplitudes at the first and second output terminals are set to be larger than amplitudes of the first and second input signals.

摘要翻译： 公开了一种电平移位电路，包括第一电平移位电路，其连接在第一电源端子和第一和第二输出端子之间，并分别从第一和第二输入端子接收第一和第二输入信号，并且设置第一 并且基于所述第一和第二输入信号将所述第二输出端子设置到第一电压电平; 第二电平移位电路，连接在第二电源端子与第一和第二输出端子之间，并将第一和第二端子中的另一个设置为第二电压电平; 以及电路，其执行控制以断开所述第二电平转换器之间的电流路径，所述电流路径在所述第二电源端子与所述第一和第二输入信号之间的时间点被驱动到所述第二电压电平的所述第一和第二输出端子中的一个之间 在包括第一和第二输入信号被提供给第一和第二输入端的时间点的预定时段内被提供给第一和第二输入端，并且消除第二电平移位器中的电流路径的断开 一个输出端子和第二电源端子。 将第一和第二输出端子处的输出幅度设置为大于第一和第二输入信号的幅度。

公开(公告)号：US20100013686A1

公开(公告)日：2010-01-21

申请号：US12458594

申请日：2009-07-16

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03M1/00 ,  G11C27/02 ,  H03M1/66

CPC分类号： G11C27/024

摘要： Disclosed is a sample and hold circuit including a differential circuit, an amplifier stage and a sampling voltage supply circuit. The differential circuit includes first and second capacitance elements, electric charge of which is distributed by a first switch, a first MOS transistor having a gate connected via a second switch to one end of the first capacitance element and also connected via a third switch to an output terminal, and having a source connected to a first current source, a second MOS transistor having a gate connected to one end of the second capacitance element and having a source connected to a second current source and also connected via a forth switch to the source of the first MOS transistor, and a load circuit connected between the drains of the first and second MOS transistors and a terminal of a second power supply. The amplifier stage receives an output of the differential circuit and has an output connected to the output terminal. The sampling voltage supply circuit delivers a sampling voltage to the one end of at least one of the first and second capacitance elements.

摘要翻译： 公开了一种采样保持电路，包括差分电路，放大器级和采样电压供应电路。 差分电路包括第一和第二电容元件，其电荷由第一开关分配，第一MOS晶体管具有通过第二开关连接到第一电容元件的一端的栅极，并且还经由第三开关连接到 输出端子，并且具有连接到第一电流源的源极，第二MOS晶体管，其栅极连接到第二电容元件的一端，并且具有连接到第二电流源的源极，并且还经由第四开关连接到源极 以及连接在第一和第二MOS晶体管的漏极和第二电源的端子之间的负载电路。 放大器级接收差分电路的输出，并具有连接到输出端子的输出。 采样电压供应电路将采样电压传送到第一和第二电容元件中的至少一个电容元件的一端。

公开(公告)号：US07595533B2

公开(公告)日：2009-09-29

申请号：US11740226

申请日：2007-04-25

申请人： Kenji Sera ,  Hiroshi Tsuchi

发明人： Kenji Sera ,  Hiroshi Tsuchi

IPC分类号： H01L29/76 ,  H01L31/062

CPC分类号： H01L27/127 ,  G11C7/062 ,  H01L27/1214 ,  H03F3/45192 ,  H03F3/45219 ,  H03K5/2481 ,  H03K19/0016

摘要： When n-channel thin film transistors(TFTs) and p-channel TFTs are formed on a polycrystalline silicon film formed on a glass substrate, a process is included in which P-dopant or N-dopant is introduced at the same time to the channel region of a part of the n-channel TFTs and a part of the p-channel TFTs. In one channel doping operation, a set of low-VT and high-VT p-channel TFTs and a set of low-VT and high-VT n-channel TFTs can be formed. This method is used for forming high-VT TFTs, which can reduce the off-current, in logics and switch circuits and for forming low-VT TFTs, which can enlarge the dynamic range, in analog circuits to improve the performance of a thin film semiconductor.

摘要翻译： 当在形成在玻璃基板上的多晶硅膜上形成n沟道薄膜晶体管（TFT）和p沟道TFT时，包括其中P掺杂剂或N掺杂剂同时引入沟道的工艺 n沟道TFT的一部分的区域和p沟道TFT的一部分。 在单通道掺杂操作中，可以形成一组低VT和高VT p沟道TFT以及一组低VT和高VT n沟道TFT。 该方法用于形成高VT TFT，其可以减少逻辑和开关电路中的截止电流，并且用于形成低VT TFT，这可以扩大模拟电路中的动态范围，以提高薄膜的性能 半导体。

公开(公告)号：US07545305B2

公开(公告)日：2009-06-09

申请号：US11979342

申请日：2007-11-01

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03M1/66

CPC分类号： H03M1/742 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/0291 ,  G09G2330/021

摘要： A data driver includes a positive-polarity reference voltage generation circuit that outputs positive-polarity reference voltages, a positive-polarity decoder that receives the positive-polarity reference voltages from the positive-polarity reference voltage generation circuit, end selects and outputs at least one positive-polarity reference voltage in accordance with first digital data, a positive-polarity amplifier which includes a first differential units that receives the selected reference voltage selected by the positive-polarity decoder, performs amplification, and outputs a voltage to a first amplifier output terminal, δ negative-polarity reference voltage generation circuit that outputs negative-polarity reference voltages, and a negative-polarity decoder that receives the negative-polarity reference voltages from the negative-polarity reference voltage generation circuit, and selects and outputs at least one negative-polarity reference voltage in accordance with second digital data.

摘要翻译： 数据驱动器包括正极参考电压产生电路，其输出正极性参考电压;正极性解码器，其从正极参考电压产生电路接收正极参考电压，结束选择并输出至少一个 根据第一数字数据的正极性参考电压，包括接收由正极性解码器选择的所选择的参考电压的第一差分单元的正极放大器进行放大，并将电压输出到第一放大器输出端子 输出负极性基准电压的δ负极性基准电压产生电路和从负极性基准电压产生电路接收负极性基准电压的负极性译码器，并选择并输出至少一个负极性参考电压， 根据第二di的极性参考电压 资料数据。

公开(公告)号：US07368990B2

公开(公告)日：2008-05-06

申请号：US11304599

申请日：2005-12-16

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F2203/45504 ,  H03F2203/45521 ,  H03F2203/45616

摘要： Disclosed is a differential amplifier which includes first and second input terminals, an output terminal, first and second differential pairs, and first and second current sources for supplying currents to the first and second differential pairs. The first differential pair has first and second inputs of an input pair connected to the first input terminal and the output terminal, respectively. The second differential pair has first and second inputs of an input pair connected to the second input terminal the output terminal, respectively. The differential amplifier further includes a load circuit connected to output pairs of the first and second differential pairs for outputting a signal obtained on combining outputs of the first and second differential pairs from at least one of a pair of connection nodes between the output pairs of the first and second differential pairs and the load circuit, an amplifier stage supplied with at least one signal at a connection node of the output pairs of the first and second differential pairs and the load circuit to output a voltage at the output terminal, and a current control circuit controlling the first and second current sources for controlling the ratio of currents supplied to the first and second differential pairs.

摘要翻译： 公开了一种差分放大器，其包括第一和第二输入端子，输出端子，第一和第二差分对以及用于向第一和第二差分对提供电流的第一和第二电流源。 第一差分对具有分别连接到第一输入端和输出端的输入对的第一和第二输入。 第二差分对分别具有连接到第二输入端子和输出端子的输入对的第一和第二输入端。 所述差分放大器还包括连接到所述第一和第二差分对的输出对的负载电路，用于输出在所述第一和第二差分对的输出对之间的一对连接节点中的至少一个上组合所述第一和第二差分对的输出而获得的信号 第一和第二差分对和负载电路，在第一和第二差分对的输出对和负载电路的连接节点处提供至少一个信号的放大器级，以在输出端输出电压，以及电流 控制电路控制第一和第二电流源，以控制提供给第一和第二差分对的电流比。

公开(公告)号：US20070176675A1

公开(公告)日：2007-08-02

申请号：US11657208

申请日：2007-01-24

申请人： Hiroshi Tsuchi ,  Masao Iriguchi

发明人： Hiroshi Tsuchi ,  Masao Iriguchi

IPC分类号： H03F1/02

CPC分类号： H03F3/45183 ,  H03F1/26 ,  H03F2200/372 ,  H03F2203/45548 ,  H03F2203/45616 ,  H03M1/765

摘要： A differential amplifier comprises first, second, and third input terminals (1, 2, and 3), output terminal (4), first and second differential pairs (531 and 532) (533 and 534) driven by a corresponding current source and having output pairs commonly connected to load circuits (537 and 538), and an amplifier stage (539) having input end connected to at least one of the common connection points of the load circuits and output pairs of the first and second differential pairs and output end connected to output terminal. Input pair of second differential pair receives a signal from third input terminal and a feedback signal from output terminal. First and second switches (SW1 and SW2) are provided between the input pair of the first differential pair and the first and second input terminals (1 and 2), and first and second capacitors (C1 and C2) connected between each connection point of the input pair of the first differential pair and the first and second switches (SW1 and SW2) and a reference voltage terminal are provided. The first, second and third input terminals (1, 2, and 3) may be combined into one terminal to which voltages are serially supplied. It avoids the influence of power supply/signal noise and switch noise, and provides operational output from a plurality of input reference voltages.

摘要翻译： 差分放大器包括由相应的电流源驱动的第一，第二和第三输入端子（1,2和3），输出端子（4），第一和第二差分对（531和532）（533和534） 通常连接到负载电路（537和538）的输出对以及具有连接到负载电路的公共连接点和第一和第二差分对的输出对中的至少一个的输入端的放大器级（539）和输出端 连接到输出端子。 第二差分对的输入对接收来自第三输入端的信号和来自输出端的反馈信号。 第一和第二开关（SW 1和SW 2）设置在第一差分对的输入对与第一和第二输入端（1和2）之间，第一和第二电容器（C 1和C 2） 提供第一差分对和第一和第二开关（SW 1和SW 2）的输入对和参考电压端子的连接点。 第一，第二和第三输入端子（1,2和3）可以组合成串联供应电压的一个端子。 它避免了电源/信号噪声和开关噪声的影响，并提供了多个输入参考电压的工作输出。

公开(公告)号：US20070146042A1

公开(公告)日：2007-06-28

申请号：US11645687

申请日：2006-12-27

申请人： Hiroshi Tsuchi ,  Daigo Miyasaka

发明人： Hiroshi Tsuchi ,  Daigo Miyasaka

IPC分类号： H03L5/00

CPC分类号： H03K3/35613

摘要： A level shift circuit operates normally when amplitude of input signal is small and amplitude of output signal is large. First and second terminals receive an input signal and its complementary signal having a first amplitude. Third and fourth terminals output an output signal and its complementary signal having a second amplitude, which is larger than the first amplitude. Output circuit comprises first and second transistors of first polarity respectively connected between first power supply and fourth and third terminals, respectively. Third and fourth transistors of second polarity, respectively, are connected between second power supply and fourth and third terminals, respectively, having control ends connected to the third and the fourth terminals, respectively. First current control circuit controls so that a current driving the fourth terminal flows through the first transistor according to the input signal and the complementary signal of the output signal. Second current control circuit controls so that a current driving the third terminal flows through the second transistor according to the complementary signal of the input signal and the output signal.

摘要翻译： 当输入信号的幅度小，输出信号的幅度大时，电平移位电路正常工作。 第一和第二终端接收输入信号及其具有第一幅度的互补信号。 第三和第四端子输出输出信号，其互补信号具有大于第一幅度的第二幅度。 输出电路包括分别连接在第一电源和第四和第三端子之间的第一极性的第一和第二晶体管。 第二极性的第三和第四晶体管分别连接在第二电源和第四和第三端子之间，分别具有连接到第三和第四端子的控制端。 第一电流控制电路控制，使得驱动第四端子的电流根据输入信号和输出信号的互补信号流过第一晶体管。 控制第二电流控制电路，使得驱动第三端子的电流根据输入信号和输出信号的互补信号流过第二晶体管。

公开(公告)号：US20070085608A1

公开(公告)日：2007-04-19

申请号：US11526636

申请日：2006-09-26

申请人： Masao Iriguchi ,  Hiroshi Tsuchi

发明人： Masao Iriguchi ,  Hiroshi Tsuchi

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  G09G3/3688 ,  G09G2310/027 ,  H03F2203/45616 ,  H03F2203/45631 ,  H03F2203/45656 ,  H03F2203/45682 ,  H03F2203/45728 ,  H03M1/765

摘要： Disclosed is a differential amplifier of a multi-level output type comprising a load circuit including a diode-connected first transistor with a source thereof connected to a power supply and a second transistor with a source thereof connected to the power supply and connected to a gate of the first transistor through a capacitor, a differential pair including a third transistor and a fourth transistor with sources thereof connected in common and drains thereof connected to drains of the first and second transistors, respectively, a current source for supplying a current to the differential pair, a first switch connected between a gate of the second transistor and a drain of the fourth transistor, an amplifier with an input thereof connected to a drain of the second transistor and an output thereof connected to an output terminal, a second switch connected between a gate of the fourth transistor and a first input terminal, a third switch connected between the gate of the fourth transistor and a third input terminal, a fourth switch connected between a gate of the third transistor and a second input terminal, and a fifth switch connected between the gate of the third transistor and the output terminal. Switching control between a first state where the first, second and fourth switches are turned on and the third and fifth switches are turned off and a second state where the first and second fourth switches are turned off and the third and fifth switches are turned on is performed.

摘要翻译： 公开了一种多电平输出型的差分放大器，包括负载电路，负载电路包括二极管连接的第一晶体管，其源极连接到电源，第二晶体管的源极连接到电源并连接到栅极 第一晶体管通过电容器，差分对包括第三晶体管和第四晶体管，其源极分别连接到第一和第二晶体管的漏极，电流源分别连接到第一和第二晶体管的漏极，电流源用于向差分 连接在第二晶体管的栅极和第四晶体管的漏极之间的第一开关，放大器，其输入连接到第二晶体管的漏极，其输出连接到输出端子，第二开关连接在 第四晶体管的栅极和第一输入端子，连接在第四晶体管的栅极之间的第三开关 tor和第三输入端，连接在第三晶体管的栅极和第二输入端之间的第四开关，以及连接在第三晶体管的栅极和输出端之间的第五开关。 在第一，第二和第四开关导通的第一状态和第三和第五开关之间的开关控制被关断，而第一和第二第四开关被断开并且第三和第五开关导通的第二状态是 执行。