公开(公告)号：US07422949B2

公开(公告)日：2008-09-09

申请号：US11732765

申请日：2007-04-04

Applicant: Tae-kwang Yu ,  Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

Inventor： Tae-kwang Yu ,  Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

IPC: H01L29/72

CPC classification number: H01L29/66659 ,  H01L21/26586 ,  H01L21/28114 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/7835

Abstract: The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate; a gate insulating film which is formed on the channel region of the semiconductor substrate; a low concentration source region and a low concentration drain region having the channel region interposed therebetween and each being formed in the semiconductor substrate; a high concentration source region which is formed to be spaced away from the channel region by a first distance; a high concentration drain region which is formed to be spaced away from the channel region by a second distance that is larger than the first distance; a gate electrode which has a gate bottom portion interfacing with the gate insulating film over the channel region, and a gate top portion integrated with the gate bottom portion and protruding by a predetermined length from a top of the gate bottom portion to extend over the low concentration drain region; a first metal silicide layer which is formed on the high concentration source region; and a second metal silicide layer which is formed on the high concentration drain region.

Abstract translation: 本发明涉及高压晶体管及其制造方法。 高压晶体管包括：形成在半导体衬底中的沟道区; 形成在半导体衬底的沟道区上的栅极绝缘膜; 低浓度源极区和低浓度漏极区，其间具有沟道区，并且各自形成在半导体衬底中; 高浓度源区，其形成为与沟道区隔开第一距离; 高浓度漏区，其形成为与沟道区隔开距离大于第一距离的第二距离; 栅极电极，其具有与沟道区域上的栅极绝缘膜接合的栅极底部，以及与栅极底部一体化并且从栅极底部的顶部突出预定长度的栅极顶部，以在低于 浓度排水区; 形成在高浓度源区上的第一金属硅化物层; 以及形成在高浓度漏极区上的第二金属硅化物层。

公开(公告)号：US07345336B2

公开(公告)日：2008-03-18

申请号：US11000011

申请日：2004-12-01

Applicant: Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

Inventor： Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

IPC: H01L29/792

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/66833 ,  H01L29/7923

Abstract: A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked structure is self-aligned to a bottom surface of conductive spacers.

Abstract translation: 具有自对准电荷捕获层的半导体存储器件及其制造方法，其中确保ONO层的一致长度。 这里，绝缘层叠结构与导电间隔物的底面自对准。

公开(公告)号：US20070184622A1

公开(公告)日：2007-08-09

申请号：US11732765

申请日：2007-04-04

Applicant: Tae-kwang Yu ,  Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

Inventor： Tae-kwang Yu ,  Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

IPC: H01L21/336

CPC classification number: H01L29/66659 ,  H01L21/26586 ,  H01L21/28114 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/7835

Abstract: The present invention relates to a high voltage transistor and method of manufacturing the same. The high voltage transistor includes: a channel region which is formed in a semiconductor substrate; a gate insulating film which is formed on the channel region of the semiconductor substrate; a low concentration source region and a low concentration drain region having the channel region interposed therebetween and each being formed in the semiconductor substrate; a high concentration source region which is formed to be spaced away from the channel region by a first distance; a high concentration drain region which is formed to be spaced away from the channel region by a second distance that is larger than the first distance; a gate electrode which has a gate bottom portion interfacing with the gate insulating film over the channel region, and a gate top portion integrated with the gate bottom portion and protruding by a predetermined length from a top of the gate bottom portion to extend over the low concentration drain region; a first metal silicide layer which is formed on the high concentration source region; and a second metal silicide layer which is formed on the high concentration drain region.

公开(公告)号：US20050245031A1

公开(公告)日：2005-11-03

申请号：US11096038

申请日：2005-03-31

Applicant: Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

Inventor： Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8242 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

CPC classification number: H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/66825

Abstract: A method of manufacturing an EEPROM cell includes growing a first oxide layer on a semiconductor substrate; forming a first conductive layer on the first oxide layer; forming a first conductive pattern and a tunneling oxide layer by patterning the first conductive layer and the first oxide layer, the tunneling oxide layer being disposed under the first conductive pattern; forming a gate oxide layer on sidewalls of the first conductive pattern and the substrate and forming a second conductive pattern on both sides of the first conductive pattern; forming a conductive layer for a floating gate by electrically connecting the first conductive pattern to the second conductive pattern; forming a coupling oxide layer on the conductive layer for the floating gate; forming a third conductive layer on the coupling oxide layer; and forming a select transistor and a control transistor by patterning the third conductive layer, the coupling oxide layer, and the conductive layer for the floating gate. The select transistor is spaced apart from the control transistor. The select transistor, which is formed on the tunneling oxide layer, includes a gate stack formed of a select gate, a first coupling oxide pattern, and a first floating gate, and the control transistor includes a gate stack formed of a control gate, a second coupling oxide pattern, and a second floating gate.

Abstract translation: 制造EEPROM单元的方法包括在半导体衬底上生长第一氧化物层; 在所述第一氧化物层上形成第一导电层; 通过对所述第一导电层和所述第一氧化物层进行构图来形成第一导电图案和隧道氧化物层，所述隧穿氧化物层设置在所述第一导电图案下方; 在所述第一导电图案和所述基板的侧壁上形成栅氧化层，并在所述第一导电图案的两侧上形成第二导电图案; 通过将所述第一导电图案电连接到所述第二导电图案来形成用于浮置栅极的导电层; 在浮栅的导电层上形成耦合氧化物层; 在所述耦合氧化物层上形成第三导电层; 以及通过图案化第三导电层，耦合氧化物层和浮栅的导电层来形成选择晶体管和控制晶体管。 选择晶体管与控制晶体管间隔开。 形成在隧道氧化物层上的选择晶体管包括由选择栅极，第一耦合氧化物图案和第一浮置栅极形成的栅极堆叠，并且控制晶体管包括由控制栅极形成的栅极堆叠， 第二耦合氧化物图案和第二浮栅。

公开(公告)号：US20050133849A1

公开(公告)日：2005-06-23

申请号：US11000011

申请日：2004-12-01

Applicant: Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

Inventor： Hee-seog Jeon ,  Seung-beom Yoon ,  Yong-tae Kim

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/66833 ,  H01L29/7923

Abstract: A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked structure is self-aligned to a bottom surface of conductive spacers.

Abstract translation: 具有自对准电荷捕获层的半导体存储器件及其制造方法，其中确保ONO层的一致长度。 这里，绝缘层叠结构与导电间隔物的底面自对准。

公开(公告)号：US08624897B2

公开(公告)日：2014-01-07

申请号：US12821600

申请日：2010-06-23

Applicant: Yong-tae Kim ,  Sang-hyoun Kim ,  Dae-sik Kim ,  Jong-sul Min

Inventor： Yong-tae Kim ,  Sang-hyoun Kim ,  Dae-sik Kim ,  Jong-sul Min

IPC: G06T15/10 ,  G06T15/20 ,  G06T15/00

CPC classification number: H04N13/139 ,  H04N13/161 ,  H04N2013/0081 ,  H04N2213/007

Abstract: A method of transforming a 3D video format of a 3D video, the method including receiving a video sequence comprising 3D video that includes left-viewpoint video and right-viewpoint video; estimating at least one of disparity information between the left-viewpoint video and the right-viewpoint video and correlation information between neighboring pixel values of the left-viewpoint video and the right-viewpoint video, and determining a 3D video format of the 3D video based on a result of the estimating; transforming the left-viewpoint video and the right-viewpoint video into a format, based on the determined 3D video format; and displaying the transformed left-viewpoint video and the transformed right-viewpoint video three-dimensionally on a the display device.

Abstract translation: 一种变换3D视频的3D视频格式的方法，所述方法包括接收包括左视点视频和右视点视频的包含3D视频的视频序列; 估计左视点视频和右视点视频之间的视差信息和左视点视频和右视点视频的相邻像素值之间的相关信息中的至少一个，并且基于3D视频确定3D视频格式 估计结果; 基于所确定的3D视频格式将左视点视频和右视点视频转换为格式; 以及在显示装置上三维地显示变换后的左视点视频和变换的右视点视频。

公开(公告)号：US08471893B2

公开(公告)日：2013-06-25

申请号：US12124739

申请日：2008-05-21

Applicant: Yong-tae Kim ,  Jae-seung Kim ,  Seong-sin Joo ,  Dae-sik Kim

Inventor： Yong-tae Kim ,  Jae-seung Kim ,  Seong-sin Joo ,  Dae-sik Kim

IPC: H04N13/00

CPC classification number: H04N19/85 ,  H04N13/178 ,  H04N19/46 ,  H04N19/597 ,  H04N19/61 ,  H04N19/70 ,  H04N19/80 ,  H04N2213/005

Abstract: Provided are a method and apparatus for generating a stereoscopic image bitstream. The method includes dividing a base view image and an additional view image into blocks having a predetermined size, generating a combined image by combining the blocks of the base view image and the blocks of the additional view image, recording the combined image in a payload area of the stereoscopic image bitstream, and recording block combination pattern information about a pattern of arranging the blocks of the base view image and the additional view image in the combined image, in a header area of the stereoscopic image bitstream.

Abstract translation: 提供了一种用于生成立体图像比特流的方法和装置。 该方法包括将基本视图图像和附加视图图像划分成具有预定大小的块，通过组合基本视图图像的块和附加视图图像的块来生成组合图像，将组合图像记录在有效载荷区域中 以及关于将立体图像比特流的标题区域中的基本视图图像和附加视图图像的块排列在合成图像中的图案的记录块组合图案信息。

公开(公告)号：US08390674B2

公开(公告)日：2013-03-05

申请号：US12178217

申请日：2008-07-23

Applicant: Yong-tae Kim ,  Jae-seung Kim ,  Jae-phil Koo ,  Dae-sik Kim

Inventor： Yong-tae Kim ,  Jae-seung Kim ,  Jae-phil Koo ,  Dae-sik Kim

IPC: H04N13/00

CPC classification number: H04N13/122 ,  G06K9/00604 ,  G06T15/10 ,  G06T15/205 ,  H04N13/10 ,  H04N13/305 ,  H04N13/383 ,  H04N2013/0081

Abstract: Provided is a method of reducing fatigue resulting from viewing a three-dimensional (3D) image display. The method includes: obtaining low visual fatigue parameter information on a frame section including at least one frame of a received 3D image; obtaining disparity vector information on each frame of the 3D image; and determining a disparity minimum limit value and a disparity maximum limit value with respect to the 3D image.

Abstract translation: 提供了一种减少由观看三维（3D）图像显示产生的疲劳的方法。 该方法包括：在包括接收到的3D图像的至少一个帧的帧部分上获得低视觉疲劳参数信息; 获得3D图像的每个帧上的视差矢量信息; 以及确定相对于3D图像的视差最小极限值和视差最大极限值。

公开(公告)号：US08384764B2

公开(公告)日：2013-02-26

申请号：US12198515

申请日：2008-08-26

Applicant: Yong-tae Kim ,  Seo-young Hwang ,  Jae-seung Kim ,  Dae-sik Kim ,  Jae-yeon Song

Inventor： Yong-tae Kim ,  Seo-young Hwang ,  Jae-seung Kim ,  Dae-sik Kim ,  Jae-yeon Song

IPC: H04N15/00

CPC classification number: H04N19/597 ,  H04N13/189

Abstract: Provided is a method and apparatus for generating a multi-view image data stream, the method including: recording multi-view image data onto the multi-view image data stream; recording onto the multi-view image data stream a multi-view image parameter recording parameter indicating whether a multi-view image parameter with regard to the multi-view image data is to be recorded onto the multi-view image data stream; and determining whether the multi-view image parameter is to be recorded onto the multi-view image data stream based on a value of the multi-view image data parameter recording parameter.

Abstract translation: 提供了一种用于生成多视点图像数据流的方法和装置，该方法包括：将多视点图像数据记录到多视图图像数据流上; 在多视点图像数据流上记录多视点图像参数记录参数，该多视点图像参数记录参数指示关于多视点图像数据的多视点图像参数是否被记录在多视点图像数据流上; 以及基于所述多视点图像数据参数记录参数的值来确定所述多视点图像参数是否被记录在所述多视点图像数据流上。

公开(公告)号：US20130027514A1

公开(公告)日：2013-01-31

申请号：US13641327

申请日：2011-04-14

Applicant: Bong-je Cho ,  Yong-tae Kim ,  Yong-seok Jang ,  Dae-jong Lee ,  Jae-seung Kim ,  Ju-hee Seo

Inventor： Bong-je Cho ,  Yong-tae Kim ,  Yong-seok Jang ,  Dae-jong Lee ,  Jae-seung Kim ,  Ju-hee Seo

IPC: H04N13/00

CPC classification number: H04N5/44513 ,  H04N13/161 ,  H04N13/178 ,  H04N13/183 ,  H04N13/194 ,  H04N13/398 ,  H04N21/23614 ,  H04N21/2362 ,  H04N21/4345 ,  H04N21/4348 ,  H04N21/4884 ,  H04N21/6433 ,  H04N21/816 ,  H04N21/84

Abstract: A method of generating a broadcasting bitstream for a digital caption broadcast, the method including: receiving video data in which a video including at least one of a two-dimensional (2D) video and a three-dimensional (3D) video is encoded; determining caption data for reproduction in conjunction with the video, and 3D caption converting information including information relating to a converting speed of an offset for reproducing the caption data as a 3D caption; and outputting a bitstream for a digital broadcast by multiplexing the received video data, the determined caption data, and the determined 3D caption converting information.

Abstract translation: 一种产生用于数字字幕广播的广播比特流的方法，所述方法包括：接收其中编码包括二维（2D）视频和三维（3D）视频中的至少一个）的视频的视频数据; 确定与视频一起再现的字幕数据，以及3D字幕转换信息，其包括与用于再现字幕数据的偏移的转换速度有关的信息作为3D标题; 以及通过多路复用所接收的视频数据，确定的字幕数据和所确定的3D字幕转换信息来输出用于数字广播的比特流。